Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.

18 files changed, 52 insertions, 77 deletions

diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index 8de3e1042..2cf1e1f30 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -104,7 +104,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -122,8 +121,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=262144
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=20
 trace_addr=0
@@ -281,7 +278,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -299,8 +295,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=131072
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=20
 trace_addr=0
@@ -321,7 +315,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -339,8 +332,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=2097152
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt
index 6cd7ed43b..60ec1554f 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt
@@ -8,10 +8,10 @@ global.BPredUnit.condIncorrect                 452707                       # Nu
 global.BPredUnit.condPredicted               10551562                       # Number of conditional branches predicted
 global.BPredUnit.lookups                     16249458                       # Number of BP lookups
 global.BPredUnit.usedRAS                      1941929                       # Number of times the RAS was used to get a target.
-host_inst_rate                                 176565                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 212168                       # Number of bytes of host memory used
-host_seconds                                   450.78                       # Real time elapsed on the host
-host_tick_rate                               60195419                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 272001                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 212988                       # Number of bytes of host memory used
+host_seconds                                   292.62                       # Real time elapsed on the host
+host_tick_rate                               92731689                       # Simulator tick rate (ticks/s)
 memdepunit.memDep.conflictingLoads           12835812                       # Number of conflicting loads.
 memdepunit.memDep.conflictingStores          11558188                       # Number of conflicting stores.
 memdepunit.memDep.insertedLoads              23001211                       # Number of loads inserted to the mem dependence unit.
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr
index 7edb64427..cd7a7fb23 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: Increasing stack size by one page.
diff --git a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
index 3c7b7f584..61aa77324 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout
@@ -5,10 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:23
-M5 executing on piton
+M5 compiled Nov  5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 18:42:31
+M5 executing on zizzer
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/o3-timing -re --stdout-file stdout --stderr-file stderr tests/run.py long/50.vortex/alpha/tru64/o3-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt
index f06392b4f..fba592412 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                2496642                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 184388                       # Number of bytes of host memory used
-host_seconds                                    35.38                       # Real time elapsed on the host
-host_tick_rate                             1249741953                       # Simulator tick rate (ticks/s)
+host_inst_rate                                5277091                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 203864                       # Number of bytes of host memory used
+host_seconds                                    16.74                       # Real time elapsed on the host
+host_tick_rate                             2641544350                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    88340673                       # Number of instructions simulated
 sim_seconds                                  0.044221                       # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr
index 7edb64427..cd7a7fb23 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: Increasing stack size by one page.
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
index 4f6e61da0..a2c31ed4b 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout
@@ -5,10 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:32
-M5 executing on piton
+M5 compiled Nov  5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 19:13:00
+M5 executing on zizzer
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-atomic -re --stdout-file stdout --stderr-file stderr tests/run.py long/50.vortex/alpha/tru64/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
index 65c1a4eef..7718ab128 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini
@@ -40,7 +40,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -58,8 +57,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=262144
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -80,7 +77,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -98,8 +94,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=131072
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -120,7 +114,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -138,8 +131,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=2097152
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt
index fcf32cd99..828a42be2 100644
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1478736                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 210524                       # Number of bytes of host memory used
-host_seconds                                    59.74                       # Real time elapsed on the host
-host_tick_rate                             2262580844                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1704355                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 211324                       # Number of bytes of host memory used
+host_seconds                                    51.83                       # Real time elapsed on the host
+host_tick_rate                             2607795037                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    88340673                       # Number of instructions simulated
 sim_seconds                                  0.135169                       # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr
index 7edb64427..cd7a7fb23 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr
@@ -1,3 +1,2 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: Increasing stack size by one page.
diff --git a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
index 04c3255fb..8bed4881a 100755
--- a/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
+++ b/tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout
@@ -5,10 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:21
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:24
-M5 executing on piton
+M5 compiled Nov  5 2008 18:30:06
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 21:27:23
+M5 executing on zizzer
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/50.vortex/alpha/tru64/simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py long/50.vortex/alpha/tru64/simple-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt
index d8596d3fc..25cbdfb32 100644
--- a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                3368510                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 185484                       # Number of bytes of host memory used
-host_seconds                                    40.42                       # Real time elapsed on the host
-host_tick_rate                             1686201794                       # Simulator tick rate (ticks/s)
+host_inst_rate                                2431097                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 204768                       # Number of bytes of host memory used
+host_seconds                                    56.00                       # Real time elapsed on the host
+host_tick_rate                             1216955986                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   136139203                       # Number of instructions simulated
 sim_seconds                                  0.068149                       # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr
index 942c388e0..06afeeef2 100755
--- a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr
@@ -1,5 +1,4 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: ignoring syscall time(4026527848, 4026528248, ...)
 warn: ignoring syscall time(4026527400, 1375098, ...)
 warn: ignoring syscall time(4026527312, 1, ...)
@@ -562,3 +561,4 @@ warn: ignoring syscall time(4026525968, 4026526436, ...)
 warn: ignoring syscall time(4026526056, 7004192, ...)
 warn: ignoring syscall time(4026527512, 4, ...)
 warn: ignoring syscall time(4026525760, 0, ...)
+warn: be nice to actually delete the event here
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
index 068a01d62..b0eadd5ad 100755
--- a/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:21:24
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:29:09
-M5 executing on piton
+M5 compiled Nov  5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:55:47
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-atomic -re --stdout-file stdout --stderr-file stderr tests/run.py long/50.vortex/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 68148678500 because target called exit()
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini b/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
index 685fc165c..1868a281c 100644
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini
@@ -40,7 +40,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -58,8 +57,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=262144
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -80,7 +77,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -98,8 +94,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=131072
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
@@ -120,7 +114,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=10
@@ -138,8 +131,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=2097152
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=5
 trace_addr=0
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt b/tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt
index 398922df0..9b35ba579 100644
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1368614                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 211448                       # Number of bytes of host memory used
-host_seconds                                    99.47                       # Real time elapsed on the host
-host_tick_rate                             2062044712                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1344201                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 212228                       # Number of bytes of host memory used
+host_seconds                                   101.28                       # Real time elapsed on the host
+host_tick_rate                             2025263348                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   136139203                       # Number of instructions simulated
 sim_seconds                                  0.205117                       # Number of seconds simulated
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr
index 942c388e0..06afeeef2 100755
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr
@@ -1,5 +1,4 @@
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: ignoring syscall time(4026527848, 4026528248, ...)
 warn: ignoring syscall time(4026527400, 1375098, ...)
 warn: ignoring syscall time(4026527312, 1, ...)
@@ -562,3 +561,4 @@ warn: ignoring syscall time(4026525968, 4026526436, ...)
 warn: ignoring syscall time(4026526056, 7004192, ...)
 warn: ignoring syscall time(4026527512, 4, ...)
 warn: ignoring syscall time(4026525760, 0, ...)
+warn: be nice to actually delete the event here
diff --git a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
index 5a2b5220b..2b1927ccc 100755
--- a/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
+++ b/tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:21:24
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:30:05
-M5 executing on piton
+M5 compiled Nov  5 2008 22:40:47
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:43:57
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/50.vortex/sparc/linux/simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py long/50.vortex/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 205116920000 because target called exit()