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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-04-15 13:13:58 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2009-04-15 13:13:58 -0700 |
| commit | 48d4ca522a2f771188d93a2d5ff54cf505a8ca41 (patch) | |
| tree | 5e982be7b07ed178d27097039a7645be62da890f /tests/long/60.bzip2/ref | |
| parent | 8882dc1283771463a20194c083f4b8940a2d574b (diff) | |
| download | gem5-48d4ca522a2f771188d93a2d5ff54cf505a8ca41.tar.xz | |
Update stats after elimination of Unallocated state.
Somehow ending threads with halt() instead of deallocate()
reduces the squash count on o3 by 1 (and a few other
similarly trivial changes).
Diffstat (limited to 'tests/long/60.bzip2/ref')
3 files changed, 14 insertions, 14 deletions
diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini index c5cc148d0..e924b3603 100644 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini @@ -356,12 +356,12 @@ type=ExeTracer [system.cpu.workload] type=LiveProcess cmd=bzip2 input.source 1 -cwd=build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing +cwd=build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/alpha/tru64/bzip2 +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/bzip2 gid=100 input=cin max_stack_size=67108864 diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout index e092c3b04..2efc71f10 100755 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout @@ -5,11 +5,11 @@ The Regents of The University of Michigan All Rights Reserved -M5 compiled Apr 8 2009 12:30:02 -M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff -M5 started Apr 8 2009 12:33:27 -M5 executing on maize -command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/60.bzip2/alpha/tru64/o3-timing +M5 compiled Apr 14 2009 23:40:03 +M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update +M5 started Apr 15 2009 00:17:29 +M5 executing on phenom +command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/60.bzip2/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. diff --git a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt index 3fa048f88..a08661a40 100644 --- a/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt @@ -1,9 +1,9 @@ ---------- Begin Simulation Statistics ---------- -host_inst_rate 226919 # Simulator instruction rate (inst/s) -host_mem_usage 205788 # Number of bytes of host memory used -host_seconds 7650.48 # Real time elapsed on the host -host_tick_rate 97027777 # Simulator tick rate (ticks/s) +host_inst_rate 188573 # Simulator instruction rate (inst/s) +host_mem_usage 207604 # Number of bytes of host memory used +host_seconds 9206.20 # Real time elapsed on the host +host_tick_rate 80631433 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks sim_insts 1736043781 # Number of instructions simulated sim_seconds 0.742309 # Number of seconds simulated @@ -20,9 +20,9 @@ system.cpu.commit.COM:branches 214632552 # Nu system.cpu.commit.COM:bw_lim_events 62782585 # number cycles where commit BW limit reached system.cpu.commit.COM:bw_limited 0 # number of insts not committed due to BW limits system.cpu.commit.COM:committed_per_cycle.start_dist # Number of insts commited each cycle -system.cpu.commit.COM:committed_per_cycle.samples 1379215338 +system.cpu.commit.COM:committed_per_cycle.samples 1379215339 system.cpu.commit.COM:committed_per_cycle.min_value 0 - 0 736540830 5340.29% + 0 736540831 5340.29% 1 260049504 1885.49% 2 126970462 920.60% 3 77723426 563.53% @@ -152,7 +152,7 @@ system.cpu.fetch.CacheLines 355180518 # Nu system.cpu.fetch.Cycles 920206770 # Number of cycles fetch has run and was not squashing or blocked system.cpu.fetch.IcacheSquashes 7941781 # Number of outstanding Icache misses that were squashed system.cpu.fetch.Insts 2863046502 # Number of instructions fetch has processed -system.cpu.fetch.SquashCycles 28103166 # Number of cycles fetch has spent squashing +system.cpu.fetch.SquashCycles 28103165 # Number of cycles fetch has spent squashing system.cpu.fetch.branchRate 0.232721 # Number of branch fetches per cycle system.cpu.fetch.icacheStallCycles 355180518 # Number of cycles fetch is stalled on an Icache miss system.cpu.fetch.predictedBranches 336596037 # Number of branches that fetch has predicted taken |