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authorGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
committerGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
commit0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch)
tree96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt
parent1b64bfa933745294667158d0ce22180780b2a22e (diff)
downloadgem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz
Stats: Re update stats.
Diffstat (limited to 'tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt')
-rw-r--r--tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt26
1 files changed, 21 insertions, 5 deletions
diff --git a/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt
index 45e4b8820..4a204d0cd 100644
--- a/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt
+++ b/tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2742393 # Simulator instruction rate (inst/s)
-host_mem_usage 257424 # Number of bytes of host memory used
-host_seconds 68.12 # Real time elapsed on the host
-host_tick_rate 1499949275 # Simulator tick rate (ticks/s)
+host_inst_rate 1012006 # Simulator instruction rate (inst/s)
+host_mem_usage 232796 # Number of bytes of host memory used
+host_seconds 184.60 # Real time elapsed on the host
+host_tick_rate 553516772 # Simulator tick rate (ticks/s)
sim_freq 1000000000000 # Frequency of simulated ticks
sim_insts 186818826 # Number of instructions simulated
sim_seconds 0.102181 # Number of seconds simulated
@@ -53,8 +53,24 @@ system.cpu.itb.write_hits 0 # DT
system.cpu.itb.write_misses 0 # DTB write misses
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 204361469 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 204361469 # Number of busy cycles
+system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 1752310 # Number of float alu accesses
+system.cpu.num_fp_insts 1752310 # number of float instructions
+system.cpu.num_fp_register_reads 2822225 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 2378039 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 186818826 # Number of instructions executed
-system.cpu.num_refs 42511846 # Number of memory references
+system.cpu.num_int_alu_accesses 148453796 # Number of integer alu accesses
+system.cpu.num_int_insts 148453796 # number of integer instructions
+system.cpu.num_int_register_reads 440904784 # number of times the integer registers were read
+system.cpu.num_int_register_writes 179338779 # number of times the integer registers were written
+system.cpu.num_load_insts 29867211 # Number of load instructions
+system.cpu.num_mem_refs 42511846 # number of memory refs
+system.cpu.num_store_insts 12644635 # Number of store instructions
system.cpu.workload.PROG:num_syscalls 400 # Number of system calls
---------- End Simulation Statistics ----------