summaryrefslogtreecommitdiff
path: root/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-03-12 17:57:14 -0500
committerGabe Black <gblack@eecs.umich.edu>2007-03-12 17:57:14 -0500
commit0d0e18a0653f321c90ced826682a98d14bba9045 (patch)
tree112c77e0495ccb3c6ac5a213bf0ec026230f4763 /tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
parent1f3c3aa23484ab8b3dca2a973336a5847d01799d (diff)
downloadgem5-0d0e18a0653f321c90ced826682a98d14bba9045.tar.xz
Added SPARC twolf regression.
--HG-- extra : convert_revision : cb417d281a0a6ae1b9f75d5f04b3c28934e702d3
Diffstat (limited to 'tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini')
-rw-r--r--tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini64
1 files changed, 64 insertions, 0 deletions
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
new file mode 100644
index 000000000..2a1613fa1
--- /dev/null
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini
@@ -0,0 +1,64 @@
+[root]
+type=Root
+children=system
+dummy=0
+
+[system]
+type=System
+children=cpu membus physmem
+mem_mode=atomic
+physmem=system.physmem
+
+[system.cpu]
+type=AtomicSimpleCPU
+children=workload
+clock=1
+cpu_id=0
+defer_registration=false
+function_trace=false
+function_trace_start=0
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+phase=0
+progress_interval=0
+simulate_stalls=false
+system=system
+width=1
+workload=system.cpu.workload
+dcache_port=system.membus.port[2]
+icache_port=system.membus.port[1]
+
+[system.cpu.workload]
+type=LiveProcess
+cmd=twolf smred
+cwd=build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic
+egid=100
+env=
+euid=100
+executable=/dist/m5/cpu2000/binaries/sparc/linux/twolf
+gid=100
+input=cin
+output=cout
+pid=100
+ppid=99
+system=system
+uid=100
+
+[system.membus]
+type=Bus
+bus_id=0
+clock=1000
+responder_set=false
+width=64
+port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port
+
+[system.physmem]
+type=PhysicalMemory
+file=
+latency=1
+range=0:134217727
+zero=false
+port=system.membus.port[0]
+