tests: update stats for name changes

3 files changed, 171 insertions, 167 deletions

diff --git a/tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini b/tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini
index 61dc4a8fe..15faea73a 100644
--- a/tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini
+++ b/tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini
@@ -25,6 +25,8 @@ BTBEntries=4096
 BTBTagSize=16
 LFSTSize=1024
 LQEntries=32
+LSQCheckLoads=true
+LSQDepCheckShift=4
 RASSize=16
 SQEntries=32
 SSITSize=1024
diff --git a/tests/long/70.twolf/ref/x86/linux/o3-timing/simout b/tests/long/70.twolf/ref/x86/linux/o3-timing/simout
index d11a4f41f..09f414a42 100755
--- a/tests/long/70.twolf/ref/x86/linux/o3-timing/simout
+++ b/tests/long/70.twolf/ref/x86/linux/o3-timing/simout
@@ -5,10 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Mar 18 2011 20:12:06
-M5 started Mar 18 2011 20:12:16
-M5 executing on zizzer
+M5 compiled Apr 19 2011 12:22:33
+M5 started Apr 19 2011 12:39:55
+M5 executing on maize
 command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/70.twolf/x86/linux/o3-timing -re tests/run.py build/X86_SE/tests/fast/long/70.twolf/x86/linux/o3-timing
+Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/o3-timing/smred.sav
+Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/o3-timing/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
diff --git a/tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt b/tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt
index 4edd15028..84b97ca66 100644
--- a/tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 118324                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 224536                       # Number of bytes of host memory used
-host_seconds                                  1870.83                       # Real time elapsed on the host
-host_tick_rate                               57079180                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 200454                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 220376                       # Number of bytes of host memory used
+host_seconds                                  1104.31                       # Real time elapsed on the host
+host_tick_rate                               96698720                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   221363017                       # Number of instructions simulated
 sim_seconds                                  0.106785                       # Number of seconds simulated
@@ -16,38 +16,38 @@ system.cpu.BPredUnit.condIncorrect            3071588                       # Nu
 system.cpu.BPredUnit.condPredicted           25075434                       # Number of conditional branches predicted
 system.cpu.BPredUnit.lookups                 25075434                       # Number of BP lookups
 system.cpu.BPredUnit.usedRAS                        0                       # Number of times the RAS was used to get a target.
-system.cpu.commit.COM:branches               12326943                       # Number of branches committed
-system.cpu.commit.COM:bw_lim_events           2318001                       # number cycles where commit BW limit reached
-system.cpu.commit.COM:bw_limited                    0                       # number of insts not committed due to BW limits
-system.cpu.commit.COM:committed_per_cycle::samples    190318905                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::mean     1.163116                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::stdev     1.516800                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::underflows            0      0.00%      0.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::0     74095187     38.93%     38.93% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::1     71171116     37.40%     76.33% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::2     18278998      9.60%     85.93% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::3     12739096      6.69%     92.63% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::4      5868968      3.08%     95.71% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::5      2789277      1.47%     97.18% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::6      1957482      1.03%     98.20% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::7      1100780      0.58%     98.78% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::8      2318001      1.22%    100.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::overflows            0      0.00%    100.00% # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::min_value            0                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::max_value            8                       # Number of insts commited each cycle
-system.cpu.commit.COM:committed_per_cycle::total    190318905                       # Number of insts commited each cycle
-system.cpu.commit.COM:count                 221363017                       # Number of instructions committed
-system.cpu.commit.COM:fp_insts                2162459                       # Number of committed floating point instructions.
-system.cpu.commit.COM:function_calls                0                       # Number of function calls committed.
-system.cpu.commit.COM:int_insts             220339606                       # Number of committed integer instructions.
-system.cpu.commit.COM:loads                  56649590                       # Number of loads committed
-system.cpu.commit.COM:membars                       0                       # Number of memory barriers committed
-system.cpu.commit.COM:refs                   77165306                       # Number of memory references committed
-system.cpu.commit.COM:swp_count                     0                       # Number of s/w prefetches committed
 system.cpu.commit.branchMispredicts           3071621                       # The number of times a branch was mispredicted
+system.cpu.commit.branches                   12326943                       # Number of branches committed
+system.cpu.commit.bw_lim_events               2318001                       # number cycles where commit BW limit reached
+system.cpu.commit.bw_limited                        0                       # number of insts not committed due to BW limits
 system.cpu.commit.commitCommittedInsts      221363017                       # The number of committed instructions
 system.cpu.commit.commitNonSpecStalls            1246                       # The number of times commit has been forced to stall to communicate backwards
 system.cpu.commit.commitSquashedInsts       174370767                       # The number of squashed insts skipped by commit
+system.cpu.commit.committed_per_cycle::samples    190318905                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::mean     1.163116                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::stdev     1.516800                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::underflows            0      0.00%      0.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::0     74095187     38.93%     38.93% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::1     71171116     37.40%     76.33% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::2     18278998      9.60%     85.93% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::3     12739096      6.69%     92.63% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::4      5868968      3.08%     95.71% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::5      2789277      1.47%     97.18% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::6      1957482      1.03%     98.20% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::7      1100780      0.58%     98.78% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::8      2318001      1.22%    100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::overflows            0      0.00%    100.00% # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::min_value            0                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::max_value            8                       # Number of insts commited each cycle
+system.cpu.commit.committed_per_cycle::total    190318905                       # Number of insts commited each cycle
+system.cpu.commit.count                     221363017                       # Number of instructions committed
+system.cpu.commit.fp_insts                    2162459                       # Number of committed floating point instructions.
+system.cpu.commit.function_calls                    0                       # Number of function calls committed.
+system.cpu.commit.int_insts                 220339606                       # Number of committed integer instructions.
+system.cpu.commit.loads                      56649590                       # Number of loads committed
+system.cpu.commit.membars                           0                       # Number of memory barriers committed
+system.cpu.commit.refs                       77165306                       # Number of memory references committed
+system.cpu.commit.swp_count                         0                       # Number of s/w prefetches committed
 system.cpu.committedInsts                   221363017                       # Number of Instructions Simulated
 system.cpu.committedInsts_total             221363017                       # Number of Instructions Simulated
 system.cpu.cpi                               0.964799                       # CPI: Cycles Per Instruction
@@ -96,8 +96,8 @@ system.cpu.dcache.demand_mshr_misses             1955                       # nu
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.dcache.occ_%::0                   0.341442                       # Average percentage of cache occupancy
 system.cpu.dcache.occ_blocks::0           1398.546932                       # Average occupied blocks per context
+system.cpu.dcache.occ_percent::0             0.341442                       # Average percentage of cache occupancy
 system.cpu.dcache.overall_accesses           71006066                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_avg_miss_latency 27063.622370                       # average overall miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency 35228.132992                       # average overall mshr miss latency
@@ -119,12 +119,12 @@ system.cpu.dcache.tagsinuse               1398.546932                       # Cy
 system.cpu.dcache.total_refs                 70998272                       # Total number of references to valid blocks.
 system.cpu.dcache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.dcache.writebacks                       10                       # number of writebacks
-system.cpu.decode.DECODE:BlockedCycles       57112679                       # Number of cycles decode is blocked
-system.cpu.decode.DECODE:DecodedInsts       420105654                       # Number of instructions handled by decode
-system.cpu.decode.DECODE:IdleCycles          67048451                       # Number of cycles decode is idle
-system.cpu.decode.DECODE:RunCycles           60385094                       # Number of cycles decode is running
-system.cpu.decode.DECODE:SquashCycles        23161998                       # Number of cycles decode is squashing
-system.cpu.decode.DECODE:UnblockCycles        5772681                       # Number of cycles decode is unblocking
+system.cpu.decode.BlockedCycles              57112679                       # Number of cycles decode is blocked
+system.cpu.decode.DecodedInsts              420105654                       # Number of instructions handled by decode
+system.cpu.decode.IdleCycles                 67048451                       # Number of cycles decode is idle
+system.cpu.decode.RunCycles                  60385094                       # Number of cycles decode is running
+system.cpu.decode.SquashCycles               23161998                       # Number of cycles decode is squashing
+system.cpu.decode.UnblockCycles               5772681                       # Number of cycles decode is unblocking
 system.cpu.fetch.Branches                    25075434                       # Number of branches that fetch encountered
 system.cpu.fetch.CacheLines                  27531173                       # Number of cache lines fetched
 system.cpu.fetch.Cycles                      69569563                       # Number of cycles fetch has run and was not squashing or blocked
@@ -188,8 +188,8 @@ system.cpu.icache.demand_mshr_misses             5384                       # nu
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.icache.occ_%::0                   0.784044                       # Average percentage of cache occupancy
 system.cpu.icache.occ_blocks::0           1605.721886                       # Average occupied blocks per context
+system.cpu.icache.occ_percent::0             0.784044                       # Average percentage of cache occupancy
 system.cpu.icache.overall_accesses           27531173                       # number of overall (read+write) accesses
 system.cpu.icache.overall_avg_miss_latency 25557.221784                       # average overall miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency 22462.481426                       # average overall mshr miss latency
@@ -212,21 +212,13 @@ system.cpu.icache.total_refs                 27524838                       # To
 system.cpu.icache.warmup_cycle                      0                       # Cycle when the warmup percentage was hit.
 system.cpu.icache.writebacks                        0                       # number of writebacks
 system.cpu.idleCycles                           89860                       # Total number of cycles that the CPU has spent unscheduled due to idling
-system.cpu.iew.EXEC:branches                 15858881                       # Number of branches executed
-system.cpu.iew.EXEC:nop                             0                       # number of nop insts executed
-system.cpu.iew.EXEC:rate                     1.303230                       # Inst execution rate
-system.cpu.iew.EXEC:refs                     90240962                       # number of memory reference insts executed
-system.cpu.iew.EXEC:stores                   23196856                       # Number of stores executed
-system.cpu.iew.EXEC:swp                             0                       # number of swp insts executed
-system.cpu.iew.WB:consumers                 371845968                       # num instructions consuming a value
-system.cpu.iew.WB:count                     275965139                       # cumulative count of insts written-back
-system.cpu.iew.WB:fanout                     0.599241                       # average fanout of values written-back
-system.cpu.iew.WB:penalized                         0                       # number of instrctions required to write to 'other' IQ
-system.cpu.iew.WB:penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
-system.cpu.iew.WB:producers                 222825226                       # num instructions producing a value
-system.cpu.iew.WB:rate                       1.292148                       # insts written-back per cycle
-system.cpu.iew.WB:sent                      277010234                       # cumulative count of insts sent to commit
 system.cpu.iew.branchMispredicts              3274274                       # Number of branch mispredicts detected at execute
+system.cpu.iew.exec_branches                 15858881                       # Number of branches executed
+system.cpu.iew.exec_nop                             0                       # number of nop insts executed
+system.cpu.iew.exec_rate                     1.303230                       # Inst execution rate
+system.cpu.iew.exec_refs                     90240962                       # number of memory reference insts executed
+system.cpu.iew.exec_stores                   23196856                       # Number of stores executed
+system.cpu.iew.exec_swp                             0                       # number of swp insts executed
 system.cpu.iew.iewBlockCycles                  536838                       # Number of cycles IEW is blocking
 system.cpu.iew.iewDispLoadInsts             104995800                       # Number of dispatched load instructions
 system.cpu.iew.iewDispNonSpecInsts               1427                       # Number of dispatched non-speculative instructions
@@ -254,103 +246,93 @@ system.cpu.iew.lsq.thread.0.squashedStores     16601009                       #
 system.cpu.iew.memOrderViolationEvents          35659                       # Number of memory order violations
 system.cpu.iew.predictedNotTakenIncorrect       741660                       # Number of branches that were predicted not taken incorrectly
 system.cpu.iew.predictedTakenIncorrect        2532614                       # Number of branches that were predicted taken incorrectly
+system.cpu.iew.wb_consumers                 371845968                       # num instructions consuming a value
+system.cpu.iew.wb_count                     275965139                       # cumulative count of insts written-back
+system.cpu.iew.wb_fanout                     0.599241                       # average fanout of values written-back
+system.cpu.iew.wb_penalized                         0                       # number of instrctions required to write to 'other' IQ
+system.cpu.iew.wb_penalized_rate                    0                       # fraction of instructions written-back that wrote to 'other' IQ
+system.cpu.iew.wb_producers                 222825226                       # num instructions producing a value
+system.cpu.iew.wb_rate                       1.292148                       # insts written-back per cycle
+system.cpu.iew.wb_sent                      277010234                       # cumulative count of insts sent to commit
 system.cpu.int_regfile_reads                516469209                       # number of integer regfile reads
 system.cpu.int_regfile_writes               283974364                       # number of integer regfile writes
 system.cpu.ipc                               1.036486                       # IPC: Instructions Per Cycle
 system.cpu.ipc_total                         1.036486                       # IPC: Total IPC of All Threads
-system.cpu.iq.ISSUE:FU_type_0::No_OpClass      1200408      0.43%      0.43% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntAlu       187079024     66.38%     66.80% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntMult              0      0.00%     66.80% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IntDiv               0      0.00%     66.80% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatAdd       1589764      0.56%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatCmp             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatCvt             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatMult            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatDiv             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::FloatSqrt            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAdd              0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAddAcc            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdAlu              0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdCmp              0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdCvt              0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMisc             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMult             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdMultAcc            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdShift            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdShiftAcc            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdSqrt             0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatAdd            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatAlu            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatCmp            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatCvt            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatDiv            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMisc            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMult            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatMultAcc            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::SimdFloatSqrt            0      0.00%     67.37% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::MemRead       68461114     24.29%     91.66% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::MemWrite      23516361      8.34%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::IprAccess            0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::InstPrefetch            0      0.00%    100.00% # Type of FU issued
-system.cpu.iq.ISSUE:FU_type_0::total        281846671                       # Type of FU issued
-system.cpu.iq.ISSUE:fu_busy_cnt               2813875                       # FU busy when requested
-system.cpu.iq.ISSUE:fu_busy_rate             0.009984                       # FU busy rate (busy events/executed inst)
-system.cpu.iq.ISSUE:fu_full::No_OpClass             0      0.00%      0.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntAlu             68222      2.42%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntMult                0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IntDiv                 0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatAdd               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatCmp               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatCvt               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatMult              0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatDiv               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::FloatSqrt              0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAdd                0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAddAcc             0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdAlu                0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdCmp                0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdCvt                0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMisc               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMult               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdMultAcc            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdShift              0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdShiftAcc            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdSqrt               0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatAdd            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatAlu            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatCmp            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatCvt            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatDiv            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMisc            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMult            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatMultAcc            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::SimdFloatSqrt            0      0.00%      2.42% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::MemRead          2379596     84.57%     86.99% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::MemWrite          366057     13.01%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::IprAccess              0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:fu_full::InstPrefetch            0      0.00%    100.00% # attempts to use FU when none available
-system.cpu.iq.ISSUE:issued_per_cycle::samples    213480903                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::mean     1.320243                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::stdev     1.372505                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::underflows            0      0.00%      0.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::0      72600816     34.01%     34.01% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::1      65586069     30.72%     64.73% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::2      36613512     17.15%     81.88% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::3      20576315      9.64%     91.52% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::4      12054901      5.65%     97.17% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::5       3944773      1.85%     99.01% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::6       1483005      0.69%     99.71% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::7        508962      0.24%     99.95% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::8        112550      0.05%    100.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::overflows            0      0.00%    100.00% # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::min_value            0                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::max_value            8                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:issued_per_cycle::total    213480903                       # Number of insts issued each cycle
-system.cpu.iq.ISSUE:rate                     1.319688                       # Inst issue rate
+system.cpu.iq.FU_type_0::No_OpClass           1200408      0.43%      0.43% # Type of FU issued
+system.cpu.iq.FU_type_0::IntAlu             187079024     66.38%     66.80% # Type of FU issued
+system.cpu.iq.FU_type_0::IntMult                    0      0.00%     66.80% # Type of FU issued
+system.cpu.iq.FU_type_0::IntDiv                     0      0.00%     66.80% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatAdd             1589764      0.56%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatCmp                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatCvt                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatMult                  0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatDiv                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::FloatSqrt                  0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAdd                    0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAddAcc                 0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdAlu                    0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdCmp                    0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdCvt                    0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMisc                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMult                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdMultAcc                0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdShift                  0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdShiftAcc               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdSqrt                   0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatAdd               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatAlu               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatCmp               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatCvt               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatDiv               0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMisc              0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMult              0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatMultAcc            0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::SimdFloatSqrt              0      0.00%     67.37% # Type of FU issued
+system.cpu.iq.FU_type_0::MemRead             68461114     24.29%     91.66% # Type of FU issued
+system.cpu.iq.FU_type_0::MemWrite            23516361      8.34%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::IprAccess                  0      0.00%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::InstPrefetch               0      0.00%    100.00% # Type of FU issued
+system.cpu.iq.FU_type_0::total              281846671                       # Type of FU issued
 system.cpu.iq.fp_alu_accesses                 2636909                       # Number of floating point alu accesses
 system.cpu.iq.fp_inst_queue_reads             5233833                       # Number of floating instruction queue reads
 system.cpu.iq.fp_inst_queue_wakeup_accesses      2531388                       # Number of floating instruction queue wakeup accesses
 system.cpu.iq.fp_inst_queue_writes            5663526                       # Number of floating instruction queue writes
+system.cpu.iq.fu_busy_cnt                     2813875                       # FU busy when requested
+system.cpu.iq.fu_busy_rate                   0.009984                       # FU busy rate (busy events/executed inst)
+system.cpu.iq.fu_full::No_OpClass                   0      0.00%      0.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntAlu                   68222      2.42%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntMult                      0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::IntDiv                       0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatAdd                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCmp                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatCvt                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatMult                    0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatDiv                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::FloatSqrt                    0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAdd                      0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAddAcc                   0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdAlu                      0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCmp                      0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdCvt                      0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMisc                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMult                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdMultAcc                  0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShift                    0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdShiftAcc                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdSqrt                     0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAdd                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatAlu                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCmp                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatCvt                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatDiv                 0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMisc                0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMult                0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatMultAcc             0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::SimdFloatSqrt                0      0.00%      2.42% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemRead                2379596     84.57%     86.99% # attempts to use FU when none available
+system.cpu.iq.fu_full::MemWrite                366057     13.01%    100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::IprAccess                    0      0.00%    100.00% # attempts to use FU when none available
+system.cpu.iq.fu_full::InstPrefetch                 0      0.00%    100.00% # attempts to use FU when none available
 system.cpu.iq.int_alu_accesses              280823229                       # Number of integer alu accesses
 system.cpu.iq.int_inst_queue_reads          774810101                       # Number of integer instruction queue reads
 system.cpu.iq.int_inst_queue_wakeup_accesses    273433751                       # Number of integer instruction queue wakeup accesses
@@ -362,6 +344,24 @@ system.cpu.iq.iqSquashedInstsExamined       174039946                       # Nu
 system.cpu.iq.iqSquashedInstsIssued             55814                       # Number of squashed instructions issued
 system.cpu.iq.iqSquashedNonSpecRemoved            181                       # Number of squashed non-spec instructions that were removed
 system.cpu.iq.iqSquashedOperandsExamined    358439815                       # Number of squashed operands that are examined and possibly removed from graph
+system.cpu.iq.issued_per_cycle::samples     213480903                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::mean         1.320243                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::stdev        1.372505                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::underflows            0      0.00%      0.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0            72600816     34.01%     34.01% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1            65586069     30.72%     64.73% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2            36613512     17.15%     81.88% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3            20576315      9.64%     91.52% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::4            12054901      5.65%     97.17% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::5             3944773      1.85%     99.01% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::6             1483005      0.69%     99.71% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::7              508962      0.24%     99.95% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::8              112550      0.05%    100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::overflows            0      0.00%    100.00% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::min_value            0                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::max_value            8                       # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::total       213480903                       # Number of insts issued each cycle
+system.cpu.iq.rate                           1.319688                       # Inst issue rate
 system.cpu.l2cache.ReadExReq_accesses            1567                       # number of ReadExReq accesses(hits+misses)
 system.cpu.l2cache.ReadExReq_avg_miss_latency 34548.046124                       # average ReadExReq miss latency
 system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency 31351.697630                       # average ReadExReq mshr miss latency
@@ -413,10 +413,10 @@ system.cpu.l2cache.demand_mshr_misses            5223                       # nu
 system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
 system.cpu.l2cache.mshr_cap_events                  0                       # number of times MSHR cap was activated
 system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
-system.cpu.l2cache.occ_%::0                  0.074157                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_%::1                  0.000031                       # Average percentage of cache occupancy
 system.cpu.l2cache.occ_blocks::0          2429.985932                       # Average occupied blocks per context
 system.cpu.l2cache.occ_blocks::1             1.014854                       # Average occupied blocks per context
+system.cpu.l2cache.occ_percent::0            0.074157                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::1            0.000031                       # Average percentage of cache occupancy
 system.cpu.l2cache.overall_accesses              7335                       # number of overall (read+write) accesses
 system.cpu.l2cache.overall_avg_miss_latency 34369.136512                       # average overall miss latency
 system.cpu.l2cache.overall_avg_mshr_miss_latency 31135.171357                       # average overall mshr miss latency
@@ -447,27 +447,27 @@ system.cpu.misc_regfile_writes                    844                       # nu
 system.cpu.numCycles                        213570763                       # number of cpu cycles simulated
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
-system.cpu.rename.RENAME:BlockCycles         18060003                       # Number of cycles rename is blocking
-system.cpu.rename.RENAME:CommittedMaps      234363409                       # Number of HB maps that are committed
-system.cpu.rename.RENAME:IQFullEvents        21564374                       # Number of times rename has blocked due to IQ full
-system.cpu.rename.RENAME:IdleCycles          74887260                       # Number of cycles rename is idle
-system.cpu.rename.RENAME:LSQFullEvents       16382604                       # Number of times rename has blocked due to LSQ full
-system.cpu.rename.RENAME:RenameLookups     1054491347                       # Number of register rename lookups that rename has made
-system.cpu.rename.RENAME:RenamedInsts       409882715                       # Number of instructions processed by rename
-system.cpu.rename.RENAME:RenamedOperands    430914543                       # Number of destination operands rename has renamed
-system.cpu.rename.RENAME:RunCycles           57380379                       # Number of cycles rename is running
-system.cpu.rename.RENAME:SquashCycles        23161998                       # Number of cycles rename is squashing
-system.cpu.rename.RENAME:UnblockCycles       39968831                       # Number of cycles rename is unblocking
-system.cpu.rename.RENAME:UndoneMaps         196551134                       # Number of HB maps that are undone due to squashing
-system.cpu.rename.RENAME:fp_rename_lookups     11087102                       # Number of floating rename lookups
-system.cpu.rename.RENAME:int_rename_lookups   1043404245                       # Number of integer rename lookups
-system.cpu.rename.RENAME:serializeStallCycles        22432                       # count of cycles rename stalled for serializing inst
-system.cpu.rename.RENAME:serializingInsts         1444                       # count of serializing insts renamed
-system.cpu.rename.RENAME:skidInsts           83221554                       # count of insts added to the skid buffer
-system.cpu.rename.RENAME:tempSerializingInsts         1312                       # count of temporary serializing insts renamed
+system.cpu.rename.BlockCycles                18060003                       # Number of cycles rename is blocking
+system.cpu.rename.CommittedMaps             234363409                       # Number of HB maps that are committed
+system.cpu.rename.IQFullEvents               21564374                       # Number of times rename has blocked due to IQ full
+system.cpu.rename.IdleCycles                 74887260                       # Number of cycles rename is idle
+system.cpu.rename.LSQFullEvents              16382604                       # Number of times rename has blocked due to LSQ full
+system.cpu.rename.RenameLookups            1054491347                       # Number of register rename lookups that rename has made
+system.cpu.rename.RenamedInsts              409882715                       # Number of instructions processed by rename
+system.cpu.rename.RenamedOperands           430914543                       # Number of destination operands rename has renamed
+system.cpu.rename.RunCycles                  57380379                       # Number of cycles rename is running
+system.cpu.rename.SquashCycles               23161998                       # Number of cycles rename is squashing
+system.cpu.rename.UnblockCycles              39968831                       # Number of cycles rename is unblocking
+system.cpu.rename.UndoneMaps                196551134                       # Number of HB maps that are undone due to squashing
+system.cpu.rename.fp_rename_lookups          11087102                       # Number of floating rename lookups
+system.cpu.rename.int_rename_lookups       1043404245                       # Number of integer rename lookups
+system.cpu.rename.serializeStallCycles          22432                       # count of cycles rename stalled for serializing inst
+system.cpu.rename.serializingInsts               1444                       # count of serializing insts renamed
+system.cpu.rename.skidInsts                  83221554                       # count of insts added to the skid buffer
+system.cpu.rename.tempSerializingInsts           1312                       # count of temporary serializing insts renamed
 system.cpu.rob.rob_reads                    583734688                       # The number of ROB reads
 system.cpu.rob.rob_writes                   814640460                       # The number of ROB writes
 system.cpu.timesIdled                            1934                       # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.workload.PROG:num_syscalls             400                       # Number of system calls
+system.cpu.workload.num_syscalls                  400                       # Number of system calls
 
 ---------- End Simulation Statistics   ----------