Update stats for new single bad-address responder.

Mostly just config.ini updates, though the different response
latency for bad addresses caused very minor timing changes
in the O3 Linux boot tests.

18 files changed, 71 insertions, 87 deletions

diff --git a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
index 7120f53fd..f62e1fe85 100644
--- a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini
@@ -104,11 +104,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -277,11 +276,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -313,11 +311,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -356,12 +353,12 @@ type=ExeTracer
 [system.cpu.workload]
 type=LiveProcess
 cmd=twolf smred
-cwd=build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing
+cwd=build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing
 egid=100
 env=
 errout=cerr
 euid=100
-executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/twolf
+executable=/dist/m5/cpu2000/binaries/alpha/tru64/twolf
 gid=100
 input=cin
 max_stack_size=67108864
diff --git a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout
index 9b3fabe8e..e5f5aca9e 100755
--- a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr 14 2009 23:40:03
-M5 revision 4208b24ee3ad 6033 default qtip tip new-thread-status-stats-update
-M5 started Apr 14 2009 23:40:05
-M5 executing on phenom
-command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/opt/long/70.twolf/alpha/tru64/o3-timing
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 17:02:55
+M5 executing on zizzer
+command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/o3-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 info: Increasing stack size by one page.
diff --git a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt
index dce6864cd..af7bb24bb 100644
--- a/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 160619                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 212880                       # Number of bytes of host memory used
-host_seconds                                   524.10                       # Real time elapsed on the host
-host_tick_rate                               77883837                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 199037                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 209432                       # Number of bytes of host memory used
+host_seconds                                   422.94                       # Real time elapsed on the host
+host_tick_rate                               96512612                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    84179709                       # Number of instructions simulated
 sim_seconds                                  0.040819                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout
index 68a75cbd9..76511d754 100755
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr  8 2009 12:36:46
-M5 executing on maize
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 16:51:42
+M5 executing on zizzer
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
index bf89ff397..b041df4e4 100644
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                5529646                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 202292                       # Number of bytes of host memory used
-host_seconds                                    16.62                       # Real time elapsed on the host
-host_tick_rate                             2764786682                       # Simulator tick rate (ticks/s)
+host_inst_rate                                5612458                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 200556                       # Number of bytes of host memory used
+host_seconds                                    16.38                       # Real time elapsed on the host
+host_tick_rate                             2806199168                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    91903056                       # Number of instructions simulated
 sim_seconds                                  0.045952                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
index 2164626a2..7b97859d0 100644
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini
@@ -40,11 +40,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -76,11 +75,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -112,11 +110,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=10000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout
index 24227ac66..977b57eee 100755
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr  8 2009 12:33:56
-M5 executing on maize
+M5 compiled Apr 21 2009 16:38:39
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 16:51:59
+M5 executing on zizzer
 command line: build/ALPHA_SE/m5.fast -d build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-timing -re tests/run.py build/ALPHA_SE/tests/fast/long/70.twolf/alpha/tru64/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
index e5dfef14d..369af5305 100644
--- a/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
+++ b/tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                2783619                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 209832                       # Number of bytes of host memory used
-host_seconds                                    33.02                       # Real time elapsed on the host
-host_tick_rate                             3596666384                       # Simulator tick rate (ticks/s)
+host_inst_rate                                2784324                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 208188                       # Number of bytes of host memory used
+host_seconds                                    33.01                       # Real time elapsed on the host
+host_tick_rate                             3597581254                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    91903056                       # Number of instructions simulated
 sim_seconds                                  0.118747                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout
index bcecb77e1..473c9fb4d 100755
--- a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr  8 2009 12:32:55
-M5 executing on maize
+M5 compiled Apr 21 2009 18:04:32
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 18:14:36
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic -re tests/run.py build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-atomic
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
index 2a0d5ef75..a32d620ce 100644
--- a/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                3173092                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 204068                       # Number of bytes of host memory used
-host_seconds                                    60.96                       # Real time elapsed on the host
-host_tick_rate                             1586549351                       # Simulator tick rate (ticks/s)
+host_inst_rate                                2403614                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 202316                       # Number of bytes of host memory used
+host_seconds                                    80.48                       # Real time elapsed on the host
+host_tick_rate                             1201810632                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   193444769                       # Number of instructions simulated
 sim_seconds                                  0.096723                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
index 1c4d82608..d52807b10 100644
--- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini
@@ -40,11 +40,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -76,11 +75,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -112,11 +110,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=10000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/simout b/tests/long/70.twolf/ref/sparc/linux/simple-timing/simout
index bc529416a..ac7620094 100755
--- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/simout
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/simout
@@ -5,10 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  8 2009 12:30:02
-M5 revision 233a4a1a6110 6024 default qtip tip test_unifytlb.diff
-M5 started Apr  8 2009 12:31:47
-M5 executing on maize
+M5 compiled Apr 21 2009 18:04:32
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 18:07:46
+M5 executing on zizzer
 command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing -re tests/run.py build/SPARC_SE/tests/fast/long/70.twolf/sparc/linux/simple-timing
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt
index 1993c7752..c019fdbed 100644
--- a/tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1944755                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 211604                       # Number of bytes of host memory used
-host_seconds                                    99.47                       # Real time elapsed on the host
-host_tick_rate                             2720193548                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1335116                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 209936                       # Number of bytes of host memory used
+host_seconds                                   144.89                       # Real time elapsed on the host
+host_tick_rate                             1867472873                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   193444769                       # Number of instructions simulated
 sim_seconds                                  0.270578                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/x86/linux/simple-atomic/simout b/tests/long/70.twolf/ref/x86/linux/simple-atomic/simout
index 839d47ddf..cc9142f47 100755
--- a/tests/long/70.twolf/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/70.twolf/ref/x86/linux/simple-atomic/simout
@@ -5,13 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr 12 2009 13:26:17
-M5 revision 8c874c02878a 6042 default qtip tip cpuidfixstats.patch
-M5 started Apr 12 2009 13:27:47
-M5 executing on tater
+M5 compiled Apr 21 2009 19:00:07
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 19:52:32
+M5 executing on zizzer
 command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic -re tests/run.py build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic
-Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic/smred.sav
-Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-atomic/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
diff --git a/tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt
index ffa74eb22..0e46be9eb 100644
--- a/tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1002077                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 204648                       # Number of bytes of host memory used
-host_seconds                                   218.14                       # Real time elapsed on the host
-host_tick_rate                              595983507                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1749933                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 205336                       # Number of bytes of host memory used
+host_seconds                                   124.92                       # Real time elapsed on the host
+host_tick_rate                             1040768333                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   218595312                       # Number of instructions simulated
 sim_seconds                                  0.130009                       # Number of seconds simulated
diff --git a/tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini b/tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini
index 8b6664da9..04e429e1e 100644
--- a/tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini
+++ b/tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini
@@ -40,11 +40,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -76,11 +75,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=1000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
@@ -112,11 +110,10 @@ type=BaseCache
 addr_range=0:18446744073709551615
 assoc=2
 block_size=64
-cpu_side_filter_ranges=
+forward_snoops=true
 hash_delay=1
 latency=10000
 max_miss_count=0
-mem_side_filter_ranges=
 mshrs=10
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
diff --git a/tests/long/70.twolf/ref/x86/linux/simple-timing/simout b/tests/long/70.twolf/ref/x86/linux/simple-timing/simout
index 96041e645..c109ece93 100755
--- a/tests/long/70.twolf/ref/x86/linux/simple-timing/simout
+++ b/tests/long/70.twolf/ref/x86/linux/simple-timing/simout
@@ -5,13 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr 12 2009 13:26:17
-M5 revision 8c874c02878a 6042 default qtip tip cpuidfixstats.patch
-M5 started Apr 12 2009 13:27:47
-M5 executing on tater
+M5 compiled Apr 21 2009 19:00:07
+M5 revision e6dd09514462 6117 default qtip tip stats-update
+M5 started Apr 21 2009 19:54:37
+M5 executing on zizzer
 command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-timing -re tests/run.py build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-timing
-Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-timing/smred.sav
-Couldn't unlink  build/X86_SE/tests/fast/long/70.twolf/x86/linux/simple-timing/smred.sv2
 Global frequency set at 1000000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 
diff --git a/tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt
index 01ea14551..558f7df88 100644
--- a/tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 659365                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 212548                       # Number of bytes of host memory used
-host_seconds                                   331.52                       # Real time elapsed on the host
-host_tick_rate                              756945311                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1114702                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 212960                       # Number of bytes of host memory used
+host_seconds                                   196.10                       # Real time elapsed on the host
+host_tick_rate                             1279666495                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                   218595312                       # Number of instructions simulated
 sim_seconds                                  0.250946                       # Number of seconds simulated