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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-01-25 17:19:50 +0000 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-01-25 17:19:50 +0000 |
| commit | a17dbdf8834b84f05a8f5154a74ac819fe8adc7c (patch) | |
| tree | 8761136c790b84e20d6df2e84207eca3c553984b /tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout | |
| parent | bd55c9e2af7fd6c06af48a020c29cb33ba1ca3fc (diff) | |
| download | gem5-a17dbdf8834b84f05a8f5154a74ac819fe8adc7c.tar.xz | |
stats: Update stats for final tick and memory bandwidth patches
Diffstat (limited to 'tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout')
| -rwxr-xr-x | tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout index 6ef01a659..d81b5c20f 100755 --- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout +++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout @@ -1,15 +1,15 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Nov 27 2011 04:34:45 -gem5 started Nov 27 2011 04:35:04 -gem5 executing on chips +gem5 compiled Jan 23 2012 04:05:05 +gem5 started Jan 23 2012 06:26:23 +gem5 executing on zizzer command line: build/SPARC_FS/gem5.opt -d build/SPARC_FS/tests/opt/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC_FS/tests/opt/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic Global frequency set at 2000000000 ticks per second -info: No kernel set for full system simulation. Assuming you know what you're doing... 0: system.t1000.htod: Real-time clock set to Thu Jan 1 00:00:00 2009 0: system.t1000.htod: Real-time clock set to 1230768000 +info: No kernel set for full system simulation. Assuming you know what you're doing... info: Entering event queue @ 0. Starting simulation... info: Ignoring write to SPARC ERROR regsiter info: Ignoring write to SPARC ERROR regsiter |