summaryrefslogtreecommitdiff
path: root/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
committerGabe Black <gblack@eecs.umich.edu>2011-02-07 19:23:13 -0800
commit0851580aada37c8e1b1d2b695100fbcfaf4e0946 (patch)
tree96eea53d6309ddb9f4bfac61767e53bfcdb44037 /tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
parent1b64bfa933745294667158d0ce22180780b2a22e (diff)
downloadgem5-0851580aada37c8e1b1d2b695100fbcfaf4e0946.tar.xz
Stats: Re update stats.
Diffstat (limited to 'tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt')
-rw-r--r--tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt26
1 files changed, 21 insertions, 5 deletions
diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
index 16e4b5160..d05ca1e9f 100644
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 2688852 # Simulator instruction rate (inst/s)
-host_mem_usage 490548 # Number of bytes of host memory used
-host_seconds 829.04 # Real time elapsed on the host
-host_tick_rate 2694420 # Simulator tick rate (ticks/s)
+host_inst_rate 1272725 # Simulator instruction rate (inst/s)
+host_mem_usage 524564 # Number of bytes of host memory used
+host_seconds 1751.49 # Real time elapsed on the host
+host_tick_rate 1275361 # Simulator tick rate (ticks/s)
sim_freq 2000000000 # Frequency of simulated ticks
sim_insts 2229160714 # Number of instructions simulated
sim_seconds 1.116889 # Number of seconds simulated
@@ -13,7 +13,23 @@ system.cpu.kern.inst.arm 0 # nu
system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.numCycles 2233777513 # number of cpu cycles simulated
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+system.cpu.num_busy_cycles 2233777513 # Number of busy cycles
+system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+system.cpu.num_fp_alu_accesses 14608322 # Number of float alu accesses
+system.cpu.num_fp_insts 14608322 # number of float instructions
+system.cpu.num_fp_register_reads 35401841 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 22917558 # number of times the floating registers were written
+system.cpu.num_func_calls 0 # number of times a function call or return occured
+system.cpu.num_idle_cycles 0 # Number of idle cycles
system.cpu.num_insts 2229160714 # Number of instructions executed
-system.cpu.num_refs 547951940 # Number of memory references
+system.cpu.num_int_alu_accesses 1839325658 # Number of integer alu accesses
+system.cpu.num_int_insts 1839325658 # number of integer instructions
+system.cpu.num_int_register_reads 4304894311 # number of times the integer registers were read
+system.cpu.num_int_register_writes 2108336490 # number of times the integer registers were written
+system.cpu.num_load_insts 349807670 # Number of load instructions
+system.cpu.num_mem_refs 547951940 # number of memory refs
+system.cpu.num_store_insts 198144270 # Number of store instructions
---------- End Simulation Statistics ----------