summaryrefslogtreecommitdiff
path: root/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
diff options
context:
space:
mode:
authorKorey Sewell <ksewell@umich.edu>2011-06-12 21:35:03 -0400
committerKorey Sewell <ksewell@umich.edu>2011-06-12 21:35:03 -0400
commit1aa4869ff046d0a039f132de49c8cfe28a6566cf (patch)
tree2523e4e0a795f08bdf506445ff2bf58d2b132544 /tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
parentfb8c95824144d1984539f7a918086f87858ff27d (diff)
downloadgem5-1aa4869ff046d0a039f132de49c8cfe28a6566cf.tar.xz
sparc: update long regressions
Diffstat (limited to 'tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt')
-rw-r--r--tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt40
1 files changed, 20 insertions, 20 deletions
diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
index 3bd8ad178..4b265dc78 100644
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
@@ -1,35 +1,35 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 4668188 # Simulator instruction rate (inst/s)
-host_mem_usage 504368 # Number of bytes of host memory used
-host_seconds 477.52 # Real time elapsed on the host
-host_tick_rate 4677854 # Simulator tick rate (ticks/s)
-sim_freq 2000000000 # Frequency of simulated ticks
-sim_insts 2229160714 # Number of instructions simulated
sim_seconds 1.116889 # Number of seconds simulated
sim_ticks 2233777512 # Number of ticks simulated
-system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.kern.inst.arm 0 # number of arm instructions executed
-system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
-system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+sim_freq 2000000000 # Frequency of simulated ticks
+host_inst_rate 2349387 # Simulator instruction rate (inst/s)
+host_tick_rate 2354253 # Simulator tick rate (ticks/s)
+host_mem_usage 524024 # Number of bytes of host memory used
+host_seconds 948.83 # Real time elapsed on the host
+sim_insts 2229160714 # Number of instructions simulated
system.cpu.numCycles 2233777513 # number of cpu cycles simulated
-system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
-system.cpu.num_busy_cycles 2233777513 # Number of busy cycles
-system.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
-system.cpu.num_fp_alu_accesses 14608322 # Number of float alu accesses
-system.cpu.num_fp_insts 14608322 # number of float instructions
-system.cpu.num_fp_register_reads 35401841 # number of times the floating registers were read
-system.cpu.num_fp_register_writes 22917558 # number of times the floating registers were written
-system.cpu.num_func_calls 0 # number of times a function call or return occured
-system.cpu.num_idle_cycles 0 # Number of idle cycles
+system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.num_insts 2229160714 # Number of instructions executed
system.cpu.num_int_alu_accesses 1839325658 # Number of integer alu accesses
+system.cpu.num_fp_alu_accesses 14608322 # Number of float alu accesses
+system.cpu.num_func_calls 44037246 # number of times a function call or return occured
+system.cpu.num_conditional_control_insts 316367761 # number of instructions that are conditional controls
system.cpu.num_int_insts 1839325658 # number of integer instructions
+system.cpu.num_fp_insts 14608322 # number of float instructions
system.cpu.num_int_register_reads 4304894311 # number of times the integer registers were read
system.cpu.num_int_register_writes 2108336490 # number of times the integer registers were written
-system.cpu.num_load_insts 349807670 # Number of load instructions
+system.cpu.num_fp_register_reads 35401841 # number of times the floating registers were read
+system.cpu.num_fp_register_writes 22917558 # number of times the floating registers were written
system.cpu.num_mem_refs 547951940 # number of memory refs
+system.cpu.num_load_insts 349807670 # Number of load instructions
system.cpu.num_store_insts 198144270 # Number of store instructions
+system.cpu.num_idle_cycles 0 # Number of idle cycles
+system.cpu.num_busy_cycles 2233777513 # Number of busy cycles
+system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0 # Percentage of idle cycles
+system.cpu.kern.inst.arm 0 # number of arm instructions executed
+system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
---------- End Simulation Statistics ----------