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authorNathan Binkert <nate@binkert.org>2008-07-22 17:00:18 -0400
committerNathan Binkert <nate@binkert.org>2008-07-22 17:00:18 -0400
commita8df952dd38cb686c6a795480630649aa51fd894 (patch)
tree380126490f459a4bef6a485cbda2b8efa4ae085e /tests/long/80.solaris-boot
parentaa2bb4f7b9ec571a4430da25173fbb76d1b0c8bb (diff)
downloadgem5-a8df952dd38cb686c6a795480630649aa51fd894.tar.xz
tests: update config.ini and stdout for the various tests.
These files were a bit too out of date and resulted in a bit of confusion.
Diffstat (limited to 'tests/long/80.solaris-boot')
-rw-r--r--tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini37
-rw-r--r--tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout10
2 files changed, 31 insertions, 16 deletions
diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
index 7369c8a0c..2616832f0 100644
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
@@ -65,7 +65,8 @@ max_loads_any_thread=0
phase=0
profile=0
progress_interval=0
-simulate_stalls=false
+simulate_data_stalls=false
+simulate_inst_stalls=false
system=system
tracer=system.cpu.tracer
width=1
@@ -109,6 +110,8 @@ read_only=true
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=133446500352:133446508543
zero=false
port=system.membus.port[7]
@@ -123,6 +126,7 @@ children=responder
block_size=64
bus_id=0
clock=2
+header_cycles=1
responder_set=false
width=64
default=system.iobus.responder.pio
@@ -150,6 +154,7 @@ children=responder
block_size=64
bus_id=1
clock=2
+header_cycles=1
responder_set=false
width=64
default=system.membus.responder.pio
@@ -175,6 +180,8 @@ pio=system.membus.default
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=133429198848:133429207039
zero=false
port=system.membus.port[6]
@@ -183,6 +190,8 @@ port=system.membus.port[6]
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=133445976064:133445984255
zero=false
port=system.membus.port[8]
@@ -191,6 +200,8 @@ port=system.membus.port[8]
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=1048576:68157439
zero=true
port=system.membus.port[3]
@@ -199,6 +210,8 @@ port=system.membus.port[3]
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=2147483648:2415919103
zero=true
port=system.membus.port[4]
@@ -207,13 +220,15 @@ port=system.membus.port[4]
type=PhysicalMemory
file=
latency=1
+latency_var=0
+null=false
range=1099243192320:1099251580927
zero=false
port=system.membus.port[5]
[system.t1000]
type=T1000
-children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hconsole htod hvuart iob pconsole puart0
+children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
intrctrl=system.intrctrl
system=system
@@ -409,12 +424,11 @@ update_data=false
warn_access=
pio=system.iobus.port[10]
-[system.t1000.hconsole]
-type=SimConsole
-append_name=true
+[system.t1000.hterm]
+type=Terminal
intr_control=system.intrctrl
number=0
-output=console
+output=true
port=3456
[system.t1000.htod]
@@ -431,8 +445,8 @@ type=Uart8250
pio_addr=1099255955456
pio_latency=2
platform=system.t1000
-sim_console=system.t1000.hconsole
system=system
+terminal=system.t1000.hterm
pio=system.iobus.port[13]
[system.t1000.iob]
@@ -442,12 +456,11 @@ platform=system.t1000
system=system
pio=system.membus.port[0]
-[system.t1000.pconsole]
-type=SimConsole
-append_name=true
+[system.t1000.pterm]
+type=Terminal
intr_control=system.intrctrl
number=0
-output=console
+output=true
port=3456
[system.t1000.puart0]
@@ -455,7 +468,7 @@ type=Uart8250
pio_addr=133412421632
pio_latency=2
platform=system.t1000
-sim_console=system.t1000.pconsole
system=system
+terminal=system.t1000.pterm
pio=system.iobus.port[12]
diff --git a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
index 4c8cf9392..78a121c17 100644
--- a/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
+++ b/tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout
@@ -1,13 +1,15 @@
M5 Simulator System
-Copyright (c) 2001-2006
+Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Aug 21 2007 14:42:25
-M5 started Tue Aug 21 14:44:56 2007
-M5 executing on nacho
+M5 compiled Jul 21 2008 20:41:45
+M5 started Mon Jul 21 20:41:46 2008
+M5 executing on zizzer
+M5 revision 5508:992aeed1374332d0933a68d1f1fe749e2fec0881
+M5 commit date Tue Jul 15 14:38:51 2008 -0400
command line: build/SPARC_FS/m5.fast -d build/SPARC_FS/tests/fast/long/80.solaris-boot/sparc/solaris/t1000-simple-atomic tests/run.py long/80.solaris-boot/sparc/solaris/t1000-simple-atomic
Global frequency set at 2000000000 ticks per second
Exiting @ tick 2233777512 because m5_exit instruction encountered