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authorAli Saidi <Ali.Saidi@ARM.com>2013-04-22 13:20:33 -0400
committerAli Saidi <Ali.Saidi@ARM.com>2013-04-22 13:20:33 -0400
commitd69f904a18593f75efcb0555b2bd092574181160 (patch)
tree0afd4c3ec943f0166c70bf7b62215f404465da2f /tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
parent33ab8f735d0979ef68d7202d3adbf28f1ae2aceb (diff)
downloadgem5-d69f904a18593f75efcb0555b2bd092574181160.tar.xz
stats: Update stats for O3 switching fix.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt')
-rw-r--r--tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt3245
1 files changed, 1620 insertions, 1625 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
index e142ab1e4..56627054e 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
@@ -1,134 +1,134 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 1.900728 # Number of seconds simulated
-sim_ticks 1900727697500 # Number of ticks simulated
-final_tick 1900727697500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 1.896442 # Number of seconds simulated
+sim_ticks 1896441913500 # Number of ticks simulated
+final_tick 1896441913500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 95395 # Simulator instruction rate (inst/s)
-host_op_rate 95395 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3185234659 # Simulator tick rate (ticks/s)
-host_mem_usage 355712 # Number of bytes of host memory used
-host_seconds 596.73 # Real time elapsed on the host
-sim_insts 56925219 # Number of instructions simulated
-sim_ops 56925219 # Number of ops (including micro ops) simulated
-system.physmem.bytes_read::cpu0.inst 854208 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu0.data 24595840 # Number of bytes read from this memory
-system.physmem.bytes_read::tsunami.ide 2651904 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu1.inst 123328 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu1.data 541952 # Number of bytes read from this memory
-system.physmem.bytes_read::total 28767232 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu0.inst 854208 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::cpu1.inst 123328 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 977536 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 7730048 # Number of bytes written to this memory
-system.physmem.bytes_written::total 7730048 # Number of bytes written to this memory
-system.physmem.num_reads::cpu0.inst 13347 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu0.data 384310 # Number of read requests responded to by this memory
-system.physmem.num_reads::tsunami.ide 41436 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu1.inst 1927 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu1.data 8468 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 449488 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 120782 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 120782 # Number of write requests responded to by this memory
-system.physmem.bw_read::cpu0.inst 449411 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu0.data 12940223 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::tsunami.ide 1395205 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.inst 64885 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu1.data 285129 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 15134852 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu0.inst 449411 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu1.inst 64885 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 514296 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 4066889 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 4066889 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 4066889 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.inst 449411 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu0.data 12940223 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::tsunami.ide 1395205 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu1.inst 64885 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu1.data 285129 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 19201740 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 449488 # Total number of read requests seen
-system.physmem.writeReqs 120782 # Total number of write requests seen
-system.physmem.cpureqs 575881 # Reqs generatd by CPU via cache - shady
-system.physmem.bytesRead 28767232 # Total number of bytes read from memory
-system.physmem.bytesWritten 7730048 # Total number of bytes written to memory
-system.physmem.bytesConsumedRd 28767232 # bytesRead derated as per pkt->getSize()
-system.physmem.bytesConsumedWr 7730048 # bytesWritten derated as per pkt->getSize()
-system.physmem.servicedByWrQ 76 # Number of read reqs serviced by write Q
-system.physmem.neitherReadNorWrite 5601 # Reqs where no action is needed
-system.physmem.perBankRdReqs::0 28386 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::1 28227 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::2 28192 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::3 27982 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::4 28465 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::5 28241 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::6 28220 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::7 28022 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::8 28087 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::9 28039 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::10 28071 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::11 27938 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::12 27835 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::13 28000 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::14 27859 # Track reads on a per bank basis
-system.physmem.perBankRdReqs::15 27848 # Track reads on a per bank basis
-system.physmem.perBankWrReqs::0 7821 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::1 7706 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::2 7703 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::3 7519 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::4 7864 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::5 7579 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::6 7606 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::7 7518 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::8 7651 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::9 7586 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::10 7578 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::11 7350 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::12 7241 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::13 7443 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::14 7270 # Track writes on a per bank basis
-system.physmem.perBankWrReqs::15 7347 # Track writes on a per bank basis
+host_inst_rate 132187 # Simulator instruction rate (inst/s)
+host_op_rate 132187 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 4418345683 # Simulator tick rate (ticks/s)
+host_mem_usage 311512 # Number of bytes of host memory used
+host_seconds 429.22 # Real time elapsed on the host
+sim_insts 56737124 # Number of instructions simulated
+sim_ops 56737124 # Number of ops (including micro ops) simulated
+system.physmem.bytes_read::cpu0.inst 937984 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu0.data 24915648 # Number of bytes read from this memory
+system.physmem.bytes_read::tsunami.ide 2650688 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu1.inst 39872 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu1.data 337088 # Number of bytes read from this memory
+system.physmem.bytes_read::total 28881280 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu0.inst 937984 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::cpu1.inst 39872 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 977856 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 7850944 # Number of bytes written to this memory
+system.physmem.bytes_written::total 7850944 # Number of bytes written to this memory
+system.physmem.num_reads::cpu0.inst 14656 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu0.data 389307 # Number of read requests responded to by this memory
+system.physmem.num_reads::tsunami.ide 41417 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu1.inst 623 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu1.data 5267 # Number of read requests responded to by this memory
+system.physmem.num_reads::total 451270 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 122671 # Number of write requests responded to by this memory
+system.physmem.num_writes::total 122671 # Number of write requests responded to by this memory
+system.physmem.bw_read::cpu0.inst 494602 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu0.data 13138102 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::tsunami.ide 1397716 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu1.inst 21025 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu1.data 177748 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 15229193 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu0.inst 494602 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu1.inst 21025 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 515627 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 4139828 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 4139828 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 4139828 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.inst 494602 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu0.data 13138102 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::tsunami.ide 1397716 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu1.inst 21025 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu1.data 177748 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 19369021 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 451270 # Total number of read requests seen
+system.physmem.writeReqs 122671 # Total number of write requests seen
+system.physmem.cpureqs 578881 # Reqs generatd by CPU via cache - shady
+system.physmem.bytesRead 28881280 # Total number of bytes read from memory
+system.physmem.bytesWritten 7850944 # Total number of bytes written to memory
+system.physmem.bytesConsumedRd 28881280 # bytesRead derated as per pkt->getSize()
+system.physmem.bytesConsumedWr 7850944 # bytesWritten derated as per pkt->getSize()
+system.physmem.servicedByWrQ 67 # Number of read reqs serviced by write Q
+system.physmem.neitherReadNorWrite 4936 # Reqs where no action is needed
+system.physmem.perBankRdReqs::0 28286 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::1 28331 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::2 28232 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::3 28037 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::4 28769 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::5 28511 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::6 28476 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::7 28312 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::8 28256 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::9 28154 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::10 28207 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::11 27864 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::12 27902 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::13 28010 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::14 27813 # Track reads on a per bank basis
+system.physmem.perBankRdReqs::15 28043 # Track reads on a per bank basis
+system.physmem.perBankWrReqs::0 7715 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::1 7756 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::2 7743 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::3 7541 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::4 8184 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::5 7906 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::6 7897 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::7 7828 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::8 7761 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::9 7702 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::10 7706 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::11 7342 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::12 7423 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::13 7442 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::14 7221 # Track writes on a per bank basis
+system.physmem.perBankWrReqs::15 7504 # Track writes on a per bank basis
system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry
-system.physmem.numWrRetry 10 # Number of times wr buffer was full causing retry
-system.physmem.totGap 1900723138000 # Total gap between requests
+system.physmem.numWrRetry 4 # Number of times wr buffer was full causing retry
+system.physmem.totGap 1896440622000 # Total gap between requests
system.physmem.readPktSize::0 0 # Categorize read packet sizes
system.physmem.readPktSize::1 0 # Categorize read packet sizes
system.physmem.readPktSize::2 0 # Categorize read packet sizes
system.physmem.readPktSize::3 0 # Categorize read packet sizes
system.physmem.readPktSize::4 0 # Categorize read packet sizes
system.physmem.readPktSize::5 0 # Categorize read packet sizes
-system.physmem.readPktSize::6 449488 # Categorize read packet sizes
+system.physmem.readPktSize::6 451270 # Categorize read packet sizes
system.physmem.writePktSize::0 0 # Categorize write packet sizes
system.physmem.writePktSize::1 0 # Categorize write packet sizes
system.physmem.writePktSize::2 0 # Categorize write packet sizes
system.physmem.writePktSize::3 0 # Categorize write packet sizes
system.physmem.writePktSize::4 0 # Categorize write packet sizes
system.physmem.writePktSize::5 0 # Categorize write packet sizes
-system.physmem.writePktSize::6 120782 # Categorize write packet sizes
-system.physmem.rdQLenPdf::0 319759 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1 59264 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 32659 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3 7637 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::4 3173 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::5 2957 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::6 2688 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::7 2676 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::8 2637 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::9 2595 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::10 1524 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::11 1455 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::12 1415 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::13 1369 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::14 1353 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::15 1389 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::16 1622 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::17 1546 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::18 914 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::19 762 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::20 14 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::21 4 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
+system.physmem.writePktSize::6 122671 # Categorize write packet sizes
+system.physmem.rdQLenPdf::0 320077 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1 59739 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 33398 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3 7716 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::4 3200 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::5 2984 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::6 2709 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::7 2710 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::8 2673 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::9 2618 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::10 1536 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::11 1465 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::12 1405 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::13 1359 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::14 1357 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::15 1405 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::16 1629 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::17 1501 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::18 921 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::19 776 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::20 16 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::21 8 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::22 1 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
@@ -138,224 +138,224 @@ system.physmem.rdQLenPdf::28 0 # Wh
system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
-system.physmem.wrQLenPdf::0 3169 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::1 3807 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::2 4327 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::3 4374 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::4 4886 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::5 5229 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::6 5235 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::7 5236 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::8 5239 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::9 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::10 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::11 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::12 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::13 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::14 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::15 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::16 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::17 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::18 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::19 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::20 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::21 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::22 5251 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::23 2083 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::24 1445 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::25 925 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::26 878 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::27 366 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::28 23 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::29 17 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::30 16 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::31 13 # What write queue length does an incoming req see
-system.physmem.totQLat 7717714750 # Total cycles spent in queuing delays
-system.physmem.totMemAccLat 15508692250 # Sum of mem lat for all requests
-system.physmem.totBusLat 2247060000 # Total cycles spent in databus access
-system.physmem.totBankLat 5543917500 # Total cycles spent in bank access
-system.physmem.avgQLat 17172.92 # Average queueing delay per request
-system.physmem.avgBankLat 12335.94 # Average bank access latency per request
+system.physmem.wrQLenPdf::0 3224 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::1 3863 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::2 4392 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::3 4442 # What write queue length does an incoming req see
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system.iocache.overall_mshr_miss_rate::total 1 # mshr miss rate for overall accesses
-system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 68755.581006 # average ReadReq mshr miss latency
-system.iocache.ReadReq_avg_mshr_miss_latency::total 68755.581006 # average ReadReq mshr miss latency
-system.iocache.WriteReq_avg_mshr_miss_latency::tsunami.ide 204207.731686 # average WriteReq mshr miss latency
-system.iocache.WriteReq_avg_mshr_miss_latency::total 204207.731686 # average WriteReq mshr miss latency
-system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 203626.726319 # average overall mshr miss latency
-system.iocache.demand_avg_mshr_miss_latency::total 203626.726319 # average overall mshr miss latency
-system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 203626.726319 # average overall mshr miss latency
-system.iocache.overall_avg_mshr_miss_latency::total 203626.726319 # average overall mshr miss latency
+system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 68926.718391 # average ReadReq mshr miss latency
+system.iocache.ReadReq_avg_mshr_miss_latency::total 68926.718391 # average ReadReq mshr miss latency
+system.iocache.WriteReq_avg_mshr_miss_latency::tsunami.ide 203875.852522 # average WriteReq mshr miss latency
+system.iocache.WriteReq_avg_mshr_miss_latency::total 203875.852522 # average WriteReq mshr miss latency
+system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 203313.106289 # average overall mshr miss latency
+system.iocache.demand_avg_mshr_miss_latency::total 203313.106289 # average overall mshr miss latency
+system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 203313.106289 # average overall mshr miss latency
+system.iocache.overall_avg_mshr_miss_latency::total 203313.106289 # average overall mshr miss latency
system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
@@ -597,35 +597,35 @@ system.disk2.dma_read_txs 0 # Nu
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
-system.cpu0.branchPred.lookups 12035820 # Number of BP lookups
-system.cpu0.branchPred.condPredicted 10146181 # Number of conditional branches predicted
-system.cpu0.branchPred.condIncorrect 320311 # Number of conditional branches incorrect
-system.cpu0.branchPred.BTBLookups 7799891 # Number of BTB lookups
-system.cpu0.branchPred.BTBHits 5138186 # Number of BTB hits
+system.cpu0.branchPred.lookups 12584062 # Number of BP lookups
+system.cpu0.branchPred.condPredicted 10588139 # Number of conditional branches predicted
+system.cpu0.branchPred.condIncorrect 341886 # Number of conditional branches incorrect
+system.cpu0.branchPred.BTBLookups 8301483 # Number of BTB lookups
+system.cpu0.branchPred.BTBHits 5323497 # Number of BTB hits
system.cpu0.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu0.branchPred.BTBHitPct 65.875100 # BTB Hit Percentage
-system.cpu0.branchPred.usedRAS 760204 # Number of times the RAS was used to get a target.
-system.cpu0.branchPred.RASInCorrect 30176 # Number of incorrect RAS predictions.
+system.cpu0.branchPred.BTBHitPct 64.127060 # BTB Hit Percentage
+system.cpu0.branchPred.usedRAS 804999 # Number of times the RAS was used to get a target.
+system.cpu0.branchPred.RASInCorrect 33376 # Number of incorrect RAS predictions.
system.cpu0.dtb.fetch_hits 0 # ITB hits
system.cpu0.dtb.fetch_misses 0 # ITB misses
system.cpu0.dtb.fetch_acv 0 # ITB acv
system.cpu0.dtb.fetch_accesses 0 # ITB accesses
-system.cpu0.dtb.read_hits 8551483 # DTB read hits
-system.cpu0.dtb.read_misses 30199 # DTB read misses
-system.cpu0.dtb.read_acv 541 # DTB read access violations
-system.cpu0.dtb.read_accesses 624803 # DTB read accesses
-system.cpu0.dtb.write_hits 5601236 # DTB write hits
-system.cpu0.dtb.write_misses 7972 # DTB write misses
-system.cpu0.dtb.write_acv 345 # DTB write access violations
-system.cpu0.dtb.write_accesses 208308 # DTB write accesses
-system.cpu0.dtb.data_hits 14152719 # DTB hits
-system.cpu0.dtb.data_misses 38171 # DTB misses
-system.cpu0.dtb.data_acv 886 # DTB access violations
-system.cpu0.dtb.data_accesses 833111 # DTB accesses
-system.cpu0.itb.fetch_hits 970030 # ITB hits
-system.cpu0.itb.fetch_misses 28776 # ITB misses
-system.cpu0.itb.fetch_acv 920 # ITB acv
-system.cpu0.itb.fetch_accesses 998806 # ITB accesses
+system.cpu0.dtb.read_hits 8950032 # DTB read hits
+system.cpu0.dtb.read_misses 34820 # DTB read misses
+system.cpu0.dtb.read_acv 539 # DTB read access violations
+system.cpu0.dtb.read_accesses 674081 # DTB read accesses
+system.cpu0.dtb.write_hits 5877992 # DTB write hits
+system.cpu0.dtb.write_misses 8366 # DTB write misses
+system.cpu0.dtb.write_acv 348 # DTB write access violations
+system.cpu0.dtb.write_accesses 235610 # DTB write accesses
+system.cpu0.dtb.data_hits 14828024 # DTB hits
+system.cpu0.dtb.data_misses 43186 # DTB misses
+system.cpu0.dtb.data_acv 887 # DTB access violations
+system.cpu0.dtb.data_accesses 909691 # DTB accesses
+system.cpu0.itb.fetch_hits 1040487 # ITB hits
+system.cpu0.itb.fetch_misses 31672 # ITB misses
+system.cpu0.itb.fetch_acv 1020 # ITB acv
+system.cpu0.itb.fetch_accesses 1072159 # ITB accesses
system.cpu0.itb.read_hits 0 # DTB read hits
system.cpu0.itb.read_misses 0 # DTB read misses
system.cpu0.itb.read_acv 0 # DTB read access violations
@@ -638,269 +638,269 @@ system.cpu0.itb.data_hits 0 # DT
system.cpu0.itb.data_misses 0 # DTB misses
system.cpu0.itb.data_acv 0 # DTB access violations
system.cpu0.itb.data_accesses 0 # DTB accesses
-system.cpu0.numCycles 100119117 # number of cpu cycles simulated
+system.cpu0.numCycles 103751291 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu0.fetch.icacheStallCycles 24086973 # Number of cycles fetch is stalled on an Icache miss
-system.cpu0.fetch.Insts 61837518 # Number of instructions fetch has processed
-system.cpu0.fetch.Branches 12035820 # Number of branches that fetch encountered
-system.cpu0.fetch.predictedBranches 5898390 # Number of branches that fetch has predicted taken
-system.cpu0.fetch.Cycles 11653378 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu0.fetch.SquashCycles 1636628 # Number of cycles fetch has spent squashing
-system.cpu0.fetch.BlockedCycles 36048574 # Number of cycles fetch has spent blocked
-system.cpu0.fetch.MiscStallCycles 32004 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu0.fetch.PendingTrapStallCycles 195358 # Number of stall cycles due to pending traps
-system.cpu0.fetch.PendingQuiesceStallCycles 286105 # Number of stall cycles due to pending quiesce instructions
-system.cpu0.fetch.IcacheWaitRetryStallCycles 287 # Number of stall cycles due to full MSHR
-system.cpu0.fetch.CacheLines 7499654 # Number of cache lines fetched
-system.cpu0.fetch.IcacheSquashes 215735 # Number of outstanding Icache misses that were squashed
-system.cpu0.fetch.rateDist::samples 73358875 # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::mean 0.842945 # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::stdev 2.179502 # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.icacheStallCycles 25592047 # Number of cycles fetch is stalled on an Icache miss
+system.cpu0.fetch.Insts 64430414 # Number of instructions fetch has processed
+system.cpu0.fetch.Branches 12584062 # Number of branches that fetch encountered
+system.cpu0.fetch.predictedBranches 6128496 # Number of branches that fetch has predicted taken
+system.cpu0.fetch.Cycles 12114182 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu0.fetch.SquashCycles 1732019 # Number of cycles fetch has spent squashing
+system.cpu0.fetch.BlockedCycles 37108557 # Number of cycles fetch has spent blocked
+system.cpu0.fetch.MiscStallCycles 31932 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu0.fetch.PendingTrapStallCycles 208707 # Number of stall cycles due to pending traps
+system.cpu0.fetch.PendingQuiesceStallCycles 355709 # Number of stall cycles due to pending quiesce instructions
+system.cpu0.fetch.IcacheWaitRetryStallCycles 408 # Number of stall cycles due to full MSHR
+system.cpu0.fetch.CacheLines 7808396 # Number of cache lines fetched
+system.cpu0.fetch.IcacheSquashes 232068 # Number of outstanding Icache misses that were squashed
+system.cpu0.fetch.rateDist::samples 76528583 # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::mean 0.841913 # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::stdev 2.179850 # Number of instructions fetched each cycle (Total)
system.cpu0.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::0 61705497 84.11% 84.11% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::1 747609 1.02% 85.13% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::2 1536097 2.09% 87.23% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::3 679694 0.93% 88.15% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::4 2532720 3.45% 91.61% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::5 506441 0.69% 92.30% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::6 557934 0.76% 93.06% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::7 775120 1.06% 94.11% # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::8 4317763 5.89% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::0 64414401 84.17% 84.17% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::1 777905 1.02% 85.19% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::2 1574114 2.06% 87.24% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::3 716339 0.94% 88.18% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::4 2604704 3.40% 91.58% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::5 529326 0.69% 92.28% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::6 586322 0.77% 93.04% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::7 831890 1.09% 94.13% # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.rateDist::8 4493582 5.87% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu0.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu0.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu0.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.rateDist::total 73358875 # Number of instructions fetched each cycle (Total)
-system.cpu0.fetch.branchRate 0.120215 # Number of branch fetches per cycle
-system.cpu0.fetch.rate 0.617639 # Number of inst fetches per cycle
-system.cpu0.decode.IdleCycles 25314409 # Number of cycles decode is idle
-system.cpu0.decode.BlockedCycles 35520182 # Number of cycles decode is blocked
-system.cpu0.decode.RunCycles 10594612 # Number of cycles decode is running
-system.cpu0.decode.UnblockCycles 907065 # Number of cycles decode is unblocking
-system.cpu0.decode.SquashCycles 1022606 # Number of cycles decode is squashing
-system.cpu0.decode.BranchResolved 498090 # Number of times decode resolved a branch
-system.cpu0.decode.BranchMispred 33900 # Number of times decode detected a branch misprediction
-system.cpu0.decode.DecodedInsts 60717129 # Number of instructions handled by decode
-system.cpu0.decode.SquashedInsts 100549 # Number of squashed instructions handled by decode
-system.cpu0.rename.SquashCycles 1022606 # Number of cycles rename is squashing
-system.cpu0.rename.IdleCycles 26293542 # Number of cycles rename is idle
-system.cpu0.rename.BlockCycles 14517617 # Number of cycles rename is blocking
-system.cpu0.rename.serializeStallCycles 17593984 # count of cycles rename stalled for serializing inst
-system.cpu0.rename.RunCycles 9931348 # Number of cycles rename is running
-system.cpu0.rename.UnblockCycles 3999776 # Number of cycles rename is unblocking
-system.cpu0.rename.RenamedInsts 57516764 # Number of instructions processed by rename
-system.cpu0.rename.ROBFullEvents 6773 # Number of times rename has blocked due to ROB full
-system.cpu0.rename.IQFullEvents 634732 # Number of times rename has blocked due to IQ full
-system.cpu0.rename.LSQFullEvents 1395914 # Number of times rename has blocked due to LSQ full
-system.cpu0.rename.RenamedOperands 38573698 # Number of destination operands rename has renamed
-system.cpu0.rename.RenameLookups 70135572 # Number of register rename lookups that rename has made
-system.cpu0.rename.int_rename_lookups 69772127 # Number of integer rename lookups
-system.cpu0.rename.fp_rename_lookups 363445 # Number of floating rename lookups
-system.cpu0.rename.CommittedMaps 33935332 # Number of HB maps that are committed
-system.cpu0.rename.UndoneMaps 4638358 # Number of HB maps that are undone due to squashing
-system.cpu0.rename.serializingInsts 1391962 # count of serializing insts renamed
-system.cpu0.rename.tempSerializingInsts 201915 # count of temporary serializing insts renamed
-system.cpu0.rename.skidInsts 10849961 # count of insts added to the skid buffer
-system.cpu0.memDep0.insertedLoads 8944130 # Number of loads inserted to the mem dependence unit.
-system.cpu0.memDep0.insertedStores 5848227 # Number of stores inserted to the mem dependence unit.
-system.cpu0.memDep0.conflictingLoads 1106835 # Number of conflicting loads.
-system.cpu0.memDep0.conflictingStores 734658 # Number of conflicting stores.
-system.cpu0.iq.iqInstsAdded 51076458 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu0.iq.iqNonSpecInstsAdded 1725873 # Number of non-speculative instructions added to the IQ
-system.cpu0.iq.iqInstsIssued 49974476 # Number of instructions issued
-system.cpu0.iq.iqSquashedInstsIssued 73247 # Number of squashed instructions issued
-system.cpu0.iq.iqSquashedInstsExamined 5675710 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu0.iq.iqSquashedOperandsExamined 2876244 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu0.iq.iqSquashedNonSpecRemoved 1167818 # Number of squashed non-spec instructions that were removed
-system.cpu0.iq.issued_per_cycle::samples 73358875 # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::mean 0.681233 # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::stdev 1.330312 # Number of insts issued each cycle
+system.cpu0.fetch.rateDist::total 76528583 # Number of instructions fetched each cycle (Total)
+system.cpu0.fetch.branchRate 0.121291 # Number of branch fetches per cycle
+system.cpu0.fetch.rate 0.621008 # Number of inst fetches per cycle
+system.cpu0.decode.IdleCycles 26850978 # Number of cycles decode is idle
+system.cpu0.decode.BlockedCycles 36641611 # Number of cycles decode is blocked
+system.cpu0.decode.RunCycles 11018000 # Number of cycles decode is running
+system.cpu0.decode.UnblockCycles 937421 # Number of cycles decode is unblocking
+system.cpu0.decode.SquashCycles 1080572 # Number of cycles decode is squashing
+system.cpu0.decode.BranchResolved 523116 # Number of times decode resolved a branch
+system.cpu0.decode.BranchMispred 36832 # Number of times decode detected a branch misprediction
+system.cpu0.decode.DecodedInsts 63252649 # Number of instructions handled by decode
+system.cpu0.decode.SquashedInsts 110299 # Number of squashed instructions handled by decode
+system.cpu0.rename.SquashCycles 1080572 # Number of cycles rename is squashing
+system.cpu0.rename.IdleCycles 27872767 # Number of cycles rename is idle
+system.cpu0.rename.BlockCycles 14726920 # Number of cycles rename is blocking
+system.cpu0.rename.serializeStallCycles 18377517 # count of cycles rename stalled for serializing inst
+system.cpu0.rename.RunCycles 10342666 # Number of cycles rename is running
+system.cpu0.rename.UnblockCycles 4128139 # Number of cycles rename is unblocking
+system.cpu0.rename.RenamedInsts 59880890 # Number of instructions processed by rename
+system.cpu0.rename.ROBFullEvents 6989 # Number of times rename has blocked due to ROB full
+system.cpu0.rename.IQFullEvents 638699 # Number of times rename has blocked due to IQ full
+system.cpu0.rename.LSQFullEvents 1446922 # Number of times rename has blocked due to LSQ full
+system.cpu0.rename.RenamedOperands 40104744 # Number of destination operands rename has renamed
+system.cpu0.rename.RenameLookups 72926681 # Number of register rename lookups that rename has made
+system.cpu0.rename.int_rename_lookups 72541237 # Number of integer rename lookups
+system.cpu0.rename.fp_rename_lookups 385444 # Number of floating rename lookups
+system.cpu0.rename.CommittedMaps 35232895 # Number of HB maps that are committed
+system.cpu0.rename.UndoneMaps 4871841 # Number of HB maps that are undone due to squashing
+system.cpu0.rename.serializingInsts 1468873 # count of serializing insts renamed
+system.cpu0.rename.tempSerializingInsts 214348 # count of temporary serializing insts renamed
+system.cpu0.rename.skidInsts 11259122 # count of insts added to the skid buffer
+system.cpu0.memDep0.insertedLoads 9368607 # Number of loads inserted to the mem dependence unit.
+system.cpu0.memDep0.insertedStores 6150188 # Number of stores inserted to the mem dependence unit.
+system.cpu0.memDep0.conflictingLoads 1144221 # Number of conflicting loads.
+system.cpu0.memDep0.conflictingStores 763596 # Number of conflicting stores.
+system.cpu0.iq.iqInstsAdded 53152910 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu0.iq.iqNonSpecInstsAdded 1825418 # Number of non-speculative instructions added to the IQ
+system.cpu0.iq.iqInstsIssued 51980474 # Number of instructions issued
+system.cpu0.iq.iqSquashedInstsIssued 87912 # Number of squashed instructions issued
+system.cpu0.iq.iqSquashedInstsExamined 5962808 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu0.iq.iqSquashedOperandsExamined 3052808 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu0.iq.iqSquashedNonSpecRemoved 1237037 # Number of squashed non-spec instructions that were removed
+system.cpu0.iq.issued_per_cycle::samples 76528583 # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::mean 0.679230 # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::stdev 1.328773 # Number of insts issued each cycle
system.cpu0.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::0 51151747 69.73% 69.73% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::1 10102031 13.77% 83.50% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::2 4555933 6.21% 89.71% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::3 2996125 4.08% 93.79% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::4 2381484 3.25% 97.04% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::5 1187378 1.62% 98.66% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::6 631915 0.86% 99.52% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::7 300208 0.41% 99.93% # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::8 52054 0.07% 100.00% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::0 53422858 69.81% 69.81% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::1 10519380 13.75% 83.55% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::2 4737419 6.19% 89.74% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::3 3110993 4.07% 93.81% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::4 2482363 3.24% 97.05% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::5 1230781 1.61% 98.66% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::6 656198 0.86% 99.52% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::7 315996 0.41% 99.93% # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::8 52595 0.07% 100.00% # Number of insts issued each cycle
system.cpu0.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu0.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu0.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu0.iq.issued_per_cycle::total 73358875 # Number of insts issued each cycle
+system.cpu0.iq.issued_per_cycle::total 76528583 # Number of insts issued each cycle
system.cpu0.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu0.iq.fu_full::IntAlu 82701 12.59% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::IntMult 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::IntDiv 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatAdd 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatCmp 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatCvt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatMult 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatDiv 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::FloatSqrt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdAdd 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdAddAcc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdAlu 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdCmp 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdCvt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdMisc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdMult 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdMultAcc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdShift 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdShiftAcc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdSqrt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatAdd 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatAlu 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatCmp 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatCvt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatDiv 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatMisc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatMult 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatMultAcc 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::SimdFloatSqrt 0 0.00% 12.59% # attempts to use FU when none available
-system.cpu0.iq.fu_full::MemRead 300975 45.82% 58.41% # attempts to use FU when none available
-system.cpu0.iq.fu_full::MemWrite 273171 41.59% 100.00% # attempts to use FU when none available
+system.cpu0.iq.fu_full::IntAlu 81649 11.89% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::IntMult 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::IntDiv 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatAdd 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatCmp 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatCvt 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatMult 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatDiv 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::FloatSqrt 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdAdd 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdAddAcc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdAlu 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdCmp 0 0.00% 11.89% # attempts to use FU when none available
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+system.cpu0.iq.fu_full::SimdMisc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdMult 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdMultAcc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdShift 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdShiftAcc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdSqrt 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatAdd 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatAlu 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatCmp 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatCvt 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatDiv 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatMisc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatMult 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatMultAcc 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::SimdFloatSqrt 0 0.00% 11.89% # attempts to use FU when none available
+system.cpu0.iq.fu_full::MemRead 319979 46.59% 58.47% # attempts to use FU when none available
+system.cpu0.iq.fu_full::MemWrite 285231 41.53% 100.00% # attempts to use FU when none available
system.cpu0.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu0.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu0.iq.FU_type_0::No_OpClass 3774 0.01% 0.01% # Type of FU issued
-system.cpu0.iq.FU_type_0::IntAlu 34554089 69.14% 69.15% # Type of FU issued
-system.cpu0.iq.FU_type_0::IntMult 54830 0.11% 69.26% # Type of FU issued
-system.cpu0.iq.FU_type_0::IntDiv 0 0.00% 69.26% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatAdd 15268 0.03% 69.29% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatCmp 0 0.00% 69.29% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatCvt 0 0.00% 69.29% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatMult 0 0.00% 69.29% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatDiv 1879 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::FloatSqrt 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdAdd 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdAddAcc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdAlu 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdCmp 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdCvt 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdMisc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdMult 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdMultAcc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdShift 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdShiftAcc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdSqrt 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatAdd 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatAlu 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatCmp 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatCvt 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatDiv 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatMisc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatMult 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::SimdFloatSqrt 0 0.00% 69.30% # Type of FU issued
-system.cpu0.iq.FU_type_0::MemRead 8894109 17.80% 87.09% # Type of FU issued
-system.cpu0.iq.FU_type_0::MemWrite 5667707 11.34% 98.43% # Type of FU issued
-system.cpu0.iq.FU_type_0::IprAccess 782820 1.57% 100.00% # Type of FU issued
+system.cpu0.iq.FU_type_0::No_OpClass 3782 0.01% 0.01% # Type of FU issued
+system.cpu0.iq.FU_type_0::IntAlu 35814992 68.90% 68.91% # Type of FU issued
+system.cpu0.iq.FU_type_0::IntMult 57898 0.11% 69.02% # Type of FU issued
+system.cpu0.iq.FU_type_0::IntDiv 0 0.00% 69.02% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatAdd 15714 0.03% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatCmp 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatCvt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatMult 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatDiv 1883 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::FloatSqrt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdAdd 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdAddAcc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdAlu 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdCmp 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdCvt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdMisc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdMult 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdMultAcc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdShift 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdShiftAcc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdSqrt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatAdd 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatAlu 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatCmp 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatCvt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatDiv 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatMisc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatMult 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::SimdFloatSqrt 0 0.00% 69.05% # Type of FU issued
+system.cpu0.iq.FU_type_0::MemRead 9315059 17.92% 86.97% # Type of FU issued
+system.cpu0.iq.FU_type_0::MemWrite 5946213 11.44% 98.41% # Type of FU issued
+system.cpu0.iq.FU_type_0::IprAccess 824933 1.59% 100.00% # Type of FU issued
system.cpu0.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu0.iq.FU_type_0::total 49974476 # Type of FU issued
-system.cpu0.iq.rate 0.499150 # Inst issue rate
-system.cpu0.iq.fu_busy_cnt 656847 # FU busy when requested
-system.cpu0.iq.fu_busy_rate 0.013144 # FU busy rate (busy events/executed inst)
-system.cpu0.iq.int_inst_queue_reads 173517181 # Number of integer instruction queue reads
-system.cpu0.iq.int_inst_queue_writes 58238103 # Number of integer instruction queue writes
-system.cpu0.iq.int_inst_queue_wakeup_accesses 48994356 # Number of integer instruction queue wakeup accesses
-system.cpu0.iq.fp_inst_queue_reads 520739 # Number of floating instruction queue reads
-system.cpu0.iq.fp_inst_queue_writes 252277 # Number of floating instruction queue writes
-system.cpu0.iq.fp_inst_queue_wakeup_accesses 246003 # Number of floating instruction queue wakeup accesses
-system.cpu0.iq.int_alu_accesses 50355146 # Number of integer alu accesses
-system.cpu0.iq.fp_alu_accesses 272403 # Number of floating point alu accesses
-system.cpu0.iew.lsq.thread0.forwLoads 532794 # Number of loads that had data forwarded from stores
+system.cpu0.iq.FU_type_0::total 51980474 # Type of FU issued
+system.cpu0.iq.rate 0.501010 # Inst issue rate
+system.cpu0.iq.fu_busy_cnt 686859 # FU busy when requested
+system.cpu0.iq.fu_busy_rate 0.013214 # FU busy rate (busy events/executed inst)
+system.cpu0.iq.int_inst_queue_reads 180712322 # Number of integer instruction queue reads
+system.cpu0.iq.int_inst_queue_writes 60686814 # Number of integer instruction queue writes
+system.cpu0.iq.int_inst_queue_wakeup_accesses 50945996 # Number of integer instruction queue wakeup accesses
+system.cpu0.iq.fp_inst_queue_reads 551979 # Number of floating instruction queue reads
+system.cpu0.iq.fp_inst_queue_writes 267326 # Number of floating instruction queue writes
+system.cpu0.iq.fp_inst_queue_wakeup_accesses 260492 # Number of floating instruction queue wakeup accesses
+system.cpu0.iq.int_alu_accesses 52374713 # Number of integer alu accesses
+system.cpu0.iq.fp_alu_accesses 288838 # Number of floating point alu accesses
+system.cpu0.iew.lsq.thread0.forwLoads 545458 # Number of loads that had data forwarded from stores
system.cpu0.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu0.iew.lsq.thread0.squashedLoads 1055829 # Number of loads squashed
-system.cpu0.iew.lsq.thread0.ignoredResponses 3465 # Number of memory responses ignored because the instruction is squashed
-system.cpu0.iew.lsq.thread0.memOrderViolation 12581 # Number of memory ordering violations
-system.cpu0.iew.lsq.thread0.squashedStores 434891 # Number of stores squashed
+system.cpu0.iew.lsq.thread0.squashedLoads 1121947 # Number of loads squashed
+system.cpu0.iew.lsq.thread0.ignoredResponses 2762 # Number of memory responses ignored because the instruction is squashed
+system.cpu0.iew.lsq.thread0.memOrderViolation 13266 # Number of memory ordering violations
+system.cpu0.iew.lsq.thread0.squashedStores 454260 # Number of stores squashed
system.cpu0.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu0.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu0.iew.lsq.thread0.rescheduledLoads 18411 # Number of loads that were rescheduled
-system.cpu0.iew.lsq.thread0.cacheBlocked 121190 # Number of times an access to memory failed due to the cache being blocked
+system.cpu0.iew.lsq.thread0.rescheduledLoads 18544 # Number of loads that were rescheduled
+system.cpu0.iew.lsq.thread0.cacheBlocked 124618 # Number of times an access to memory failed due to the cache being blocked
system.cpu0.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu0.iew.iewSquashCycles 1022606 # Number of cycles IEW is squashing
-system.cpu0.iew.iewBlockCycles 10355478 # Number of cycles IEW is blocking
-system.cpu0.iew.iewUnblockCycles 778603 # Number of cycles IEW is unblocking
-system.cpu0.iew.iewDispatchedInsts 55935625 # Number of instructions dispatched to IQ
-system.cpu0.iew.iewDispSquashedInsts 586886 # Number of squashed instructions skipped by dispatch
-system.cpu0.iew.iewDispLoadInsts 8944130 # Number of dispatched load instructions
-system.cpu0.iew.iewDispStoreInsts 5848227 # Number of dispatched store instructions
-system.cpu0.iew.iewDispNonSpecInsts 1520110 # Number of dispatched non-speculative instructions
-system.cpu0.iew.iewIQFullEvents 566642 # Number of times the IQ has become full, causing a stall
-system.cpu0.iew.iewLSQFullEvents 4768 # Number of times the LSQ has become full, causing a stall
-system.cpu0.iew.memOrderViolationEvents 12581 # Number of memory order violations
-system.cpu0.iew.predictedTakenIncorrect 160372 # Number of branches that were predicted taken incorrectly
-system.cpu0.iew.predictedNotTakenIncorrect 334885 # Number of branches that were predicted not taken incorrectly
-system.cpu0.iew.branchMispredicts 495257 # Number of branch mispredicts detected at execute
-system.cpu0.iew.iewExecutedInsts 49597141 # Number of executed instructions
-system.cpu0.iew.iewExecLoadInsts 8604090 # Number of load instructions executed
-system.cpu0.iew.iewExecSquashedInsts 377334 # Number of squashed instructions skipped in execute
+system.cpu0.iew.iewSquashCycles 1080572 # Number of cycles IEW is squashing
+system.cpu0.iew.iewBlockCycles 10513662 # Number of cycles IEW is blocking
+system.cpu0.iew.iewUnblockCycles 794213 # Number of cycles IEW is unblocking
+system.cpu0.iew.iewDispatchedInsts 58228726 # Number of instructions dispatched to IQ
+system.cpu0.iew.iewDispSquashedInsts 618999 # Number of squashed instructions skipped by dispatch
+system.cpu0.iew.iewDispLoadInsts 9368607 # Number of dispatched load instructions
+system.cpu0.iew.iewDispStoreInsts 6150188 # Number of dispatched store instructions
+system.cpu0.iew.iewDispNonSpecInsts 1608738 # Number of dispatched non-speculative instructions
+system.cpu0.iew.iewIQFullEvents 580049 # Number of times the IQ has become full, causing a stall
+system.cpu0.iew.iewLSQFullEvents 5099 # Number of times the LSQ has become full, causing a stall
+system.cpu0.iew.memOrderViolationEvents 13266 # Number of memory order violations
+system.cpu0.iew.predictedTakenIncorrect 168319 # Number of branches that were predicted taken incorrectly
+system.cpu0.iew.predictedNotTakenIncorrect 356582 # Number of branches that were predicted not taken incorrectly
+system.cpu0.iew.branchMispredicts 524901 # Number of branch mispredicts detected at execute
+system.cpu0.iew.iewExecutedInsts 51585627 # Number of executed instructions
+system.cpu0.iew.iewExecLoadInsts 9008604 # Number of load instructions executed
+system.cpu0.iew.iewExecSquashedInsts 394846 # Number of squashed instructions skipped in execute
system.cpu0.iew.exec_swp 0 # number of swp insts executed
-system.cpu0.iew.exec_nop 3133294 # number of nop insts executed
-system.cpu0.iew.exec_refs 14226525 # number of memory reference insts executed
-system.cpu0.iew.exec_branches 7904799 # Number of branches executed
-system.cpu0.iew.exec_stores 5622435 # Number of stores executed
-system.cpu0.iew.exec_rate 0.495381 # Inst execution rate
-system.cpu0.iew.wb_sent 49326582 # cumulative count of insts sent to commit
-system.cpu0.iew.wb_count 49240359 # cumulative count of insts written-back
-system.cpu0.iew.wb_producers 24624844 # num instructions producing a value
-system.cpu0.iew.wb_consumers 33143444 # num instructions consuming a value
+system.cpu0.iew.exec_nop 3250398 # number of nop insts executed
+system.cpu0.iew.exec_refs 14908735 # number of memory reference insts executed
+system.cpu0.iew.exec_branches 8218209 # Number of branches executed
+system.cpu0.iew.exec_stores 5900131 # Number of stores executed
+system.cpu0.iew.exec_rate 0.497205 # Inst execution rate
+system.cpu0.iew.wb_sent 51301062 # cumulative count of insts sent to commit
+system.cpu0.iew.wb_count 51206488 # cumulative count of insts written-back
+system.cpu0.iew.wb_producers 25493361 # num instructions producing a value
+system.cpu0.iew.wb_consumers 34352042 # num instructions consuming a value
system.cpu0.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ
-system.cpu0.iew.wb_rate 0.491818 # insts written-back per cycle
-system.cpu0.iew.wb_fanout 0.742978 # average fanout of values written-back
+system.cpu0.iew.wb_rate 0.493550 # insts written-back per cycle
+system.cpu0.iew.wb_fanout 0.742121 # average fanout of values written-back
system.cpu0.iew.wb_penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ
-system.cpu0.commit.commitSquashedInsts 6108836 # The number of squashed insts skipped by commit
-system.cpu0.commit.commitNonSpecStalls 558055 # The number of times commit has been forced to stall to communicate backwards
-system.cpu0.commit.branchMispredicts 462633 # The number of times a branch was mispredicted
-system.cpu0.commit.committed_per_cycle::samples 72336269 # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::mean 0.687326 # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::stdev 1.603373 # Number of insts commited each cycle
+system.cpu0.commit.commitSquashedInsts 6443785 # The number of squashed insts skipped by commit
+system.cpu0.commit.commitNonSpecStalls 588381 # The number of times commit has been forced to stall to communicate backwards
+system.cpu0.commit.branchMispredicts 491234 # The number of times a branch was mispredicted
+system.cpu0.commit.committed_per_cycle::samples 75448011 # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::mean 0.685042 # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::stdev 1.601476 # Number of insts commited each cycle
system.cpu0.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::0 53637775 74.15% 74.15% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::1 7794815 10.78% 84.93% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::2 4279099 5.92% 90.84% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::3 2307939 3.19% 94.03% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::4 1284633 1.78% 95.81% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::5 537599 0.74% 96.55% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::6 458507 0.63% 97.19% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::7 423032 0.58% 97.77% # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::8 1612870 2.23% 100.00% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::0 56013876 74.24% 74.24% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::1 8117892 10.76% 85.00% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::2 4422865 5.86% 90.86% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::3 2392310 3.17% 94.03% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::4 1343441 1.78% 95.81% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::5 564278 0.75% 96.56% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::6 477580 0.63% 97.20% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::7 442296 0.59% 97.78% # Number of insts commited each cycle
+system.cpu0.commit.committed_per_cycle::8 1673473 2.22% 100.00% # Number of insts commited each cycle
system.cpu0.commit.committed_per_cycle::overflows 0 0.00% 100.00% # Number of insts commited each cycle
system.cpu0.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
system.cpu0.commit.committed_per_cycle::max_value 8 # Number of insts commited each cycle
-system.cpu0.commit.committed_per_cycle::total 72336269 # Number of insts commited each cycle
-system.cpu0.commit.committedInsts 49718583 # Number of instructions committed
-system.cpu0.commit.committedOps 49718583 # Number of ops (including micro ops) committed
+system.cpu0.commit.committed_per_cycle::total 75448011 # Number of insts commited each cycle
+system.cpu0.commit.committedInsts 51685042 # Number of instructions committed
+system.cpu0.commit.committedOps 51685042 # Number of ops (including micro ops) committed
system.cpu0.commit.swp_count 0 # Number of s/w prefetches committed
-system.cpu0.commit.refs 13301637 # Number of memory references committed
-system.cpu0.commit.loads 7888301 # Number of loads committed
-system.cpu0.commit.membars 189589 # Number of memory barriers committed
-system.cpu0.commit.branches 7515884 # Number of branches committed
-system.cpu0.commit.fp_insts 243820 # Number of committed floating point instructions.
-system.cpu0.commit.int_insts 46055357 # Number of committed integer instructions.
-system.cpu0.commit.function_calls 629203 # Number of function calls committed.
-system.cpu0.commit.bw_lim_events 1612870 # number cycles where commit BW limit reached
+system.cpu0.commit.refs 13942588 # Number of memory references committed
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+system.cpu0.commit.membars 199926 # Number of memory barriers committed
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-system.cpu0.cpi 2.136412 # CPI: Cycles Per Instruction
-system.cpu0.cpi_total 2.136412 # CPI: Total CPI of All Threads
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-system.cpu0.ipc_total 0.468074 # IPC: Total IPC of All Threads
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system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
@@ -932,245 +932,245 @@ system.tsunami.ethernet.totalRxOrn 0 # to
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
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system.cpu0.dcache.fast_writes 0 # number of fast writes performed
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+system.cpu0.dcache.ReadReq_mshr_uncacheable_latency::total 1465155500 # number of ReadReq MSHR uncacheable cycles
+system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::cpu0.data 2167706499 # number of WriteReq MSHR uncacheable cycles
+system.cpu0.dcache.WriteReq_mshr_uncacheable_latency::total 2167706499 # number of WriteReq MSHR uncacheable cycles
+system.cpu0.dcache.overall_mshr_uncacheable_latency::cpu0.data 3632861999 # number of overall MSHR uncacheable cycles
+system.cpu0.dcache.overall_mshr_uncacheable_latency::total 3632861999 # number of overall MSHR uncacheable cycles
+system.cpu0.dcache.ReadReq_mshr_miss_rate::cpu0.data 0.123686 # mshr miss rate for ReadReq accesses
+system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.123686 # mshr miss rate for ReadReq accesses
+system.cpu0.dcache.WriteReq_mshr_miss_rate::cpu0.data 0.050503 # mshr miss rate for WriteReq accesses
+system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.050503 # mshr miss rate for WriteReq accesses
+system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::cpu0.data 0.085195 # mshr miss rate for LoadLockedReq accesses
+system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::total 0.085195 # mshr miss rate for LoadLockedReq accesses
+system.cpu0.dcache.StoreCondReq_mshr_miss_rate::cpu0.data 0.014408 # mshr miss rate for StoreCondReq accesses
+system.cpu0.dcache.StoreCondReq_mshr_miss_rate::total 0.014408 # mshr miss rate for StoreCondReq accesses
+system.cpu0.dcache.demand_mshr_miss_rate::cpu0.data 0.094180 # mshr miss rate for demand accesses
+system.cpu0.dcache.demand_mshr_miss_rate::total 0.094180 # mshr miss rate for demand accesses
+system.cpu0.dcache.overall_mshr_miss_rate::cpu0.data 0.094180 # mshr miss rate for overall accesses
+system.cpu0.dcache.overall_mshr_miss_rate::total 0.094180 # mshr miss rate for overall accesses
+system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::cpu0.data 21481.613038 # average ReadReq mshr miss latency
+system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 21481.613038 # average ReadReq mshr miss latency
+system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::cpu0.data 36192.270410 # average WriteReq mshr miss latency
+system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 36192.270410 # average WriteReq mshr miss latency
+system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu0.data 11463.796167 # average LoadLockedReq mshr miss latency
+system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::total 11463.796167 # average LoadLockedReq mshr miss latency
+system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::cpu0.data 5484.075280 # average StoreCondReq mshr miss latency
+system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::total 5484.075280 # average StoreCondReq mshr miss latency
+system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 24661.954646 # average overall mshr miss latency
+system.cpu0.dcache.demand_avg_mshr_miss_latency::total 24661.954646 # average overall mshr miss latency
+system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 24661.954646 # average overall mshr miss latency
+system.cpu0.dcache.overall_avg_mshr_miss_latency::total 24661.954646 # average overall mshr miss latency
system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data inf # average ReadReq mshr uncacheable latency
system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu0.data inf # average WriteReq mshr uncacheable latency
@@ -1178,35 +1178,35 @@ system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data inf # average overall mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
system.cpu0.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu1.branchPred.lookups 2951275 # Number of BP lookups
-system.cpu1.branchPred.condPredicted 2437405 # Number of conditional branches predicted
-system.cpu1.branchPred.condIncorrect 83356 # Number of conditional branches incorrect
-system.cpu1.branchPred.BTBLookups 1836683 # Number of BTB lookups
-system.cpu1.branchPred.BTBHits 994148 # Number of BTB hits
+system.cpu1.branchPred.lookups 2374472 # Number of BP lookups
+system.cpu1.branchPred.condPredicted 1973565 # Number of conditional branches predicted
+system.cpu1.branchPred.condIncorrect 63683 # Number of conditional branches incorrect
+system.cpu1.branchPred.BTBLookups 1357670 # Number of BTB lookups
+system.cpu1.branchPred.BTBHits 789569 # Number of BTB hits
system.cpu1.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu1.branchPred.BTBHitPct 54.127359 # BTB Hit Percentage
-system.cpu1.branchPred.usedRAS 203977 # Number of times the RAS was used to get a target.
-system.cpu1.branchPred.RASInCorrect 9132 # Number of incorrect RAS predictions.
+system.cpu1.branchPred.BTBHitPct 58.156179 # BTB Hit Percentage
+system.cpu1.branchPred.usedRAS 159848 # Number of times the RAS was used to get a target.
+system.cpu1.branchPred.RASInCorrect 6979 # Number of incorrect RAS predictions.
system.cpu1.dtb.fetch_hits 0 # ITB hits
system.cpu1.dtb.fetch_misses 0 # ITB misses
system.cpu1.dtb.fetch_acv 0 # ITB acv
system.cpu1.dtb.fetch_accesses 0 # ITB accesses
-system.cpu1.dtb.read_hits 2175721 # DTB read hits
-system.cpu1.dtb.read_misses 10990 # DTB read misses
-system.cpu1.dtb.read_acv 22 # DTB read access violations
-system.cpu1.dtb.read_accesses 324709 # DTB read accesses
-system.cpu1.dtb.write_hits 1432957 # DTB write hits
-system.cpu1.dtb.write_misses 2208 # DTB write misses
-system.cpu1.dtb.write_acv 64 # DTB write access violations
-system.cpu1.dtb.write_accesses 133156 # DTB write accesses
-system.cpu1.dtb.data_hits 3608678 # DTB hits
-system.cpu1.dtb.data_misses 13198 # DTB misses
-system.cpu1.dtb.data_acv 86 # DTB access violations
-system.cpu1.dtb.data_accesses 457865 # DTB accesses
-system.cpu1.itb.fetch_hits 458401 # ITB hits
-system.cpu1.itb.fetch_misses 7664 # ITB misses
-system.cpu1.itb.fetch_acv 238 # ITB acv
-system.cpu1.itb.fetch_accesses 466065 # ITB accesses
+system.cpu1.dtb.read_hits 1755569 # DTB read hits
+system.cpu1.dtb.read_misses 9259 # DTB read misses
+system.cpu1.dtb.read_acv 6 # DTB read access violations
+system.cpu1.dtb.read_accesses 277737 # DTB read accesses
+system.cpu1.dtb.write_hits 1124169 # DTB write hits
+system.cpu1.dtb.write_misses 1775 # DTB write misses
+system.cpu1.dtb.write_acv 38 # DTB write access violations
+system.cpu1.dtb.write_accesses 104346 # DTB write accesses
+system.cpu1.dtb.data_hits 2879738 # DTB hits
+system.cpu1.dtb.data_misses 11034 # DTB misses
+system.cpu1.dtb.data_acv 44 # DTB access violations
+system.cpu1.dtb.data_accesses 382083 # DTB accesses
+system.cpu1.itb.fetch_hits 378886 # ITB hits
+system.cpu1.itb.fetch_misses 5643 # ITB misses
+system.cpu1.itb.fetch_acv 144 # ITB acv
+system.cpu1.itb.fetch_accesses 384529 # ITB accesses
system.cpu1.itb.read_hits 0 # DTB read hits
system.cpu1.itb.read_misses 0 # DTB read misses
system.cpu1.itb.read_acv 0 # DTB read access violations
@@ -1219,508 +1219,512 @@ system.cpu1.itb.data_hits 0 # DT
system.cpu1.itb.data_misses 0 # DTB misses
system.cpu1.itb.data_acv 0 # DTB access violations
system.cpu1.itb.data_accesses 0 # DTB accesses
-system.cpu1.numCycles 18142763 # number of cpu cycles simulated
+system.cpu1.numCycles 14403389 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu1.fetch.icacheStallCycles 7059665 # Number of cycles fetch is stalled on an Icache miss
-system.cpu1.fetch.Insts 13904860 # Number of instructions fetch has processed
-system.cpu1.fetch.Branches 2951275 # Number of branches that fetch encountered
-system.cpu1.fetch.predictedBranches 1198125 # Number of branches that fetch has predicted taken
-system.cpu1.fetch.Cycles 2489767 # Number of cycles fetch has run and was not squashing or blocked
-system.cpu1.fetch.SquashCycles 435348 # Number of cycles fetch has spent squashing
-system.cpu1.fetch.BlockedCycles 7028149 # Number of cycles fetch has spent blocked
-system.cpu1.fetch.MiscStallCycles 27735 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
-system.cpu1.fetch.PendingTrapStallCycles 66683 # Number of stall cycles due to pending traps
-system.cpu1.fetch.PendingQuiesceStallCycles 53717 # Number of stall cycles due to pending quiesce instructions
-system.cpu1.fetch.IcacheWaitRetryStallCycles 8 # Number of stall cycles due to full MSHR
-system.cpu1.fetch.CacheLines 1666090 # Number of cache lines fetched
-system.cpu1.fetch.IcacheSquashes 56854 # Number of outstanding Icache misses that were squashed
-system.cpu1.fetch.rateDist::samples 17001992 # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::mean 0.817837 # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::stdev 2.192062 # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.icacheStallCycles 5507969 # Number of cycles fetch is stalled on an Icache miss
+system.cpu1.fetch.Insts 11118541 # Number of instructions fetch has processed
+system.cpu1.fetch.Branches 2374472 # Number of branches that fetch encountered
+system.cpu1.fetch.predictedBranches 949417 # Number of branches that fetch has predicted taken
+system.cpu1.fetch.Cycles 1985955 # Number of cycles fetch has run and was not squashing or blocked
+system.cpu1.fetch.SquashCycles 349018 # Number of cycles fetch has spent squashing
+system.cpu1.fetch.BlockedCycles 5777579 # Number of cycles fetch has spent blocked
+system.cpu1.fetch.MiscStallCycles 25749 # Number of cycles fetch has spent waiting on interrupts, or bad addresses, or out of MSHRs
+system.cpu1.fetch.PendingTrapStallCycles 54503 # Number of stall cycles due to pending traps
+system.cpu1.fetch.PendingQuiesceStallCycles 55745 # Number of stall cycles due to pending quiesce instructions
+system.cpu1.fetch.IcacheWaitRetryStallCycles 7 # Number of stall cycles due to full MSHR
+system.cpu1.fetch.CacheLines 1323443 # Number of cache lines fetched
+system.cpu1.fetch.IcacheSquashes 42238 # Number of outstanding Icache misses that were squashed
+system.cpu1.fetch.rateDist::samples 13629786 # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::mean 0.815753 # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::stdev 2.191288 # Number of instructions fetched each cycle (Total)
system.cpu1.fetch.rateDist::underflows 0 0.00% 0.00% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::0 14512225 85.36% 85.36% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::1 164132 0.97% 86.32% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::2 264549 1.56% 87.88% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::3 196224 1.15% 89.03% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::4 340931 2.01% 91.04% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::5 130664 0.77% 91.81% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::6 146583 0.86% 92.67% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::7 247056 1.45% 94.12% # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::8 999628 5.88% 100.00% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::0 11643831 85.43% 85.43% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::1 125140 0.92% 86.35% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::2 217081 1.59% 87.94% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::3 155934 1.14% 89.08% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::4 266080 1.95% 91.04% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::5 106134 0.78% 91.82% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::6 117650 0.86% 92.68% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::7 192941 1.42% 94.09% # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.rateDist::8 804995 5.91% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu1.fetch.rateDist::overflows 0 0.00% 100.00% # Number of instructions fetched each cycle (Total)
system.cpu1.fetch.rateDist::min_value 0 # Number of instructions fetched each cycle (Total)
system.cpu1.fetch.rateDist::max_value 8 # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.rateDist::total 17001992 # Number of instructions fetched each cycle (Total)
-system.cpu1.fetch.branchRate 0.162670 # Number of branch fetches per cycle
-system.cpu1.fetch.rate 0.766414 # Number of inst fetches per cycle
-system.cpu1.decode.IdleCycles 6935204 # Number of cycles decode is idle
-system.cpu1.decode.BlockedCycles 7342187 # Number of cycles decode is blocked
-system.cpu1.decode.RunCycles 2328189 # Number of cycles decode is running
-system.cpu1.decode.UnblockCycles 128213 # Number of cycles decode is unblocking
-system.cpu1.decode.SquashCycles 268198 # Number of cycles decode is squashing
-system.cpu1.decode.BranchResolved 130237 # Number of times decode resolved a branch
-system.cpu1.decode.BranchMispred 8176 # Number of times decode detected a branch misprediction
-system.cpu1.decode.DecodedInsts 13648246 # Number of instructions handled by decode
-system.cpu1.decode.SquashedInsts 24564 # Number of squashed instructions handled by decode
-system.cpu1.rename.SquashCycles 268198 # Number of cycles rename is squashing
-system.cpu1.rename.IdleCycles 7169583 # Number of cycles rename is idle
-system.cpu1.rename.BlockCycles 530321 # Number of cycles rename is blocking
-system.cpu1.rename.serializeStallCycles 6090332 # count of cycles rename stalled for serializing inst
-system.cpu1.rename.RunCycles 2220482 # Number of cycles rename is running
-system.cpu1.rename.UnblockCycles 723074 # Number of cycles rename is unblocking
-system.cpu1.rename.RenamedInsts 12659443 # Number of instructions processed by rename
-system.cpu1.rename.ROBFullEvents 49 # Number of times rename has blocked due to ROB full
-system.cpu1.rename.IQFullEvents 62425 # Number of times rename has blocked due to IQ full
-system.cpu1.rename.LSQFullEvents 176745 # Number of times rename has blocked due to LSQ full
-system.cpu1.rename.RenamedOperands 8295078 # Number of destination operands rename has renamed
-system.cpu1.rename.RenameLookups 15050859 # Number of register rename lookups that rename has made
-system.cpu1.rename.int_rename_lookups 14876046 # Number of integer rename lookups
-system.cpu1.rename.fp_rename_lookups 174813 # Number of floating rename lookups
-system.cpu1.rename.CommittedMaps 7154813 # Number of HB maps that are committed
-system.cpu1.rename.UndoneMaps 1140265 # Number of HB maps that are undone due to squashing
-system.cpu1.rename.serializingInsts 506846 # count of serializing insts renamed
-system.cpu1.rename.tempSerializingInsts 51390 # count of temporary serializing insts renamed
-system.cpu1.rename.skidInsts 2247067 # count of insts added to the skid buffer
-system.cpu1.memDep0.insertedLoads 2298271 # Number of loads inserted to the mem dependence unit.
-system.cpu1.memDep0.insertedStores 1513317 # Number of stores inserted to the mem dependence unit.
-system.cpu1.memDep0.conflictingLoads 213048 # Number of conflicting loads.
-system.cpu1.memDep0.conflictingStores 119189 # Number of conflicting stores.
-system.cpu1.iq.iqInstsAdded 11099753 # Number of instructions added to the IQ (excludes non-spec)
-system.cpu1.iq.iqNonSpecInstsAdded 565057 # Number of non-speculative instructions added to the IQ
-system.cpu1.iq.iqInstsIssued 10829119 # Number of instructions issued
-system.cpu1.iq.iqSquashedInstsIssued 31632 # Number of squashed instructions issued
-system.cpu1.iq.iqSquashedInstsExamined 1536258 # Number of squashed instructions iterated over during squash; mainly for profiling
-system.cpu1.iq.iqSquashedOperandsExamined 758334 # Number of squashed operands that are examined and possibly removed from graph
-system.cpu1.iq.iqSquashedNonSpecRemoved 401417 # Number of squashed non-spec instructions that were removed
-system.cpu1.iq.issued_per_cycle::samples 17001992 # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::mean 0.636932 # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::stdev 1.310611 # Number of insts issued each cycle
+system.cpu1.fetch.rateDist::total 13629786 # Number of instructions fetched each cycle (Total)
+system.cpu1.fetch.branchRate 0.164855 # Number of branch fetches per cycle
+system.cpu1.fetch.rate 0.771939 # Number of inst fetches per cycle
+system.cpu1.decode.IdleCycles 5440584 # Number of cycles decode is idle
+system.cpu1.decode.BlockedCycles 6013692 # Number of cycles decode is blocked
+system.cpu1.decode.RunCycles 1859543 # Number of cycles decode is running
+system.cpu1.decode.UnblockCycles 99467 # Number of cycles decode is unblocking
+system.cpu1.decode.SquashCycles 216499 # Number of cycles decode is squashing
+system.cpu1.decode.BranchResolved 99353 # Number of times decode resolved a branch
+system.cpu1.decode.BranchMispred 5852 # Number of times decode detected a branch misprediction
+system.cpu1.decode.DecodedInsts 10916304 # Number of instructions handled by decode
+system.cpu1.decode.SquashedInsts 17556 # Number of squashed instructions handled by decode
+system.cpu1.rename.SquashCycles 216499 # Number of cycles rename is squashing
+system.cpu1.rename.IdleCycles 5632614 # Number of cycles rename is idle
+system.cpu1.rename.BlockCycles 346968 # Number of cycles rename is blocking
+system.cpu1.rename.serializeStallCycles 5076489 # count of cycles rename stalled for serializing inst
+system.cpu1.rename.RunCycles 1765081 # Number of cycles rename is running
+system.cpu1.rename.UnblockCycles 592133 # Number of cycles rename is unblocking
+system.cpu1.rename.RenamedInsts 10097386 # Number of instructions processed by rename
+system.cpu1.rename.ROBFullEvents 38 # Number of times rename has blocked due to ROB full
+system.cpu1.rename.IQFullEvents 55596 # Number of times rename has blocked due to IQ full
+system.cpu1.rename.LSQFullEvents 134498 # Number of times rename has blocked due to LSQ full
+system.cpu1.rename.RenamedOperands 6632848 # Number of destination operands rename has renamed
+system.cpu1.rename.RenameLookups 12019300 # Number of register rename lookups that rename has made
+system.cpu1.rename.int_rename_lookups 11877082 # Number of integer rename lookups
+system.cpu1.rename.fp_rename_lookups 142218 # Number of floating rename lookups
+system.cpu1.rename.CommittedMaps 5717715 # Number of HB maps that are committed
+system.cpu1.rename.UndoneMaps 915133 # Number of HB maps that are undone due to squashing
+system.cpu1.rename.serializingInsts 422143 # count of serializing insts renamed
+system.cpu1.rename.tempSerializingInsts 38586 # count of temporary serializing insts renamed
+system.cpu1.rename.skidInsts 1845577 # count of insts added to the skid buffer
+system.cpu1.memDep0.insertedLoads 1850340 # Number of loads inserted to the mem dependence unit.
+system.cpu1.memDep0.insertedStores 1191384 # Number of stores inserted to the mem dependence unit.
+system.cpu1.memDep0.conflictingLoads 164933 # Number of conflicting loads.
+system.cpu1.memDep0.conflictingStores 85198 # Number of conflicting stores.
+system.cpu1.iq.iqInstsAdded 8855097 # Number of instructions added to the IQ (excludes non-spec)
+system.cpu1.iq.iqNonSpecInstsAdded 461396 # Number of non-speculative instructions added to the IQ
+system.cpu1.iq.iqInstsIssued 8635428 # Number of instructions issued
+system.cpu1.iq.iqSquashedInstsIssued 27588 # Number of squashed instructions issued
+system.cpu1.iq.iqSquashedInstsExamined 1251794 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu1.iq.iqSquashedOperandsExamined 621930 # Number of squashed operands that are examined and possibly removed from graph
+system.cpu1.iq.iqSquashedNonSpecRemoved 331901 # Number of squashed non-spec instructions that were removed
+system.cpu1.iq.issued_per_cycle::samples 13629786 # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::mean 0.633570 # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::stdev 1.306468 # Number of insts issued each cycle
system.cpu1.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::0 12225446 71.91% 71.91% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::1 2205450 12.97% 84.88% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::2 929224 5.47% 90.34% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::3 621702 3.66% 94.00% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::4 537509 3.16% 97.16% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::5 242497 1.43% 98.59% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::6 153407 0.90% 99.49% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::7 76904 0.45% 99.94% # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::8 9853 0.06% 100.00% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::0 9807862 71.96% 71.96% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::1 1774840 13.02% 84.98% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::2 743934 5.46% 90.44% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::3 492954 3.62% 94.06% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::4 425816 3.12% 97.18% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::5 193635 1.42% 98.60% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::6 119802 0.88% 99.48% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::7 63937 0.47% 99.95% # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::8 7006 0.05% 100.00% # Number of insts issued each cycle
system.cpu1.iq.issued_per_cycle::overflows 0 0.00% 100.00% # Number of insts issued each cycle
system.cpu1.iq.issued_per_cycle::min_value 0 # Number of insts issued each cycle
system.cpu1.iq.issued_per_cycle::max_value 8 # Number of insts issued each cycle
-system.cpu1.iq.issued_per_cycle::total 17001992 # Number of insts issued each cycle
+system.cpu1.iq.issued_per_cycle::total 13629786 # Number of insts issued each cycle
system.cpu1.iq.fu_full::No_OpClass 0 0.00% 0.00% # attempts to use FU when none available
-system.cpu1.iq.fu_full::IntAlu 3913 1.80% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::IntMult 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::IntDiv 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatAdd 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatCmp 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatCvt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatMult 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatDiv 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::FloatSqrt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdAdd 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdAddAcc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdAlu 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdCmp 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdCvt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdMisc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdMult 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdMultAcc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdShift 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdShiftAcc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdSqrt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatAdd 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatAlu 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatCmp 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatCvt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatDiv 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatMisc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatMult 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatMultAcc 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::SimdFloatSqrt 0 0.00% 1.80% # attempts to use FU when none available
-system.cpu1.iq.fu_full::MemRead 115549 53.23% 55.03% # attempts to use FU when none available
-system.cpu1.iq.fu_full::MemWrite 97618 44.97% 100.00% # attempts to use FU when none available
+system.cpu1.iq.fu_full::IntAlu 2819 1.60% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::IntMult 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::IntDiv 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatAdd 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatCmp 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatCvt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatMult 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatDiv 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::FloatSqrt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdAdd 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdAddAcc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdAlu 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdCmp 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdCvt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdMisc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdMult 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdMultAcc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdShift 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdShiftAcc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdSqrt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatAdd 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatAlu 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatCmp 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatCvt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatDiv 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatMisc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatMult 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatMultAcc 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::SimdFloatSqrt 0 0.00% 1.60% # attempts to use FU when none available
+system.cpu1.iq.fu_full::MemRead 95112 53.88% 55.48% # attempts to use FU when none available
+system.cpu1.iq.fu_full::MemWrite 78586 44.52% 100.00% # attempts to use FU when none available
system.cpu1.iq.fu_full::IprAccess 0 0.00% 100.00% # attempts to use FU when none available
system.cpu1.iq.fu_full::InstPrefetch 0 0.00% 100.00% # attempts to use FU when none available
-system.cpu1.iq.FU_type_0::No_OpClass 3526 0.03% 0.03% # Type of FU issued
-system.cpu1.iq.FU_type_0::IntAlu 6756968 62.40% 62.43% # Type of FU issued
-system.cpu1.iq.FU_type_0::IntMult 17928 0.17% 62.59% # Type of FU issued
-system.cpu1.iq.FU_type_0::IntDiv 0 0.00% 62.59% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatAdd 11481 0.11% 62.70% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatCmp 0 0.00% 62.70% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatCvt 0 0.00% 62.70% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatMult 0 0.00% 62.70% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatDiv 1763 0.02% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::FloatSqrt 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdAdd 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdAddAcc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdAlu 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdCmp 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdCvt 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdMisc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdMult 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdMultAcc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdShift 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdShiftAcc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdSqrt 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatAdd 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatAlu 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatCmp 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatCvt 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatDiv 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatMisc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatMult 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::SimdFloatSqrt 0 0.00% 62.72% # Type of FU issued
-system.cpu1.iq.FU_type_0::MemRead 2278200 21.04% 83.75% # Type of FU issued
-system.cpu1.iq.FU_type_0::MemWrite 1457808 13.46% 97.22% # Type of FU issued
-system.cpu1.iq.FU_type_0::IprAccess 301445 2.78% 100.00% # Type of FU issued
+system.cpu1.iq.FU_type_0::No_OpClass 3518 0.04% 0.04% # Type of FU issued
+system.cpu1.iq.FU_type_0::IntAlu 5368636 62.17% 62.21% # Type of FU issued
+system.cpu1.iq.FU_type_0::IntMult 14579 0.17% 62.38% # Type of FU issued
+system.cpu1.iq.FU_type_0::IntDiv 0 0.00% 62.38% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatAdd 10813 0.13% 62.50% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatCmp 0 0.00% 62.50% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatCvt 0 0.00% 62.50% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatMult 0 0.00% 62.50% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatDiv 1759 0.02% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::FloatSqrt 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdAdd 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdAddAcc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdAlu 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdCmp 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdCvt 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdMisc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdMult 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdMultAcc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdShift 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdShiftAcc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdSqrt 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatAdd 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatAlu 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatCmp 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatCvt 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatDiv 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatMisc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatMult 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatMultAcc 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::SimdFloatSqrt 0 0.00% 62.53% # Type of FU issued
+system.cpu1.iq.FU_type_0::MemRead 1836056 21.26% 83.79% # Type of FU issued
+system.cpu1.iq.FU_type_0::MemWrite 1146030 13.27% 97.06% # Type of FU issued
+system.cpu1.iq.FU_type_0::IprAccess 254037 2.94% 100.00% # Type of FU issued
system.cpu1.iq.FU_type_0::InstPrefetch 0 0.00% 100.00% # Type of FU issued
-system.cpu1.iq.FU_type_0::total 10829119 # Type of FU issued
-system.cpu1.iq.rate 0.596884 # Inst issue rate
-system.cpu1.iq.fu_busy_cnt 217080 # FU busy when requested
-system.cpu1.iq.fu_busy_rate 0.020046 # FU busy rate (busy events/executed inst)
-system.cpu1.iq.int_inst_queue_reads 38657394 # Number of integer instruction queue reads
-system.cpu1.iq.int_inst_queue_writes 13080099 # Number of integer instruction queue writes
-system.cpu1.iq.int_inst_queue_wakeup_accesses 10523969 # Number of integer instruction queue wakeup accesses
-system.cpu1.iq.fp_inst_queue_reads 251548 # Number of floating instruction queue reads
-system.cpu1.iq.fp_inst_queue_writes 122819 # Number of floating instruction queue writes
-system.cpu1.iq.fp_inst_queue_wakeup_accesses 119141 # Number of floating instruction queue wakeup accesses
-system.cpu1.iq.int_alu_accesses 10911695 # Number of integer alu accesses
-system.cpu1.iq.fp_alu_accesses 130978 # Number of floating point alu accesses
-system.cpu1.iew.lsq.thread0.forwLoads 103489 # Number of loads that had data forwarded from stores
+system.cpu1.iq.FU_type_0::total 8635428 # Type of FU issued
+system.cpu1.iq.rate 0.599541 # Inst issue rate
+system.cpu1.iq.fu_busy_cnt 176517 # FU busy when requested
+system.cpu1.iq.fu_busy_rate 0.020441 # FU busy rate (busy events/executed inst)
+system.cpu1.iq.int_inst_queue_reads 30899211 # Number of integer instruction queue reads
+system.cpu1.iq.int_inst_queue_writes 10469267 # Number of integer instruction queue writes
+system.cpu1.iq.int_inst_queue_wakeup_accesses 8392820 # Number of integer instruction queue wakeup accesses
+system.cpu1.iq.fp_inst_queue_reads 205536 # Number of floating instruction queue reads
+system.cpu1.iq.fp_inst_queue_writes 100351 # Number of floating instruction queue writes
+system.cpu1.iq.fp_inst_queue_wakeup_accesses 97198 # Number of floating instruction queue wakeup accesses
+system.cpu1.iq.int_alu_accesses 8701253 # Number of integer alu accesses
+system.cpu1.iq.fp_alu_accesses 107174 # Number of floating point alu accesses
+system.cpu1.iew.lsq.thread0.forwLoads 85247 # Number of loads that had data forwarded from stores
system.cpu1.iew.lsq.thread0.invAddrLoads 0 # Number of loads ignored due to an invalid address
-system.cpu1.iew.lsq.thread0.squashedLoads 301882 # Number of loads squashed
-system.cpu1.iew.lsq.thread0.ignoredResponses 508 # Number of memory responses ignored because the instruction is squashed
-system.cpu1.iew.lsq.thread0.memOrderViolation 1924 # Number of memory ordering violations
-system.cpu1.iew.lsq.thread0.squashedStores 130297 # Number of stores squashed
+system.cpu1.iew.lsq.thread0.squashedLoads 244767 # Number of loads squashed
+system.cpu1.iew.lsq.thread0.ignoredResponses 715 # Number of memory responses ignored because the instruction is squashed
+system.cpu1.iew.lsq.thread0.memOrderViolation 1400 # Number of memory ordering violations
+system.cpu1.iew.lsq.thread0.squashedStores 111607 # Number of stores squashed
system.cpu1.iew.lsq.thread0.invAddrSwpfs 0 # Number of software prefetches ignored due to an invalid address
system.cpu1.iew.lsq.thread0.blockedLoads 0 # Number of blocked loads due to partial load-store forwarding
-system.cpu1.iew.lsq.thread0.rescheduledLoads 383 # Number of loads that were rescheduled
-system.cpu1.iew.lsq.thread0.cacheBlocked 9692 # Number of times an access to memory failed due to the cache being blocked
+system.cpu1.iew.lsq.thread0.rescheduledLoads 264 # Number of loads that were rescheduled
+system.cpu1.iew.lsq.thread0.cacheBlocked 8613 # Number of times an access to memory failed due to the cache being blocked
system.cpu1.iew.iewIdleCycles 0 # Number of cycles IEW is idle
-system.cpu1.iew.iewSquashCycles 268198 # Number of cycles IEW is squashing
-system.cpu1.iew.iewBlockCycles 347966 # Number of cycles IEW is blocking
-system.cpu1.iew.iewUnblockCycles 52179 # Number of cycles IEW is unblocking
-system.cpu1.iew.iewDispatchedInsts 12265641 # Number of instructions dispatched to IQ
-system.cpu1.iew.iewDispSquashedInsts 165598 # Number of squashed instructions skipped by dispatch
-system.cpu1.iew.iewDispLoadInsts 2298271 # Number of dispatched load instructions
-system.cpu1.iew.iewDispStoreInsts 1513317 # Number of dispatched store instructions
-system.cpu1.iew.iewDispNonSpecInsts 508976 # Number of dispatched non-speculative instructions
-system.cpu1.iew.iewIQFullEvents 44383 # Number of times the IQ has become full, causing a stall
-system.cpu1.iew.iewLSQFullEvents 2331 # Number of times the LSQ has become full, causing a stall
-system.cpu1.iew.memOrderViolationEvents 1924 # Number of memory order violations
-system.cpu1.iew.predictedTakenIncorrect 37819 # Number of branches that were predicted taken incorrectly
-system.cpu1.iew.predictedNotTakenIncorrect 111790 # Number of branches that were predicted not taken incorrectly
-system.cpu1.iew.branchMispredicts 149609 # Number of branch mispredicts detected at execute
-system.cpu1.iew.iewExecutedInsts 10726333 # Number of executed instructions
-system.cpu1.iew.iewExecLoadInsts 2195343 # Number of load instructions executed
-system.cpu1.iew.iewExecSquashedInsts 102786 # Number of squashed instructions skipped in execute
+system.cpu1.iew.iewSquashCycles 216499 # Number of cycles IEW is squashing
+system.cpu1.iew.iewBlockCycles 208020 # Number of cycles IEW is blocking
+system.cpu1.iew.iewUnblockCycles 39541 # Number of cycles IEW is unblocking
+system.cpu1.iew.iewDispatchedInsts 9780313 # Number of instructions dispatched to IQ
+system.cpu1.iew.iewDispSquashedInsts 131211 # Number of squashed instructions skipped by dispatch
+system.cpu1.iew.iewDispLoadInsts 1850340 # Number of dispatched load instructions
+system.cpu1.iew.iewDispStoreInsts 1191384 # Number of dispatched store instructions
+system.cpu1.iew.iewDispNonSpecInsts 418145 # Number of dispatched non-speculative instructions
+system.cpu1.iew.iewIQFullEvents 33976 # Number of times the IQ has become full, causing a stall
+system.cpu1.iew.iewLSQFullEvents 1692 # Number of times the LSQ has become full, causing a stall
+system.cpu1.iew.memOrderViolationEvents 1400 # Number of memory order violations
+system.cpu1.iew.predictedTakenIncorrect 28557 # Number of branches that were predicted taken incorrectly
+system.cpu1.iew.predictedNotTakenIncorrect 89287 # Number of branches that were predicted not taken incorrectly
+system.cpu1.iew.branchMispredicts 117844 # Number of branch mispredicts detected at execute
+system.cpu1.iew.iewExecutedInsts 8559872 # Number of executed instructions
+system.cpu1.iew.iewExecLoadInsts 1771461 # Number of load instructions executed
+system.cpu1.iew.iewExecSquashedInsts 75556 # Number of squashed instructions skipped in execute
system.cpu1.iew.exec_swp 0 # number of swp insts executed
-system.cpu1.iew.exec_nop 600831 # number of nop insts executed
-system.cpu1.iew.exec_refs 3637407 # number of memory reference insts executed
-system.cpu1.iew.exec_branches 1609945 # Number of branches executed
-system.cpu1.iew.exec_stores 1442064 # Number of stores executed
-system.cpu1.iew.exec_rate 0.591218 # Inst execution rate
-system.cpu1.iew.wb_sent 10671459 # cumulative count of insts sent to commit
-system.cpu1.iew.wb_count 10643110 # cumulative count of insts written-back
-system.cpu1.iew.wb_producers 4954176 # num instructions producing a value
-system.cpu1.iew.wb_consumers 6965889 # num instructions consuming a value
+system.cpu1.iew.exec_nop 463820 # number of nop insts executed
+system.cpu1.iew.exec_refs 2903123 # number of memory reference insts executed
+system.cpu1.iew.exec_branches 1270722 # Number of branches executed
+system.cpu1.iew.exec_stores 1131662 # Number of stores executed
+system.cpu1.iew.exec_rate 0.594296 # Inst execution rate
+system.cpu1.iew.wb_sent 8515413 # cumulative count of insts sent to commit
+system.cpu1.iew.wb_count 8490018 # cumulative count of insts written-back
+system.cpu1.iew.wb_producers 3998147 # num instructions producing a value
+system.cpu1.iew.wb_consumers 5641896 # num instructions consuming a value
system.cpu1.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ
-system.cpu1.iew.wb_rate 0.586631 # insts written-back per cycle
-system.cpu1.iew.wb_fanout 0.711205 # average fanout of values written-back
+system.cpu1.iew.wb_rate 0.589446 # insts written-back per cycle
+system.cpu1.iew.wb_fanout 0.708653 # average fanout of values written-back
system.cpu1.iew.wb_penalized_rate 0 # fraction of instructions written-back that wrote to 'other' IQ
-system.cpu1.commit.commitSquashedInsts 1581528 # The number of squashed insts skipped by commit
-system.cpu1.commit.commitNonSpecStalls 163640 # The number of times commit has been forced to stall to communicate backwards
-system.cpu1.commit.branchMispredicts 139954 # The number of times a branch was mispredicted
-system.cpu1.commit.committed_per_cycle::samples 16733794 # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::mean 0.633013 # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::stdev 1.579692 # Number of insts commited each cycle
+system.cpu1.commit.commitSquashedInsts 1285480 # The number of squashed insts skipped by commit
+system.cpu1.commit.commitNonSpecStalls 129495 # The number of times commit has been forced to stall to communicate backwards
+system.cpu1.commit.branchMispredicts 111745 # The number of times a branch was mispredicted
+system.cpu1.commit.committed_per_cycle::samples 13413287 # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::mean 0.628190 # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::stdev 1.573982 # Number of insts commited each cycle
system.cpu1.commit.committed_per_cycle::underflows 0 0.00% 0.00% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::0 12789139 76.43% 76.43% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::1 1829893 10.94% 87.36% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::2 688745 4.12% 91.48% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::3 420012 2.51% 93.99% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::4 300647 1.80% 95.78% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::5 117990 0.71% 96.49% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::6 119790 0.72% 97.21% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::7 126616 0.76% 97.96% # Number of insts commited each cycle
-system.cpu1.commit.committed_per_cycle::8 340962 2.04% 100.00% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::0 10261662 76.50% 76.50% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::1 1478959 11.03% 87.53% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::2 542849 4.05% 91.58% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::3 333012 2.48% 94.06% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::4 234215 1.75% 95.81% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::5 91771 0.68% 96.49% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::6 99946 0.75% 97.24% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::7 99972 0.75% 97.98% # Number of insts commited each cycle
+system.cpu1.commit.committed_per_cycle::8 270901 2.02% 100.00% # Number of insts commited each cycle
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system.cpu1.commit.committed_per_cycle::min_value 0 # Number of insts commited each cycle
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system.cpu1.commit.bw_limited 0 # number of insts not committed due to BW limits
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-system.cpu1.committedInsts_total 10062016 # Number of Instructions Simulated
-system.cpu1.cpi 1.803094 # CPI: Cycles Per Instruction
-system.cpu1.cpi_total 1.803094 # CPI: Total CPI of All Threads
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-system.cpu1.icache.ReadReq_avg_miss_latency::total 13740.666840 # average ReadReq miss latency
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system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
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-system.cpu1.icache.ReadReq_mshr_misses::total 263995 # number of ReadReq MSHR misses
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-system.cpu1.icache.demand_mshr_misses::total 263995 # number of demand (read+write) MSHR misses
-system.cpu1.icache.overall_mshr_misses::cpu1.inst 263995 # number of overall MSHR misses
-system.cpu1.icache.overall_mshr_misses::total 263995 # number of overall MSHR misses
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-system.cpu1.icache.ReadReq_mshr_miss_latency::total 3126547000 # number of ReadReq MSHR miss cycles
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-system.cpu1.icache.demand_mshr_miss_latency::total 3126547000 # number of demand (read+write) MSHR miss cycles
-system.cpu1.icache.overall_mshr_miss_latency::cpu1.inst 3126547000 # number of overall MSHR miss cycles
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system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
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system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked
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system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu1.dcache.fast_writes 0 # number of fast writes performed
system.cpu1.dcache.cache_copies 0 # number of cache copies performed
-system.cpu1.dcache.writebacks::writebacks 84886 # number of writebacks
-system.cpu1.dcache.writebacks::total 84886 # number of writebacks
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+system.cpu1.dcache.demand_mshr_miss_latency::total 1685102993 # number of demand (read+write) MSHR miss cycles
+system.cpu1.dcache.overall_mshr_miss_latency::cpu1.data 1685102993 # number of overall MSHR miss cycles
+system.cpu1.dcache.overall_mshr_miss_latency::total 1685102993 # number of overall MSHR miss cycles
+system.cpu1.dcache.ReadReq_mshr_uncacheable_latency::cpu1.data 18098500 # number of ReadReq MSHR uncacheable cycles
+system.cpu1.dcache.ReadReq_mshr_uncacheable_latency::total 18098500 # number of ReadReq MSHR uncacheable cycles
+system.cpu1.dcache.WriteReq_mshr_uncacheable_latency::cpu1.data 603885500 # number of WriteReq MSHR uncacheable cycles
+system.cpu1.dcache.WriteReq_mshr_uncacheable_latency::total 603885500 # number of WriteReq MSHR uncacheable cycles
+system.cpu1.dcache.overall_mshr_uncacheable_latency::cpu1.data 621984000 # number of overall MSHR uncacheable cycles
+system.cpu1.dcache.overall_mshr_uncacheable_latency::total 621984000 # number of overall MSHR uncacheable cycles
+system.cpu1.dcache.ReadReq_mshr_miss_rate::cpu1.data 0.043745 # mshr miss rate for ReadReq accesses
+system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.043745 # mshr miss rate for ReadReq accesses
+system.cpu1.dcache.WriteReq_mshr_miss_rate::cpu1.data 0.032079 # mshr miss rate for WriteReq accesses
+system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.032079 # mshr miss rate for WriteReq accesses
+system.cpu1.dcache.LoadLockedReq_mshr_miss_rate::cpu1.data 0.130989 # mshr miss rate for LoadLockedReq accesses
+system.cpu1.dcache.LoadLockedReq_mshr_miss_rate::total 0.130989 # mshr miss rate for LoadLockedReq accesses
+system.cpu1.dcache.StoreCondReq_mshr_miss_rate::cpu1.data 0.095399 # mshr miss rate for StoreCondReq accesses
+system.cpu1.dcache.StoreCondReq_mshr_miss_rate::total 0.095399 # mshr miss rate for StoreCondReq accesses
+system.cpu1.dcache.demand_mshr_miss_rate::cpu1.data 0.039203 # mshr miss rate for demand accesses
+system.cpu1.dcache.demand_mshr_miss_rate::total 0.039203 # mshr miss rate for demand accesses
+system.cpu1.dcache.overall_mshr_miss_rate::cpu1.data 0.039203 # mshr miss rate for overall accesses
+system.cpu1.dcache.overall_mshr_miss_rate::total 0.039203 # mshr miss rate for overall accesses
+system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::cpu1.data 11787.209952 # average ReadReq mshr miss latency
+system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 11787.209952 # average ReadReq mshr miss latency
+system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::cpu1.data 25170.304162 # average WriteReq mshr miss latency
+system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 25170.304162 # average WriteReq mshr miss latency
+system.cpu1.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu1.data 8016.185862 # average LoadLockedReq mshr miss latency
+system.cpu1.dcache.LoadLockedReq_avg_mshr_miss_latency::total 8016.185862 # average LoadLockedReq mshr miss latency
+system.cpu1.dcache.StoreCondReq_avg_mshr_miss_latency::cpu1.data 5349 # average StoreCondReq mshr miss latency
+system.cpu1.dcache.StoreCondReq_avg_mshr_miss_latency::total 5349 # average StoreCondReq mshr miss latency
+system.cpu1.dcache.StoreCondFailReq_avg_mshr_miss_latency::cpu1.data inf # average StoreCondFailReq mshr miss latency
+system.cpu1.dcache.StoreCondFailReq_avg_mshr_miss_latency::total inf # average StoreCondFailReq mshr miss latency
+system.cpu1.dcache.demand_avg_mshr_miss_latency::cpu1.data 16050.740032 # average overall mshr miss latency
+system.cpu1.dcache.demand_avg_mshr_miss_latency::total 16050.740032 # average overall mshr miss latency
+system.cpu1.dcache.overall_avg_mshr_miss_latency::cpu1.data 16050.740032 # average overall mshr miss latency
+system.cpu1.dcache.overall_avg_mshr_miss_latency::total 16050.740032 # average overall mshr miss latency
system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data inf # average ReadReq mshr uncacheable latency
system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
system.cpu1.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu1.data inf # average WriteReq mshr uncacheable latency
@@ -1729,170 +1733,161 @@ system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data inf
system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
system.cpu1.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
-system.cpu0.kern.inst.quiesce 6610 # number of quiesce instructions executed
-system.cpu0.kern.inst.hwrei 175912 # number of hwrei instructions executed
-system.cpu0.kern.ipl_count::0 61740 40.36% 40.36% # number of times we switched to this ipl
-system.cpu0.kern.ipl_count::21 131 0.09% 40.45% # number of times we switched to this ipl
-system.cpu0.kern.ipl_count::22 1928 1.26% 41.71% # number of times we switched to this ipl
-system.cpu0.kern.ipl_count::30 255 0.17% 41.88% # number of times we switched to this ipl
-system.cpu0.kern.ipl_count::31 88907 58.12% 100.00% # number of times we switched to this ipl
-system.cpu0.kern.ipl_count::total 152961 # number of times we switched to this ipl
-system.cpu0.kern.ipl_good::0 60876 49.17% 49.17% # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_good::21 131 0.11% 49.27% # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_good::22 1928 1.56% 50.83% # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_good::30 255 0.21% 51.04% # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_good::31 60621 48.96% 100.00% # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_good::total 123811 # number of times we switched to this ipl from a different ipl
-system.cpu0.kern.ipl_ticks::0 1865672058500 98.16% 98.16% # number of cycles we spent at this ipl
-system.cpu0.kern.ipl_ticks::21 62377000 0.00% 98.16% # number of cycles we spent at this ipl
-system.cpu0.kern.ipl_ticks::22 564179500 0.03% 98.19% # number of cycles we spent at this ipl
-system.cpu0.kern.ipl_ticks::30 124028500 0.01% 98.20% # number of cycles we spent at this ipl
-system.cpu0.kern.ipl_ticks::31 34304214500 1.80% 100.00% # number of cycles we spent at this ipl
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-system.cpu0.kern.ipl_used::0 0.986006 # fraction of swpipl calls that actually changed the ipl
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+system.cpu0.kern.ipl_good::30 201 0.15% 50.94% # number of times we switched to this ipl from a different ipl
+system.cpu0.kern.ipl_good::31 64388 49.06% 100.00% # number of times we switched to this ipl from a different ipl
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+system.cpu0.kern.ipl_ticks::0 1860847795500 98.12% 98.12% # number of cycles we spent at this ipl
+system.cpu0.kern.ipl_ticks::21 64543000 0.00% 98.13% # number of cycles we spent at this ipl
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+system.cpu0.kern.ipl_ticks::30 98193500 0.01% 98.16% # number of cycles we spent at this ipl
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system.cpu0.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
system.cpu0.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl
-system.cpu0.kern.ipl_used::31 0.681847 # fraction of swpipl calls that actually changed the ipl
-system.cpu0.kern.ipl_used::total 0.809429 # fraction of swpipl calls that actually changed the ipl
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-system.cpu0.kern.syscall::20 4 1.98% 38.12% # number of syscalls executed
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-system.cpu0.kern.syscall::59 5 2.48% 74.26% # number of syscalls executed
-system.cpu0.kern.syscall::71 25 12.38% 86.63% # number of syscalls executed
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-system.cpu0.kern.syscall::92 7 3.47% 96.04% # number of syscalls executed
-system.cpu0.kern.syscall::97 2 0.99% 97.03% # number of syscalls executed
-system.cpu0.kern.syscall::98 2 0.99% 98.02% # number of syscalls executed
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+system.cpu0.kern.syscall::total 234 # number of syscalls executed
system.cpu0.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
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-system.cpu0.kern.callpal::wrmces 1 0.00% 0.22% # number of callpals executed
-system.cpu0.kern.callpal::wrfen 1 0.00% 0.22% # number of callpals executed
-system.cpu0.kern.callpal::wrvptptr 1 0.00% 0.23% # number of callpals executed
-system.cpu0.kern.callpal::swpctx 3342 2.08% 2.30% # number of callpals executed
-system.cpu0.kern.callpal::tbi 48 0.03% 2.33% # number of callpals executed
-system.cpu0.kern.callpal::wrent 7 0.00% 2.33% # number of callpals executed
-system.cpu0.kern.callpal::swpipl 146221 90.79% 93.12% # number of callpals executed
-system.cpu0.kern.callpal::rdps 6169 3.83% 96.95% # number of callpals executed
-system.cpu0.kern.callpal::wrkgp 1 0.00% 96.95% # number of callpals executed
-system.cpu0.kern.callpal::wrusp 3 0.00% 96.95% # number of callpals executed
-system.cpu0.kern.callpal::rdusp 8 0.00% 96.96% # number of callpals executed
-system.cpu0.kern.callpal::whami 2 0.00% 96.96% # number of callpals executed
-system.cpu0.kern.callpal::rti 4425 2.75% 99.71% # number of callpals executed
-system.cpu0.kern.callpal::callsys 333 0.21% 99.91% # number of callpals executed
-system.cpu0.kern.callpal::imb 137 0.09% 100.00% # number of callpals executed
-system.cpu0.kern.callpal::total 161059 # number of callpals executed
-system.cpu0.kern.mode_switch::kernel 6926 # number of protection mode switches
-system.cpu0.kern.mode_switch::user 1257 # number of protection mode switches
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system.cpu0.kern.mode_switch::idle 0 # number of protection mode switches
-system.cpu0.kern.mode_good::kernel 1256
-system.cpu0.kern.mode_good::user 1257
+system.cpu0.kern.mode_good::kernel 1369
+system.cpu0.kern.mode_good::user 1370
system.cpu0.kern.mode_good::idle 0
-system.cpu0.kern.mode_switch_good::kernel 0.181346 # fraction of useful protection mode switches
+system.cpu0.kern.mode_switch_good::kernel 0.190324 # fraction of useful protection mode switches
system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches
-system.cpu0.kern.mode_switch_good::total 0.307100 # fraction of useful protection mode switches
-system.cpu0.kern.mode_ticks::kernel 1898828643000 99.90% 99.90% # number of ticks spent at the given mode
-system.cpu0.kern.mode_ticks::user 1898207000 0.10% 100.00% # number of ticks spent at the given mode
+system.cpu0.kern.mode_switch_good::total 0.319865 # fraction of useful protection mode switches
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system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode
-system.cpu0.kern.swap_context 3343 # number of times the context was actually changed
+system.cpu0.kern.swap_context 3553 # number of times the context was actually changed
system.cpu1.kern.inst.arm 0 # number of arm instructions executed
-system.cpu1.kern.inst.quiesce 2523 # number of quiesce instructions executed
-system.cpu1.kern.inst.hwrei 64668 # number of hwrei instructions executed
-system.cpu1.kern.ipl_count::0 20885 37.61% 37.61% # number of times we switched to this ipl
-system.cpu1.kern.ipl_count::22 1927 3.47% 41.08% # number of times we switched to this ipl
-system.cpu1.kern.ipl_count::30 359 0.65% 41.72% # number of times we switched to this ipl
-system.cpu1.kern.ipl_count::31 32365 58.28% 100.00% # number of times we switched to this ipl
-system.cpu1.kern.ipl_count::total 55536 # number of times we switched to this ipl
-system.cpu1.kern.ipl_good::0 20372 47.74% 47.74% # number of times we switched to this ipl from a different ipl
-system.cpu1.kern.ipl_good::22 1927 4.52% 52.26% # number of times we switched to this ipl from a different ipl
-system.cpu1.kern.ipl_good::30 359 0.84% 53.10% # number of times we switched to this ipl from a different ipl
-system.cpu1.kern.ipl_good::31 20014 46.90% 100.00% # number of times we switched to this ipl from a different ipl
-system.cpu1.kern.ipl_good::total 42672 # number of times we switched to this ipl from a different ipl
-system.cpu1.kern.ipl_ticks::0 1875010715500 98.66% 98.66% # number of cycles we spent at this ipl
-system.cpu1.kern.ipl_ticks::22 532408500 0.03% 98.69% # number of cycles we spent at this ipl
-system.cpu1.kern.ipl_ticks::30 162327000 0.01% 98.70% # number of cycles we spent at this ipl
-system.cpu1.kern.ipl_ticks::31 24731034000 1.30% 100.00% # number of cycles we spent at this ipl
-system.cpu1.kern.ipl_ticks::total 1900436485000 # number of cycles we spent at this ipl
-system.cpu1.kern.ipl_used::0 0.975437 # fraction of swpipl calls that actually changed the ipl
+system.cpu1.kern.inst.quiesce 2383 # number of quiesce instructions executed
+system.cpu1.kern.inst.hwrei 53842 # number of hwrei instructions executed
+system.cpu1.kern.ipl_count::0 16791 36.23% 36.23% # number of times we switched to this ipl
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+system.cpu1.kern.ipl_count::30 284 0.61% 40.99% # number of times we switched to this ipl
+system.cpu1.kern.ipl_count::31 27352 59.01% 100.00% # number of times we switched to this ipl
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+system.cpu1.kern.ipl_good::0 16391 47.23% 47.23% # number of times we switched to this ipl from a different ipl
+system.cpu1.kern.ipl_good::22 1921 5.54% 52.77% # number of times we switched to this ipl from a different ipl
+system.cpu1.kern.ipl_good::30 284 0.82% 53.59% # number of times we switched to this ipl from a different ipl
+system.cpu1.kern.ipl_good::31 16107 46.41% 100.00% # number of times we switched to this ipl from a different ipl
+system.cpu1.kern.ipl_good::total 34703 # number of times we switched to this ipl from a different ipl
+system.cpu1.kern.ipl_ticks::0 1871184919000 98.69% 98.69% # number of cycles we spent at this ipl
+system.cpu1.kern.ipl_ticks::22 531151500 0.03% 98.71% # number of cycles we spent at this ipl
+system.cpu1.kern.ipl_ticks::30 127549500 0.01% 98.72% # number of cycles we spent at this ipl
+system.cpu1.kern.ipl_ticks::31 24258165000 1.28% 100.00% # number of cycles we spent at this ipl
+system.cpu1.kern.ipl_ticks::total 1896101785000 # number of cycles we spent at this ipl
+system.cpu1.kern.ipl_used::0 0.976178 # fraction of swpipl calls that actually changed the ipl
system.cpu1.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
system.cpu1.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl
-system.cpu1.kern.ipl_used::31 0.618384 # fraction of swpipl calls that actually changed the ipl
-system.cpu1.kern.ipl_used::total 0.768366 # fraction of swpipl calls that actually changed the ipl
-system.cpu1.kern.syscall::2 1 0.81% 0.81% # number of syscalls executed
-system.cpu1.kern.syscall::3 14 11.29% 12.10% # number of syscalls executed
-system.cpu1.kern.syscall::6 13 10.48% 22.58% # number of syscalls executed
-system.cpu1.kern.syscall::15 1 0.81% 23.39% # number of syscalls executed
-system.cpu1.kern.syscall::17 6 4.84% 28.23% # number of syscalls executed
-system.cpu1.kern.syscall::19 3 2.42% 30.65% # number of syscalls executed
-system.cpu1.kern.syscall::20 2 1.61% 32.26% # number of syscalls executed
-system.cpu1.kern.syscall::23 3 2.42% 34.68% # number of syscalls executed
-system.cpu1.kern.syscall::24 3 2.42% 37.10% # number of syscalls executed
-system.cpu1.kern.syscall::33 4 3.23% 40.32% # number of syscalls executed
-system.cpu1.kern.syscall::45 20 16.13% 56.45% # number of syscalls executed
-system.cpu1.kern.syscall::47 3 2.42% 58.87% # number of syscalls executed
-system.cpu1.kern.syscall::48 2 1.61% 60.48% # number of syscalls executed
-system.cpu1.kern.syscall::54 1 0.81% 61.29% # number of syscalls executed
-system.cpu1.kern.syscall::59 2 1.61% 62.90% # number of syscalls executed
-system.cpu1.kern.syscall::71 29 23.39% 86.29% # number of syscalls executed
-system.cpu1.kern.syscall::74 10 8.06% 94.35% # number of syscalls executed
-system.cpu1.kern.syscall::90 1 0.81% 95.16% # number of syscalls executed
-system.cpu1.kern.syscall::92 2 1.61% 96.77% # number of syscalls executed
-system.cpu1.kern.syscall::132 3 2.42% 99.19% # number of syscalls executed
-system.cpu1.kern.syscall::144 1 0.81% 100.00% # number of syscalls executed
-system.cpu1.kern.syscall::total 124 # number of syscalls executed
+system.cpu1.kern.ipl_used::31 0.588878 # fraction of swpipl calls that actually changed the ipl
+system.cpu1.kern.ipl_used::total 0.748749 # fraction of swpipl calls that actually changed the ipl
+system.cpu1.kern.syscall::3 10 10.87% 10.87% # number of syscalls executed
+system.cpu1.kern.syscall::6 9 9.78% 20.65% # number of syscalls executed
+system.cpu1.kern.syscall::15 1 1.09% 21.74% # number of syscalls executed
+system.cpu1.kern.syscall::17 5 5.43% 27.17% # number of syscalls executed
+system.cpu1.kern.syscall::23 3 3.26% 30.43% # number of syscalls executed
+system.cpu1.kern.syscall::24 3 3.26% 33.70% # number of syscalls executed
+system.cpu1.kern.syscall::33 3 3.26% 36.96% # number of syscalls executed
+system.cpu1.kern.syscall::45 15 16.30% 53.26% # number of syscalls executed
+system.cpu1.kern.syscall::47 3 3.26% 56.52% # number of syscalls executed
+system.cpu1.kern.syscall::59 1 1.09% 57.61% # number of syscalls executed
+system.cpu1.kern.syscall::71 27 29.35% 86.96% # number of syscalls executed
+system.cpu1.kern.syscall::74 9 9.78% 96.74% # number of syscalls executed
+system.cpu1.kern.syscall::132 3 3.26% 100.00% # number of syscalls executed
+system.cpu1.kern.syscall::total 92 # number of syscalls executed
system.cpu1.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
-system.cpu1.kern.callpal::wripir 255 0.44% 0.44% # number of callpals executed
-system.cpu1.kern.callpal::wrmces 1 0.00% 0.45% # number of callpals executed
-system.cpu1.kern.callpal::wrfen 1 0.00% 0.45% # number of callpals executed
-system.cpu1.kern.callpal::swpctx 1393 2.41% 2.86% # number of callpals executed
-system.cpu1.kern.callpal::tbi 6 0.01% 2.87% # number of callpals executed
-system.cpu1.kern.callpal::wrent 7 0.01% 2.88% # number of callpals executed
-system.cpu1.kern.callpal::swpipl 49964 86.52% 89.41% # number of callpals executed
-system.cpu1.kern.callpal::rdps 2595 4.49% 93.90% # number of callpals executed
-system.cpu1.kern.callpal::wrkgp 1 0.00% 93.90% # number of callpals executed
-system.cpu1.kern.callpal::wrusp 4 0.01% 93.91% # number of callpals executed
-system.cpu1.kern.callpal::rdusp 1 0.00% 93.91% # number of callpals executed
-system.cpu1.kern.callpal::whami 3 0.01% 93.91% # number of callpals executed
-system.cpu1.kern.callpal::rti 3286 5.69% 99.61% # number of callpals executed
-system.cpu1.kern.callpal::callsys 184 0.32% 99.92% # number of callpals executed
-system.cpu1.kern.callpal::imb 43 0.07% 100.00% # number of callpals executed
+system.cpu1.kern.callpal::wripir 201 0.42% 0.42% # number of callpals executed
+system.cpu1.kern.callpal::wrmces 1 0.00% 0.43% # number of callpals executed
+system.cpu1.kern.callpal::wrfen 1 0.00% 0.43% # number of callpals executed
+system.cpu1.kern.callpal::swpctx 1067 2.24% 2.67% # number of callpals executed
+system.cpu1.kern.callpal::tbi 3 0.01% 2.67% # number of callpals executed
+system.cpu1.kern.callpal::wrent 7 0.01% 2.69% # number of callpals executed
+system.cpu1.kern.callpal::swpipl 41171 86.33% 89.01% # number of callpals executed
+system.cpu1.kern.callpal::rdps 2098 4.40% 93.41% # number of callpals executed
+system.cpu1.kern.callpal::wrkgp 1 0.00% 93.41% # number of callpals executed
+system.cpu1.kern.callpal::wrusp 3 0.01% 93.42% # number of callpals executed
+system.cpu1.kern.callpal::whami 3 0.01% 93.43% # number of callpals executed
+system.cpu1.kern.callpal::rti 2971 6.23% 99.66% # number of callpals executed
+system.cpu1.kern.callpal::callsys 121 0.25% 99.91% # number of callpals executed
+system.cpu1.kern.callpal::imb 42 0.09% 100.00% # number of callpals executed
system.cpu1.kern.callpal::rdunique 1 0.00% 100.00% # number of callpals executed
-system.cpu1.kern.callpal::total 57746 # number of callpals executed
-system.cpu1.kern.mode_switch::kernel 1619 # number of protection mode switches
-system.cpu1.kern.mode_switch::user 488 # number of protection mode switches
-system.cpu1.kern.mode_switch::idle 2559 # number of protection mode switches
-system.cpu1.kern.mode_good::kernel 771
-system.cpu1.kern.mode_good::user 488
-system.cpu1.kern.mode_good::idle 283
-system.cpu1.kern.mode_switch_good::kernel 0.476220 # fraction of useful protection mode switches
+system.cpu1.kern.callpal::total 47692 # number of callpals executed
+system.cpu1.kern.mode_switch::kernel 1242 # number of protection mode switches
+system.cpu1.kern.mode_switch::user 368 # number of protection mode switches
+system.cpu1.kern.mode_switch::idle 2406 # number of protection mode switches
+system.cpu1.kern.mode_good::kernel 576
+system.cpu1.kern.mode_good::user 368
+system.cpu1.kern.mode_good::idle 208
+system.cpu1.kern.mode_switch_good::kernel 0.463768 # fraction of useful protection mode switches
system.cpu1.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
-system.cpu1.kern.mode_switch_good::idle 0.110590 # fraction of useful protection mode switches
-system.cpu1.kern.mode_switch_good::total 0.330476 # fraction of useful protection mode switches
-system.cpu1.kern.mode_ticks::kernel 5768410500 0.30% 0.30% # number of ticks spent at the given mode
-system.cpu1.kern.mode_ticks::user 833727500 0.04% 0.35% # number of ticks spent at the given mode
-system.cpu1.kern.mode_ticks::idle 1893823776000 99.65% 100.00% # number of ticks spent at the given mode
-system.cpu1.kern.swap_context 1394 # number of times the context was actually changed
+system.cpu1.kern.mode_switch_good::idle 0.086451 # fraction of useful protection mode switches
+system.cpu1.kern.mode_switch_good::total 0.286853 # fraction of useful protection mode switches
+system.cpu1.kern.mode_ticks::kernel 4070064000 0.21% 0.21% # number of ticks spent at the given mode
+system.cpu1.kern.mode_ticks::user 689483000 0.04% 0.25% # number of ticks spent at the given mode
+system.cpu1.kern.mode_ticks::idle 1891020032000 99.75% 100.00% # number of ticks spent at the given mode
+system.cpu1.kern.swap_context 1068 # number of times the context was actually changed
---------- End Simulation Statistics ----------