tests: update reference outputs

Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes.  There are a few stats.txt updates too, but
they are in the minority.

3 files changed, 111 insertions, 62 deletions

diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
index d2daed3ce..d23f48fda 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
@@ -8,10 +8,11 @@ time_sync_spin_threshold=100000000
 
 [system]
 type=LinuxAlphaSystem
-children=bridge cpu disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami
+children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
 boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
-clock=1000
+cache_line_size=64
+clk_domain=system.clk_domain
 console=/dist/m5/system/binaries/console
 init_param=0
 kernel=/dist/m5/system/binaries/vmlinux
@@ -36,7 +37,7 @@ system_port=system.membus.slave[0]
 
 [system.bridge]
 type=Bridge
-clock=1000
+clk_domain=system.clk_domain
 delay=50000
 ranges=8796093022208:18446744073709551615
 req_size=16
@@ -44,6 +45,11 @@ resp_size=16
 master=system.iobus.slave[0]
 slave=system.membus.master[0]
 
+[system.clk_domain]
+type=SrcClockDomain
+clock=1000
+voltage_domain=system.voltage_domain
+
 [system.cpu]
 type=DerivO3CPU
 children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
@@ -58,7 +64,7 @@ backComSize=5
 branchPred=system.cpu.branchPred
 cachePorts=200
 checker=Null
-clock=500
+clk_domain=system.cpu_clk_domain
 commitToDecodeDelay=1
 commitToFetchDelay=1
 commitToIEWDelay=1
@@ -137,11 +143,9 @@ RASSize=16
 choiceCtrBits=2
 choicePredictorSize=8192
 globalCtrBits=2
-globalHistoryBits=13
 globalPredictorSize=8192
 instShiftAmt=2
 localCtrBits=2
-localHistoryBits=11
 localHistoryTableSize=2048
 localPredictorSize=2048
 numThreads=1
@@ -149,10 +153,10 @@ predType=tournament
 
 [system.cpu.dcache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -163,12 +167,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu.dcache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
 mem_side=system.cpu.toL2Bus.slave[1]
 
+[system.cpu.dcache.tags]
+type=LRU
+assoc=4
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu.dtb]
 type=AlphaTLB
 size=64
@@ -438,10 +451,10 @@ opLat=3
 
 [system.cpu.icache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -452,12 +465,21 @@ prefetcher=Null
 response_latency=2
 size=32768
 system=system
+tags=system.cpu.icache.tags
 tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
 mem_side=system.cpu.toL2Bus.slave[0]
 
+[system.cpu.icache.tags]
+type=LRU
+assoc=1
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=2
+size=32768
+
 [system.cpu.interrupts]
 type=AlphaInterrupts
 
@@ -470,10 +492,10 @@ size=48
 
 [system.cpu.l2cache]
 type=BaseCache
+children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 forward_snoops=true
 hit_latency=20
 is_top_level=false
@@ -484,16 +506,24 @@ prefetcher=Null
 response_latency=20
 size=4194304
 system=system
+tags=system.cpu.l2cache.tags
 tgts_per_mshr=12
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.master[0]
 mem_side=system.membus.slave[1]
 
+[system.cpu.l2cache.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.cpu_clk_domain
+hit_latency=20
+size=4194304
+
 [system.cpu.toL2Bus]
 type=CoherentBus
-block_size=64
-clock=500
+clk_domain=system.cpu_clk_domain
 header_cycles=1
 system=system
 use_default_range=false
@@ -504,6 +534,11 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 [system.cpu.tracer]
 type=ExeTracer
 
+[system.cpu_clk_domain]
+type=SrcClockDomain
+clock=500
+voltage_domain=system.voltage_domain
+
 [system.disk0]
 type=IdeDisk
 children=image
@@ -550,8 +585,7 @@ sys=system
 
 [system.iobus]
 type=NoncoherentBus
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
 header_cycles=1
 use_default_range=true
 width=8
@@ -561,10 +595,10 @@ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
 
 [system.iocache]
 type=BaseCache
+children=tags
 addr_ranges=0:134217727
 assoc=8
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
 forward_snoops=false
 hit_latency=50
 is_top_level=true
@@ -575,17 +609,25 @@ prefetcher=Null
 response_latency=50
 size=1024
 system=system
+tags=system.iocache.tags
 tgts_per_mshr=12
 two_queue=false
 write_buffers=8
 cpu_side=system.iobus.master[29]
 mem_side=system.membus.slave[2]
 
+[system.iocache.tags]
+type=LRU
+assoc=8
+block_size=64
+clk_domain=system.clk_domain
+hit_latency=50
+size=1024
+
 [system.membus]
 type=CoherentBus
 children=badaddr_responder
-block_size=64
-clock=1000
+clk_domain=system.clk_domain
 header_cycles=1
 system=system
 use_default_range=false
@@ -596,7 +638,7 @@ slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 
 [system.membus.badaddr_responder]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=0
 pio_latency=100000
@@ -614,19 +656,24 @@ pio=system.membus.default
 [system.physmem]
 type=SimpleDRAM
 activation_limit=4
-addr_mapping=openmap
+addr_mapping=RaBaChCo
 banks_per_rank=8
+burst_length=8
 channels=1
-clock=1000
-conf_table_reported=false
+clk_domain=system.clk_domain
+conf_table_reported=true
+device_bus_width=8
+device_rowbuffer_size=1024
+devices_per_rank=8
 in_addr_map=true
-lines_per_rowbuffer=32
 mem_sched_policy=frfcfs
 null=false
 page_policy=open
 range=0:134217727
 ranks_per_channel=2
 read_buffer_size=32
+static_backend_latency=10000
+static_frontend_latency=10000
 tBURST=5000
 tCL=13750
 tRCD=13750
@@ -637,7 +684,6 @@ tWTR=7500
 tXAW=40000
 write_buffer_size=32
 write_thresh_perc=70
-zero=false
 port=system.membus.master[1]
 
 [system.simple_disk]
@@ -666,7 +712,7 @@ system=system
 
 [system.tsunami.backdoor]
 type=AlphaBackdoor
-clock=1000
+clk_domain=system.clk_domain
 cpu=system.cpu
 disk=system.simple_disk
 pio_addr=8804682956800
@@ -678,7 +724,7 @@ pio=system.iobus.master[24]
 
 [system.tsunami.cchip]
 type=TsunamiCChip
-clock=1000
+clk_domain=system.clk_domain
 pio_addr=8803072344064
 pio_latency=100000
 system=system
@@ -725,7 +771,7 @@ SubClassCode=0
 SubsystemID=0
 SubsystemVendorID=0
 VendorID=4107
-clock=2000
+clk_domain=system.clk_domain
 config_latency=20000
 dma_data_free=false
 dma_desc_free=false
@@ -756,7 +802,7 @@ pio=system.iobus.master[27]
 
 [system.tsunami.fake_OROM]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8796093677568
 pio_latency=100000
@@ -773,7 +819,7 @@ pio=system.iobus.master[8]
 
 [system.tsunami.fake_ata0]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848432
 pio_latency=100000
@@ -790,7 +836,7 @@ pio=system.iobus.master[19]
 
 [system.tsunami.fake_ata1]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848304
 pio_latency=100000
@@ -807,7 +853,7 @@ pio=system.iobus.master[20]
 
 [system.tsunami.fake_pnp_addr]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848569
 pio_latency=100000
@@ -824,7 +870,7 @@ pio=system.iobus.master[9]
 
 [system.tsunami.fake_pnp_read0]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848451
 pio_latency=100000
@@ -841,7 +887,7 @@ pio=system.iobus.master[11]
 
 [system.tsunami.fake_pnp_read1]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848515
 pio_latency=100000
@@ -858,7 +904,7 @@ pio=system.iobus.master[12]
 
 [system.tsunami.fake_pnp_read2]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848579
 pio_latency=100000
@@ -875,7 +921,7 @@ pio=system.iobus.master[13]
 
 [system.tsunami.fake_pnp_read3]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848643
 pio_latency=100000
@@ -892,7 +938,7 @@ pio=system.iobus.master[14]
 
 [system.tsunami.fake_pnp_read4]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848707
 pio_latency=100000
@@ -909,7 +955,7 @@ pio=system.iobus.master[15]
 
 [system.tsunami.fake_pnp_read5]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848771
 pio_latency=100000
@@ -926,7 +972,7 @@ pio=system.iobus.master[16]
 
 [system.tsunami.fake_pnp_read6]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848835
 pio_latency=100000
@@ -943,7 +989,7 @@ pio=system.iobus.master[17]
 
 [system.tsunami.fake_pnp_read7]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848899
 pio_latency=100000
@@ -960,7 +1006,7 @@ pio=system.iobus.master[18]
 
 [system.tsunami.fake_pnp_write]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615850617
 pio_latency=100000
@@ -977,7 +1023,7 @@ pio=system.iobus.master[10]
 
 [system.tsunami.fake_ppc]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848891
 pio_latency=100000
@@ -994,7 +1040,7 @@ pio=system.iobus.master[7]
 
 [system.tsunami.fake_sm_chip]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848816
 pio_latency=100000
@@ -1011,7 +1057,7 @@ pio=system.iobus.master[2]
 
 [system.tsunami.fake_uart1]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848696
 pio_latency=100000
@@ -1028,7 +1074,7 @@ pio=system.iobus.master[3]
 
 [system.tsunami.fake_uart2]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848936
 pio_latency=100000
@@ -1045,7 +1091,7 @@ pio=system.iobus.master[4]
 
 [system.tsunami.fake_uart3]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848680
 pio_latency=100000
@@ -1062,7 +1108,7 @@ pio=system.iobus.master[5]
 
 [system.tsunami.fake_uart4]
 type=IsaFake
-clock=1000
+clk_domain=system.clk_domain
 fake_mem=false
 pio_addr=8804615848944
 pio_latency=100000
@@ -1079,7 +1125,7 @@ pio=system.iobus.master[6]
 
 [system.tsunami.fb]
 type=BadDevice
-clock=1000
+clk_domain=system.clk_domain
 devicename=FrameBuffer
 pio_addr=8804615848912
 pio_latency=100000
@@ -1126,7 +1172,7 @@ SubClassCode=1
 SubsystemID=0
 SubsystemVendorID=0
 VendorID=32902
-clock=1000
+clk_domain=system.clk_domain
 config_latency=20000
 ctrl_offset=0
 disks=system.disk0 system.disk2
@@ -1143,7 +1189,7 @@ pio=system.iobus.master[25]
 
 [system.tsunami.io]
 type=TsunamiIO
-clock=1000
+clk_domain=system.clk_domain
 frequency=976562500
 pio_addr=8804615847936
 pio_latency=100000
@@ -1155,7 +1201,7 @@ pio=system.iobus.master[22]
 
 [system.tsunami.pchip]
 type=TsunamiPChip
-clock=1000
+clk_domain=system.clk_domain
 pio_addr=8802535473152
 pio_latency=100000
 system=system
@@ -1165,7 +1211,8 @@ pio=system.iobus.master[1]
 [system.tsunami.pciconfig]
 type=PciConfigAll
 bus=0
-clock=1000
+clk_domain=system.clk_domain
+pio_addr=0
 pio_latency=30000
 platform=system.tsunami
 size=16777216
@@ -1174,7 +1221,7 @@ pio=system.iobus.default
 
 [system.tsunami.uart]
 type=Uart8250
-clock=1000
+clk_domain=system.clk_domain
 pio_addr=8804615848952
 pio_latency=100000
 platform=system.tsunami
@@ -1182,3 +1229,7 @@ system=system
 terminal=system.terminal
 pio=system.iobus.master[23]
 
+[system.voltage_domain]
+type=VoltageDomain
+voltage=1.000000
+
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
index e4e5656be..646f2a7f4 100755
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
@@ -1,14 +1,12 @@
-Redirecting stdout to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3/simout
-Redirecting stderr to build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Mar 26 2013 14:38:52
-gem5 started Mar 26 2013 23:18:16
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Sep 24 2013 03:08:53
+gem5 started Sep 28 2013 10:33:00
+gem5 executing on zizzer
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3 -re tests/run.py build/ALPHA/tests/opt/long/fs/10.linux-boot/alpha/linux/tsunami-o3
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux
+info: kernel located at: /dist/m5/system/binaries/vmlinux
       0: system.tsunami.io.rtc: Real-time clock set to Thu Jan  1 00:00:00 2009
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 1854315933000 because m5_exit instruction encountered
+Exiting @ tick 1860200687500 because m5_exit instruction encountered
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal
index 1b4012ef1..f09f72d29 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal
@@ -24,7 +24,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
 
memcluster 1, usage 0, start      392, end    16384
 
freeing pages 1069:16384
 
reserving pages 1069:1070
-
4096K Bcache detected; load hit latency 32 cycles, load miss latency 115 cycles
+
4096K Bcache detected; load hit latency 30 cycles, load miss latency 134 cycles
 
SMP: 1 CPUs probed -- cpu_present_mask = 1
 
Built 1 zonelists
 
Kernel command line: root=/dev/hda1 console=ttyS0