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authorAndreas Sandberg <andreas.sandberg@arm.com>2016-06-06 17:16:44 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2016-06-06 17:16:44 +0100
commit85997e66a08b71d701e5b41462d1cfd42660b0c7 (patch)
treebc242f1a2bfc3a92b18da04805d9ebd8864b5320 /tests/long/fs/10.linux-boot/ref/alpha/linux
parent21b66f45422bc449d4a8b86ab452d6b6ae5838bf (diff)
downloadgem5-85997e66a08b71d701e5b41462d1cfd42660b0c7.tar.xz
stats: Add power stats to test references
Change-Id: Ic827213134b199446822f128b81d4a480e777fee
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/alpha/linux')
-rw-r--r--tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt62
-rw-r--r--tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt77
-rw-r--r--tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt62
-rw-r--r--tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt82
4 files changed, 263 insertions, 20 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
index 2f001f46a..ba2f5bb49 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-minor/stats.txt
@@ -4,15 +4,16 @@ sim_seconds 1.907083 # Nu
sim_ticks 1907083088000 # Number of ticks simulated
final_tick 1907083088000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 20329 # Simulator instruction rate (inst/s)
-host_op_rate 20329 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 690572794 # Simulator tick rate (ticks/s)
-host_mem_usage 384580 # Number of bytes of host memory used
-host_seconds 2761.60 # Real time elapsed on the host
+host_inst_rate 17729 # Simulator instruction rate (inst/s)
+host_op_rate 17729 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 602270723 # Simulator tick rate (ticks/s)
+host_mem_usage 432228 # Number of bytes of host memory used
+host_seconds 3166.49 # Real time elapsed on the host
sim_insts 56139550 # Number of instructions simulated
sim_ops 56139550 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.physmem.bytes_read::cpu.inst 1045632 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 24852608 # Number of bytes read from this memory
system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
@@ -299,6 +300,8 @@ system.physmem_1.memoryStateTime::REF 63681540000 # Ti
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_1.memoryStateTime::ACT 40135521250 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.bridge.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.branchPred.lookups 15213605 # Number of BP lookups
system.cpu.branchPred.condPredicted 13089935 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 512661 # Number of conditional branches incorrect
@@ -345,6 +348,16 @@ system.cpu.itb.data_hits 0 # DT
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
+system.cpu.numPwrStateTransitions 12752 # Number of power state transitions
+system.cpu.pwrStateClkGateDist::samples 6376 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::mean 281609048.541405 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::stdev 439540029.573258 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::1000-5e+10 6376 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::min_value 10500 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::total 6376 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateResidencyTicks::ON 111543794500 # Cumulative time (in ticks) in various power states
+system.cpu.pwrStateResidencyTicks::CLK_GATED 1795539293500 # Cumulative time (in ticks) in various power states
system.cpu.numCycles 223105667 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -477,6 +490,7 @@ system.cpu.kern.mode_ticks::idle 1863670965500 97.72% 100.00% # n
system.cpu.kern.swap_context 4178 # number of times the context was actually changed
system.cpu.tickCycles 85299333 # Number of cycles that the object actually ticked
system.cpu.idleCycles 137806334 # Total number of cycles that the object has spent stopped
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.dcache.tags.replacements 1394573 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.976747 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 13828974 # Total number of references to valid blocks.
@@ -493,6 +507,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::2 69
system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses 63880747 # Number of tag accesses
system.cpu.dcache.tags.data_accesses 63880747 # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.dcache.ReadReq_hits::cpu.data 7869575 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 7869575 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 5576818 # number of WriteReq hits
@@ -629,6 +644,7 @@ system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 220578.354978
system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total 220578.354978 # average ReadReq mshr uncacheable latency
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data 92346.281641 # average overall mshr uncacheable latency
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total 92346.281641 # average overall mshr uncacheable latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.icache.tags.replacements 1471396 # number of replacements
system.cpu.icache.tags.tagsinuse 508.107952 # Cycle average of tags in use
system.cpu.icache.tags.total_refs 19138982 # Total number of references to valid blocks.
@@ -645,6 +661,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::2 405
system.cpu.icache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses 22083145 # Number of tag accesses
system.cpu.icache.tags.data_accesses 22083145 # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.icache.ReadReq_hits::cpu.inst 19138985 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 19138985 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 19138985 # number of demand (read+write) hits
@@ -713,6 +730,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 13369.070974
system.cpu.icache.demand_avg_mshr_miss_latency::total 13369.070974 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 13369.070974 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 13369.070974 # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.l2cache.tags.replacements 339491 # number of replacements
system.cpu.l2cache.tags.tagsinuse 65257.604073 # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs 5020229 # Total number of references to valid blocks.
@@ -735,6 +753,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4 55510
system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994308 # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses 46558497 # Number of tag accesses
system.cpu.l2cache.tags.data_accesses 46558497 # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.l2cache.WritebackDirty_hits::writebacks 837991 # number of WritebackDirty hits
system.cpu.l2cache.WritebackDirty_hits::total 837991 # number of WritebackDirty hits
system.cpu.l2cache.WritebackClean_hits::writebacks 1470820 # number of WritebackClean hits
@@ -911,6 +930,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 1963
system.cpu.toL2Bus.snoop_filter.tot_snoops 1250 # Total number of snoops made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1250 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.cpu.toL2Bus.trans_dist::ReadReq 6930 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadResp 2570147 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteReq 9623 # Transaction distribution
@@ -964,6 +984,7 @@ system.disk2.dma_read_txs 0 # Nu
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
+system.iobus.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.iobus.trans_dist::ReadReq 7103 # Transaction distribution
system.iobus.trans_dist::ReadResp 7103 # Transaction distribution
system.iobus.trans_dist::WriteReq 51175 # Transaction distribution
@@ -1018,6 +1039,7 @@ system.iobus.respLayer0.occupancy 23483000 # La
system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.respLayer1.occupancy 41946000 # Layer occupancy (ticks)
system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
+system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.iocache.tags.replacements 41685 # number of replacements
system.iocache.tags.tagsinuse 1.298739 # Cycle average of tags in use
system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
@@ -1032,6 +1054,7 @@ system.iocache.tags.age_task_id_blocks_1023::2 16
system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
system.iocache.tags.tag_accesses 375525 # Number of tag accesses
system.iocache.tags.data_accesses 375525 # Number of data accesses
+system.iocache.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.iocache.ReadReq_misses::tsunami.ide 173 # number of ReadReq misses
system.iocache.ReadReq_misses::total 173 # number of ReadReq misses
system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
@@ -1112,6 +1135,7 @@ system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 76193.945261
system.iocache.demand_avg_mshr_miss_latency::total 76193.945261 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 76193.945261 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::total 76193.945261 # average overall mshr miss latency
+system.membus.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.membus.trans_dist::ReadReq 6930 # Transaction distribution
system.membus.trans_dist::ReadResp 295608 # Transaction distribution
system.membus.trans_dist::WriteReq 9623 # Transaction distribution
@@ -1160,6 +1184,11 @@ system.membus.respLayer1.occupancy 2159448000 # La
system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
system.membus.respLayer2.occupancy 943117 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
+system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
@@ -1191,5 +1220,28 @@ system.tsunami.ethernet.totalRxOrn 0 # to
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
+system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1907083088000 # Cumulative time (in ticks) in various power states
---------- End Simulation Statistics ----------
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
index 7d7e06664..0eee642ef 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
@@ -4,15 +4,16 @@ sim_seconds 1.908652 # Nu
sim_ticks 1908652088000 # Number of ticks simulated
final_tick 1908652088000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 169428 # Simulator instruction rate (inst/s)
-host_op_rate 169428 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 5757307258 # Simulator tick rate (ticks/s)
-host_mem_usage 336708 # Number of bytes of host memory used
-host_seconds 331.52 # Real time elapsed on the host
+host_inst_rate 205918 # Simulator instruction rate (inst/s)
+host_op_rate 205918 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 6997264233 # Simulator tick rate (ticks/s)
+host_mem_usage 384940 # Number of bytes of host memory used
+host_seconds 272.77 # Real time elapsed on the host
sim_insts 56168509 # Number of instructions simulated
sim_ops 56168509 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.physmem.bytes_read::cpu0.inst 873216 # Number of bytes read from this memory
system.physmem.bytes_read::cpu0.data 24648192 # Number of bytes read from this memory
system.physmem.bytes_read::cpu1.inst 103232 # Number of bytes read from this memory
@@ -324,6 +325,8 @@ system.physmem_1.memoryStateTime::REF 63734060000 # Ti
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_1.memoryStateTime::ACT 23527607250 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.bridge.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.branchPred.lookups 18555851 # Number of BP lookups
system.cpu0.branchPred.condPredicted 15805635 # Number of conditional branches predicted
system.cpu0.branchPred.condIncorrect 543843 # Number of conditional branches incorrect
@@ -370,6 +373,17 @@ system.cpu0.itb.data_hits 0 # DT
system.cpu0.itb.data_misses 0 # DTB misses
system.cpu0.itb.data_acv 0 # DTB access violations
system.cpu0.itb.data_accesses 0 # DTB accesses
+system.cpu0.numPwrStateTransitions 12751 # Number of power state transitions
+system.cpu0.pwrStateClkGateDist::samples 6376 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::mean 289891468.868256 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::stdev 443092480.248663 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::underflows 4 0.06% 0.06% # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::1000-5e+10 6372 99.94% 100.00% # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::min_value 1 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::total 6376 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateResidencyTicks::ON 60304082496 # Cumulative time (in ticks) in various power states
+system.cpu0.pwrStateResidencyTicks::CLK_GATED 1848348005504 # Cumulative time (in ticks) in various power states
system.cpu0.numCycles 120614537 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -665,6 +679,7 @@ system.cpu0.fp_regfile_reads 142673 # nu
system.cpu0.fp_regfile_writes 153221 # number of floating regfile writes
system.cpu0.misc_regfile_reads 1866400 # number of misc regfile reads
system.cpu0.misc_regfile_writes 877434 # number of misc regfile writes
+system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.dcache.tags.replacements 1337856 # number of replacements
system.cpu0.dcache.tags.tagsinuse 505.906059 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 11855471 # Total number of references to valid blocks.
@@ -680,6 +695,7 @@ system.cpu0.dcache.tags.age_task_id_blocks_1024::3 4
system.cpu0.dcache.tags.occ_task_id_percent::1024 0.781250 # Percentage of cache occupancy per task id
system.cpu0.dcache.tags.tag_accesses 62973100 # Number of tag accesses
system.cpu0.dcache.tags.data_accesses 62973100 # Number of data accesses
+system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.dcache.ReadReq_hits::cpu0.data 7528886 # number of ReadReq hits
system.cpu0.dcache.ReadReq_hits::total 7528886 # number of ReadReq hits
system.cpu0.dcache.WriteReq_hits::cpu0.data 3919891 # number of WriteReq hits
@@ -832,6 +848,7 @@ system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 222625.620303
system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 222625.620303 # average ReadReq mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 93130.397390 # average overall mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 93130.397390 # average overall mshr uncacheable latency
+system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.icache.tags.replacements 1021310 # number of replacements
system.cpu0.icache.tags.tagsinuse 509.519684 # Cycle average of tags in use
system.cpu0.icache.tags.total_refs 8197716 # Total number of references to valid blocks.
@@ -847,6 +864,7 @@ system.cpu0.icache.tags.age_task_id_blocks_1024::3 20
system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu0.icache.tags.tag_accesses 10303980 # Number of tag accesses
system.cpu0.icache.tags.data_accesses 10303980 # Number of data accesses
+system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.icache.ReadReq_hits::cpu0.inst 8197716 # number of ReadReq hits
system.cpu0.icache.ReadReq_hits::total 8197716 # number of ReadReq hits
system.cpu0.icache.demand_hits::cpu0.inst 8197716 # number of demand (read+write) hits
@@ -966,6 +984,16 @@ system.cpu1.itb.data_hits 0 # DT
system.cpu1.itb.data_misses 0 # DTB misses
system.cpu1.itb.data_acv 0 # DTB access violations
system.cpu1.itb.data_accesses 0 # DTB accesses
+system.cpu1.numPwrStateTransitions 4618 # Number of power state transitions
+system.cpu1.pwrStateClkGateDist::samples 2309 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::mean 824384353.183196 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::stdev 333980461.680684 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::1000-5e+10 2309 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::min_value 88500 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::max_value 975572500 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::total 2309 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateResidencyTicks::ON 5148616500 # Cumulative time (in ticks) in various power states
+system.cpu1.pwrStateResidencyTicks::CLK_GATED 1903503471500 # Cumulative time (in ticks) in various power states
system.cpu1.numCycles 10299543 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -1260,6 +1288,7 @@ system.cpu1.fp_regfile_reads 26922 # nu
system.cpu1.fp_regfile_writes 25344 # number of floating regfile writes
system.cpu1.misc_regfile_reads 302216 # number of misc regfile reads
system.cpu1.misc_regfile_writes 137559 # number of misc regfile writes
+system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu1.dcache.tags.replacements 64410 # number of replacements
system.cpu1.dcache.tags.tagsinuse 463.614906 # Cycle average of tags in use
system.cpu1.dcache.tags.total_refs 1794834 # Total number of references to valid blocks.
@@ -1276,6 +1305,7 @@ system.cpu1.dcache.tags.age_task_id_blocks_1024::2 46
system.cpu1.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu1.dcache.tags.tag_accesses 8336582 # Number of tag accesses
system.cpu1.dcache.tags.data_accesses 8336582 # Number of data accesses
+system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu1.dcache.ReadReq_hits::cpu1.data 1188882 # number of ReadReq hits
system.cpu1.dcache.ReadReq_hits::total 1188882 # number of ReadReq hits
system.cpu1.dcache.WriteReq_hits::cpu1.data 570377 # number of WriteReq hits
@@ -1436,6 +1466,7 @@ system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 202982.876712
system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 202982.876712 # average ReadReq mshr uncacheable latency
system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 10855.494505 # average overall mshr uncacheable latency
system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 10855.494505 # average overall mshr uncacheable latency
+system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu1.icache.tags.replacements 125381 # number of replacements
system.cpu1.icache.tags.tagsinuse 466.454678 # Cycle average of tags in use
system.cpu1.icache.tags.total_refs 1056750 # Total number of references to valid blocks.
@@ -1453,6 +1484,7 @@ system.cpu1.icache.tags.age_task_id_blocks_1024::3 1
system.cpu1.icache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id
system.cpu1.icache.tags.tag_accesses 1315314 # Number of tag accesses
system.cpu1.icache.tags.data_accesses 1315314 # Number of data accesses
+system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu1.icache.ReadReq_hits::cpu1.inst 1056751 # number of ReadReq hits
system.cpu1.icache.ReadReq_hits::total 1056751 # number of ReadReq hits
system.cpu1.icache.demand_hits::cpu1.inst 1056751 # number of demand (read+write) hits
@@ -1539,6 +1571,7 @@ system.disk2.dma_read_txs 0 # Nu
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
+system.iobus.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.iobus.trans_dist::ReadReq 7381 # Transaction distribution
system.iobus.trans_dist::ReadResp 7381 # Transaction distribution
system.iobus.trans_dist::WriteReq 53943 # Transaction distribution
@@ -1593,6 +1626,7 @@ system.iobus.respLayer0.occupancy 26789000 # La
system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.respLayer1.occupancy 41964000 # Layer occupancy (ticks)
system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
+system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.iocache.tags.replacements 41702 # number of replacements
system.iocache.tags.tagsinuse 0.516326 # Cycle average of tags in use
system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
@@ -1607,6 +1641,7 @@ system.iocache.tags.age_task_id_blocks_1023::3 16
system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
system.iocache.tags.tag_accesses 375606 # Number of tag accesses
system.iocache.tags.data_accesses 375606 # Number of data accesses
+system.iocache.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.iocache.ReadReq_misses::tsunami.ide 182 # number of ReadReq misses
system.iocache.ReadReq_misses::total 182 # number of ReadReq misses
system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
@@ -1687,6 +1722,7 @@ system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66945.590885
system.iocache.demand_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66945.590885 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::total 66945.590885 # average overall mshr miss latency
+system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.l2c.tags.replacements 344399 # number of replacements
system.l2c.tags.tagsinuse 65257.528904 # Cycle average of tags in use
system.l2c.tags.total_refs 4049043 # Total number of references to valid blocks.
@@ -1713,6 +1749,7 @@ system.l2c.tags.age_task_id_blocks_1024::4 51897 #
system.l2c.tags.occ_task_id_percent::1024 0.991791 # Percentage of cache occupancy per task id
system.l2c.tags.tag_accesses 38854214 # Number of tag accesses
system.l2c.tags.data_accesses 38854214 # Number of data accesses
+system.l2c.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.l2c.WritebackDirty_hits::writebacks 830750 # number of WritebackDirty hits
system.l2c.WritebackDirty_hits::total 830750 # number of WritebackDirty hits
system.l2c.WritebackClean_hits::writebacks 873391 # number of WritebackClean hits
@@ -2019,6 +2056,7 @@ system.membus.snoop_filter.hit_multi_requests 439
system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.membus.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.membus.trans_dist::ReadReq 7199 # Transaction distribution
system.membus.trans_dist::ReadResp 297053 # Transaction distribution
system.membus.trans_dist::WriteReq 12391 # Transaction distribution
@@ -2068,12 +2106,14 @@ system.membus.respLayer1.occupancy 2171993250 # La
system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
system.membus.respLayer2.occupancy 976613 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
+system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.toL2Bus.snoop_filter.tot_requests 5115302 # Total number of requests made to the snoop filter.
system.toL2Bus.snoop_filter.hit_single_requests 2557070 # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_requests 337938 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.toL2Bus.snoop_filter.tot_snoops 1067 # Total number of snoops made to the snoop filter.
system.toL2Bus.snoop_filter.hit_single_snoops 999 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_snoops 68 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.toL2Bus.trans_dist::ReadReq 7199 # Transaction distribution
system.toL2Bus.trans_dist::ReadResp 2263337 # Transaction distribution
system.toL2Bus.trans_dist::WriteReq 12391 # Transaction distribution
@@ -2128,6 +2168,10 @@ system.toL2Bus.respLayer2.occupancy 190444943 # La
system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
system.toL2Bus.respLayer3.occupancy 107558787 # Layer occupancy (ticks)
system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
+system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
@@ -2159,6 +2203,29 @@ system.tsunami.ethernet.totalRxOrn 0 # to
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
+system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1908652088000 # Cumulative time (in ticks) in various power states
system.cpu0.kern.inst.arm 0 # number of arm instructions executed
system.cpu0.kern.inst.quiesce 6376 # number of quiesce instructions executed
system.cpu0.kern.inst.hwrei 198541 # number of hwrei instructions executed
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
index 9b89e5da4..cd56250dd 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
@@ -4,15 +4,16 @@ sim_seconds 1.876794 # Nu
sim_ticks 1876794488000 # Number of ticks simulated
final_tick 1876794488000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 156335 # Simulator instruction rate (inst/s)
-host_op_rate 156335 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 5537786455 # Simulator tick rate (ticks/s)
-host_mem_usage 329540 # Number of bytes of host memory used
-host_seconds 338.91 # Real time elapsed on the host
+host_inst_rate 191271 # Simulator instruction rate (inst/s)
+host_op_rate 191271 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 6775305946 # Simulator tick rate (ticks/s)
+host_mem_usage 377772 # Number of bytes of host memory used
+host_seconds 277.01 # Real time elapsed on the host
sim_insts 52982943 # Number of instructions simulated
sim_ops 52982943 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.physmem.bytes_read::cpu.inst 961728 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 24880448 # Number of bytes read from this memory
system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
@@ -298,6 +299,8 @@ system.physmem_1.memoryStateTime::REF 62670140000 # Ti
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_1.memoryStateTime::ACT 30709733500 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.bridge.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.branchPred.lookups 19569408 # Number of BP lookups
system.cpu.branchPred.condPredicted 16632311 # Number of conditional branches predicted
system.cpu.branchPred.condIncorrect 593173 # Number of conditional branches incorrect
@@ -344,6 +347,16 @@ system.cpu.itb.data_hits 0 # DT
system.cpu.itb.data_misses 0 # DTB misses
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
+system.cpu.numPwrStateTransitions 12876 # Number of power state transitions
+system.cpu.pwrStateClkGateDist::samples 6438 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::mean 279467835.818577 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::stdev 439243252.658256 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::1000-5e+10 6438 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::min_value 81000 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateClkGateDist::total 6438 # Distribution of time spent in the clock gated state
+system.cpu.pwrStateResidencyTicks::ON 77580561000 # Cumulative time (in ticks) in various power states
+system.cpu.pwrStateResidencyTicks::CLK_GATED 1799213927000 # Cumulative time (in ticks) in various power states
system.cpu.numCycles 155167561 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -640,6 +653,7 @@ system.cpu.fp_regfile_reads 166613 # nu
system.cpu.fp_regfile_writes 175794 # number of floating regfile writes
system.cpu.misc_regfile_reads 2001927 # number of misc regfile reads
system.cpu.misc_regfile_writes 939529 # number of misc regfile writes
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.dcache.tags.replacements 1405900 # number of replacements
system.cpu.dcache.tags.tagsinuse 511.992670 # Cycle average of tags in use
system.cpu.dcache.tags.total_refs 12627832 # Total number of references to valid blocks.
@@ -656,6 +670,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::2 41
system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu.dcache.tags.tag_accesses 67144149 # Number of tag accesses
system.cpu.dcache.tags.data_accesses 67144149 # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.dcache.ReadReq_hits::cpu.data 8017767 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 8017767 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 4181578 # number of WriteReq hits
@@ -808,6 +823,7 @@ system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data 220582.828283
system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total 220582.828283 # average ReadReq mshr uncacheable latency
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data 92482.243330 # average overall mshr uncacheable latency
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total 92482.243330 # average overall mshr uncacheable latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.icache.tags.replacements 1074186 # number of replacements
system.cpu.icache.tags.tagsinuse 507.868793 # Cycle average of tags in use
system.cpu.icache.tags.total_refs 8786985 # Total number of references to valid blocks.
@@ -824,6 +840,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::2 366
system.cpu.icache.tags.occ_task_id_percent::1024 0.992188 # Percentage of cache occupancy per task id
system.cpu.icache.tags.tag_accesses 11005600 # Number of tag accesses
system.cpu.icache.tags.data_accesses 11005600 # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.icache.ReadReq_hits::cpu.inst 8786985 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 8786985 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 8786985 # number of demand (read+write) hits
@@ -898,6 +915,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 13860.792543
system.cpu.icache.demand_avg_mshr_miss_latency::total 13860.792543 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 13860.792543 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 13860.792543 # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.l2cache.tags.replacements 338591 # number of replacements
system.cpu.l2cache.tags.tagsinuse 65285.567334 # Cycle average of tags in use
system.cpu.l2cache.tags.total_refs 4253578 # Total number of references to valid blocks.
@@ -920,6 +938,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4 55427
system.cpu.l2cache.tags.occ_task_id_percent::1024 0.994385 # Percentage of cache occupancy per task id
system.cpu.l2cache.tags.tag_accesses 40379667 # Number of tag accesses
system.cpu.l2cache.tags.data_accesses 40379667 # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.l2cache.WritebackDirty_hits::writebacks 843569 # number of WritebackDirty hits
system.cpu.l2cache.WritebackDirty_hits::total 843569 # number of WritebackDirty hits
system.cpu.l2cache.WritebackClean_hits::writebacks 1073682 # number of WritebackClean hits
@@ -1116,6 +1135,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 2186
system.cpu.toL2Bus.snoop_filter.tot_snoops 1198 # Total number of snoops made to the snoop filter.
system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1198 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.toL2Bus.trans_dist::ReadReq 6930 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadResp 2188672 # Transaction distribution
system.cpu.toL2Bus.trans_dist::WriteReq 9599 # Transaction distribution
@@ -1170,6 +1190,7 @@ system.disk2.dma_read_txs 0 # Nu
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
+system.iobus.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.iobus.trans_dist::ReadReq 7103 # Transaction distribution
system.iobus.trans_dist::ReadResp 7103 # Transaction distribution
system.iobus.trans_dist::WriteReq 51151 # Transaction distribution
@@ -1224,6 +1245,7 @@ system.iobus.respLayer0.occupancy 23459000 # La
system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.respLayer1.occupancy 41946000 # Layer occupancy (ticks)
system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
+system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.iocache.tags.replacements 41685 # number of replacements
system.iocache.tags.tagsinuse 1.249213 # Cycle average of tags in use
system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
@@ -1238,6 +1260,7 @@ system.iocache.tags.age_task_id_blocks_1023::2 16
system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
system.iocache.tags.tag_accesses 375525 # Number of tag accesses
system.iocache.tags.data_accesses 375525 # Number of data accesses
+system.iocache.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.iocache.ReadReq_misses::tsunami.ide 173 # number of ReadReq misses
system.iocache.ReadReq_misses::total 173 # number of ReadReq misses
system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
@@ -1318,6 +1341,7 @@ system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 76218.750246
system.iocache.demand_avg_mshr_miss_latency::total 76218.750246 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 76218.750246 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::total 76218.750246 # average overall mshr miss latency
+system.membus.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.membus.trans_dist::ReadReq 6930 # Transaction distribution
system.membus.trans_dist::ReadResp 296606 # Transaction distribution
system.membus.trans_dist::WriteReq 9599 # Transaction distribution
@@ -1367,6 +1391,11 @@ system.membus.respLayer1.occupancy 2138626000 # La
system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
system.membus.respLayer2.occupancy 918617 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
+system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
@@ -1398,6 +1427,29 @@ system.tsunami.ethernet.totalRxOrn 0 # to
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
+system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1876794488000 # Cumulative time (in ticks) in various power states
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.quiesce 6438 # number of quiesce instructions executed
system.cpu.kern.inst.hwrei 211036 # number of hwrei instructions executed
diff --git a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt
index f41b81651..d2e8a2346 100644
--- a/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-switcheroo-full/stats.txt
@@ -4,15 +4,16 @@ sim_seconds 1.841599 # Nu
sim_ticks 1841599161000 # Number of ticks simulated
final_tick 1841599161000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 245408 # Simulator instruction rate (inst/s)
-host_op_rate 245408 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 6773643024 # Simulator tick rate (ticks/s)
-host_mem_usage 331844 # Number of bytes of host memory used
-host_seconds 271.88 # Real time elapsed on the host
+host_inst_rate 307539 # Simulator instruction rate (inst/s)
+host_op_rate 307539 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 8488565495 # Simulator tick rate (ticks/s)
+host_mem_usage 380848 # Number of bytes of host memory used
+host_seconds 216.95 # Real time elapsed on the host
sim_insts 66720805 # Number of instructions simulated
sim_ops 66720805 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.physmem.bytes_read::cpu0.inst 472448 # Number of bytes read from this memory
system.physmem.bytes_read::cpu0.data 20115392 # Number of bytes read from this memory
system.physmem.bytes_read::cpu1.inst 147008 # Number of bytes read from this memory
@@ -330,6 +331,8 @@ system.physmem_1.memoryStateTime::REF 45531980000 # Ti
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
system.physmem_1.memoryStateTime::ACT 8896844750 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.bridge.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu0.dtb.fetch_hits 0 # ITB hits
system.cpu0.dtb.fetch_misses 0 # ITB misses
@@ -363,6 +366,16 @@ system.cpu0.itb.data_hits 0 # DT
system.cpu0.itb.data_misses 0 # DTB misses
system.cpu0.itb.data_acv 0 # DTB access violations
system.cpu0.itb.data_accesses 0 # DTB accesses
+system.cpu0.numPwrStateTransitions 6508 # Number of power state transitions
+system.cpu0.pwrStateClkGateDist::samples 3254 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::mean 553026714.363860 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::stdev 1352809149.832599 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::1000-5e+10 3254 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::min_value 213500 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::max_value 3905515000 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateClkGateDist::total 3254 # Distribution of time spent in the clock gated state
+system.cpu0.pwrStateResidencyTicks::ON 42050232460 # Cumulative time (in ticks) in various power states
+system.cpu0.pwrStateResidencyTicks::CLK_GATED 1799548928540 # Cumulative time (in ticks) in various power states
system.cpu0.numCycles 928788202 # number of cpu cycles simulated
system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -506,6 +519,7 @@ system.cpu0.op_class::MemWrite 3423231 11.40% 98.28% # Cl
system.cpu0.op_class::IprAccess 516318 1.72% 100.00% # Class of executed instruction
system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu0.op_class::total 30035361 # Class of executed instruction
+system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu0.dcache.tags.replacements 1394566 # number of replacements
system.cpu0.dcache.tags.tagsinuse 511.997816 # Cycle average of tags in use
system.cpu0.dcache.tags.total_refs 13521910 # Total number of references to valid blocks.
@@ -526,6 +540,7 @@ system.cpu0.dcache.tags.age_task_id_blocks_1024::2 68
system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
system.cpu0.dcache.tags.tag_accesses 64423039 # Number of tag accesses
system.cpu0.dcache.tags.data_accesses 64423039 # Number of data accesses
+system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu0.dcache.ReadReq_hits::cpu0.data 3984765 # number of ReadReq hits
system.cpu0.dcache.ReadReq_hits::cpu1.data 1069804 # number of ReadReq hits
system.cpu0.dcache.ReadReq_hits::cpu2.data 2772856 # number of ReadReq hits
@@ -761,6 +776,7 @@ system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 218663.747811
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 97107.965638 # average overall mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu2.data 99971.120575 # average overall mshr uncacheable latency
system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 98810.541311 # average overall mshr uncacheable latency
+system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu0.icache.tags.replacements 969876 # number of replacements
system.cpu0.icache.tags.tagsinuse 511.205246 # Cycle average of tags in use
system.cpu0.icache.tags.total_refs 39683030 # Total number of references to valid blocks.
@@ -781,6 +797,7 @@ system.cpu0.icache.tags.age_task_id_blocks_1024::2 447
system.cpu0.icache.tags.occ_task_id_percent::1024 0.998047 # Percentage of cache occupancy per task id
system.cpu0.icache.tags.tag_accesses 41646260 # Number of tag accesses
system.cpu0.icache.tags.data_accesses 41646260 # Number of data accesses
+system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu0.icache.ReadReq_hits::cpu0.inst 29526010 # number of ReadReq hits
system.cpu0.icache.ReadReq_hits::cpu1.inst 7417850 # number of ReadReq hits
system.cpu0.icache.ReadReq_hits::cpu2.inst 2739170 # number of ReadReq hits
@@ -929,6 +946,16 @@ system.cpu1.itb.data_hits 0 # DT
system.cpu1.itb.data_misses 0 # DTB misses
system.cpu1.itb.data_acv 0 # DTB access violations
system.cpu1.itb.data_accesses 0 # DTB accesses
+system.cpu1.numPwrStateTransitions 2293 # Number of power state transitions
+system.cpu1.pwrStateClkGateDist::samples 1147 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::mean 1553407081.081081 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::stdev 1902806399.455202 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::1000-5e+10 1147 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::min_value 400000 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::max_value 6635637500 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateClkGateDist::total 1147 # Distribution of time spent in the clock gated state
+system.cpu1.pwrStateResidencyTicks::ON 59841239000 # Cumulative time (in ticks) in various power states
+system.cpu1.pwrStateResidencyTicks::CLK_GATED 1781757922000 # Cumulative time (in ticks) in various power states
system.cpu1.numCycles 953375365 # number of cpu cycles simulated
system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -1049,6 +1076,16 @@ system.cpu2.itb.data_hits 0 # DT
system.cpu2.itb.data_misses 0 # DTB misses
system.cpu2.itb.data_acv 0 # DTB access violations
system.cpu2.itb.data_accesses 0 # DTB accesses
+system.cpu2.numPwrStateTransitions 3116 # Number of power state transitions
+system.cpu2.pwrStateClkGateDist::samples 1558 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::mean 289379505.134788 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::stdev 445107312.150922 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::1000-5e+10 1558 100.00% 100.00% # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::min_value 3000 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateClkGateDist::total 1558 # Distribution of time spent in the clock gated state
+system.cpu2.pwrStateResidencyTicks::ON 1390745892000 # Cumulative time (in ticks) in various power states
+system.cpu2.pwrStateResidencyTicks::CLK_GATED 450853269000 # Cumulative time (in ticks) in various power states
system.cpu2.numCycles 30327275 # number of cpu cycles simulated
system.cpu2.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu2.numWorkItemsCompleted 0 # number of work items this cpu completed
@@ -1358,6 +1395,7 @@ system.disk2.dma_read_txs 0 # Nu
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
+system.iobus.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.iobus.trans_dist::ReadReq 7317 # Transaction distribution
system.iobus.trans_dist::ReadResp 7317 # Transaction distribution
system.iobus.trans_dist::WriteReq 51362 # Transaction distribution
@@ -1404,6 +1442,7 @@ system.iobus.respLayer0.occupancy 9173000 # La
system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
system.iobus.respLayer1.occupancy 17468000 # Layer occupancy (ticks)
system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
+system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.iocache.tags.replacements 41685 # number of replacements
system.iocache.tags.tagsinuse 1.254561 # Cycle average of tags in use
system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
@@ -1418,6 +1457,7 @@ system.iocache.tags.age_task_id_blocks_1023::2 16
system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
system.iocache.tags.tag_accesses 375525 # Number of tag accesses
system.iocache.tags.data_accesses 375525 # Number of data accesses
+system.iocache.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.iocache.ReadReq_misses::tsunami.ide 173 # number of ReadReq misses
system.iocache.ReadReq_misses::total 173 # number of ReadReq misses
system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
@@ -1498,6 +1538,7 @@ system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66910.723631
system.iocache.demand_avg_mshr_miss_latency::total 66910.723631 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66910.723631 # average overall mshr miss latency
system.iocache.overall_avg_mshr_miss_latency::total 66910.723631 # average overall mshr miss latency
+system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.l2c.tags.replacements 337756 # number of replacements
system.l2c.tags.tagsinuse 65421.322565 # Cycle average of tags in use
system.l2c.tags.total_refs 4020988 # Total number of references to valid blocks.
@@ -1528,6 +1569,7 @@ system.l2c.tags.age_task_id_blocks_1024::4 55336 #
system.l2c.tags.occ_task_id_percent::1024 0.994293 # Percentage of cache occupancy per task id
system.l2c.tags.tag_accesses 38533534 # Number of tag accesses
system.l2c.tags.data_accesses 38533534 # Number of data accesses
+system.l2c.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.l2c.WritebackDirty_hits::writebacks 836681 # number of WritebackDirty hits
system.l2c.WritebackDirty_hits::total 836681 # number of WritebackDirty hits
system.l2c.WritebackClean_hits::writebacks 969577 # number of WritebackClean hits
@@ -1838,6 +1880,7 @@ system.membus.snoop_filter.hit_multi_requests 408
system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.membus.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.membus.trans_dist::ReadReq 7144 # Transaction distribution
system.membus.trans_dist::ReadResp 295138 # Transaction distribution
system.membus.trans_dist::WriteReq 9810 # Transaction distribution
@@ -1888,12 +1931,14 @@ system.membus.respLayer1.occupancy 436169750 # La
system.membus.respLayer1.utilization 0.0 # Layer utilization (%)
system.membus.respLayer2.occupancy 370538 # Layer occupancy (ticks)
system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
+system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.toL2Bus.snoop_filter.tot_requests 4730181 # Total number of requests made to the snoop filter.
system.toL2Bus.snoop_filter.hit_single_requests 2364664 # Number of requests hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_requests 1672 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
system.toL2Bus.snoop_filter.tot_snoops 1038 # Total number of snoops made to the snoop filter.
system.toL2Bus.snoop_filter.hit_single_snoops 1038 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
system.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.toL2Bus.trans_dist::ReadReq 7144 # Transaction distribution
system.toL2Bus.trans_dist::ReadResp 2070392 # Transaction distribution
system.toL2Bus.trans_dist::WriteReq 9810 # Transaction distribution
@@ -1936,6 +1981,10 @@ system.toL2Bus.respLayer0.occupancy 692196311 # La
system.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
system.toL2Bus.respLayer1.occupancy 770446828 # Layer occupancy (ticks)
system.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%)
+system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
@@ -1967,6 +2016,29 @@ system.tsunami.ethernet.totalRxOrn 0 # to
system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
+system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1841599161000 # Cumulative time (in ticks) in various power states
system.cpu2.kern.inst.arm 0 # number of arm instructions executed
system.cpu2.kern.inst.quiesce 0 # number of quiesce instructions executed
system.cpu2.kern.inst.hwrei 0 # number of hwrei instructions executed