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author | Andrew Bardsley <Andrew.Bardsley@arm.com> | 2014-07-23 16:09:05 -0500 |
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committer | Andrew Bardsley <Andrew.Bardsley@arm.com> | 2014-07-23 16:09:05 -0500 |
commit | 5d0b25ba3f82b6d563b3fabd3de71f3ceabb140d (patch) | |
tree | 0b8cdef424988f3486a9f2cebbb49f76b74ae8f9 /tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout | |
parent | 0e8a90f06bd3db00f700891a33458353478cce76 (diff) | |
download | gem5-5d0b25ba3f82b6d563b3fabd3de71f3ceabb140d.tar.xz |
cpu: Minor CPU add regression tests for ARM and ALPHA
This patch adds regression tests results and test harnesses
for the Minor CPU on ARM and ALPHA.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout')
-rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout new file mode 100644 index 000000000..7e5f71538 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-minor/simout @@ -0,0 +1,16 @@ +Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simout +Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor/simerr +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled May 7 2014 10:57:46 +gem5 started May 7 2014 17:07:27 +gem5 executing on cz3211bhr8 +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-minor +Global frequency set at 1000000000000 ticks per second +info: kernel located at: /arm/projectscratch/pd/sysrandd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 + 0: system.cpu.isa: ISA system set to: 0x1a1f0030 0x1a1f0030 +info: Using bootloader at address 0x80000000 +info: Using kernel entry physical address at 0x8000 +info: Entering event queue @ 0. Starting simulation... +Exiting @ tick 2567809308500 because m5_exit instruction encountered |