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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-29 14:05:36 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-03-29 14:05:36 -0500 |
commit | 26e96b90e15cab3f2ae645e236da590527a64f75 (patch) | |
tree | 9a1e74eab8239b9db337a784f8b881ed9d3f7e4d /tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3 | |
parent | ac778b1d02b0e7674811ab2a7463add16a430b36 (diff) | |
download | gem5-26e96b90e15cab3f2ae645e236da590527a64f75.tar.xz |
regressions: updates due to changes to o3 cpu, x86 memory map
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3')
-rwxr-xr-x | tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout | 4 | ||||
-rw-r--r-- | tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt | 12 |
2 files changed, 8 insertions, 8 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout index 8f8bfd301..450b5d1ef 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout @@ -3,8 +3,8 @@ Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realvi gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 26 2013 15:15:23 -gem5 started Mar 27 2013 02:43:56 +gem5 compiled Mar 28 2013 10:14:03 +gem5 started Mar 28 2013 10:15:55 gem5 executing on ribera.cs.wisc.edu command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt index 7887e140b..7716042a9 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.533115 # Nu sim_ticks 2533114761500 # Number of ticks simulated final_tick 2533114761500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 24105 # Simulator instruction rate (inst/s) -host_op_rate 31016 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1012479744 # Simulator tick rate (ticks/s) -host_mem_usage 439308 # Number of bytes of host memory used -host_seconds 2501.89 # Real time elapsed on the host +host_inst_rate 48903 # Simulator instruction rate (inst/s) +host_op_rate 62925 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2054075271 # Simulator tick rate (ticks/s) +host_mem_usage 439344 # Number of bytes of host memory used +host_seconds 1233.21 # Real time elapsed on the host sim_insts 60307912 # Number of instructions simulated sim_ops 77599507 # Number of ops (including micro ops) simulated system.realview.nvmem.bytes_read::cpu.inst 64 # Number of bytes read from this memory @@ -525,7 +525,7 @@ system.cpu.int_regfile_reads 550176555 # nu system.cpu.int_regfile_writes 88426576 # number of integer regfile writes system.cpu.fp_regfile_reads 8298 # number of floating regfile reads system.cpu.fp_regfile_writes 2914 # number of floating regfile writes -system.cpu.misc_regfile_reads 30118912 # number of misc regfile reads +system.cpu.misc_regfile_reads 30119271 # number of misc regfile reads system.cpu.misc_regfile_writes 831902 # number of misc regfile writes system.cpu.icache.replacements 980182 # number of replacements system.cpu.icache.tagsinuse 511.616610 # Cycle average of tags in use |