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authorNilay Vaish <nilay@cs.wisc.edu>2013-01-24 12:29:00 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2013-01-24 12:29:00 -0600
commit9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b (patch)
tree64b85031cb791a21af6059778384d358d992b817 /tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3
parentdbeabedaf0f8d9ec0ea3331db2e44b1add53f79f (diff)
downloadgem5-9bc132e4738c53be2dd9c2fdf5e4dd8e73d8970b.tar.xz
regressions: update stats due to branch predictor changes
The actual statistical values are being updated for only two tests belonging to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others the patch updates config.ini and name changes to statistical variables.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3')
-rw-r--r--tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini43
-rwxr-xr-xtests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout12
-rw-r--r--tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt27
3 files changed, 45 insertions, 37 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
index 94ce5b470..d2fe18e1e 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
@@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000
type=LinuxArmSystem
children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver
atags_addr=256
-boot_loader=/gem5/dist/binaries/boot.arm
+boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
clock=1000
dtb_filename=
@@ -19,12 +19,12 @@ enable_context_switch_stats_dump=false
flags_addr=268435504
gic_cpu_addr=520093952
init_param=0
-kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
+kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
load_addr_mask=268435455
machine_type=RealView_PBX
mem_mode=timing
mem_ranges=0:134217727
-memories=system.physmem system.realview.nvmem
+memories=system.realview.nvmem system.physmem
multi_proc=true
num_work_ids=16
readfile=tests/halt.sh
@@ -65,27 +65,23 @@ table_size=65536
[system.cf0.image.child]
type=RawDiskImage
-image_file=/gem5/dist/disks/linux-arm-ael.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
read_only=true
[system.cpu]
type=DerivO3CPU
-children=dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
-BTBEntries=4096
-BTBTagSize=16
+children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer
LFSTSize=1024
LQEntries=32
LSQCheckLoads=true
LSQDepCheckShift=4
-RASSize=16
SQEntries=32
SSITSize=1024
activity=0
backComSize=5
+branchPred=system.cpu.branchPred
cachePorts=200
checker=Null
-choiceCtrBits=2
-choicePredictorSize=8192
clock=500
commitToDecodeDelay=1
commitToFetchDelay=1
@@ -108,23 +104,15 @@ forwardComSize=5
fuPool=system.cpu.fuPool
function_trace=false
function_trace_start=0
-globalCtrBits=2
-globalHistoryBits=13
-globalPredictorSize=8192
iewToCommitDelay=1
iewToDecodeDelay=1
iewToFetchDelay=1
iewToRenameDelay=1
-instShiftAmt=2
interrupts=system.cpu.interrupts
isa=system.cpu.isa
issueToExecuteDelay=1
issueWidth=8
itb=system.cpu.itb
-localCtrBits=2
-localHistoryBits=11
-localHistoryTableSize=2048
-localPredictorSize=2048
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
@@ -136,7 +124,6 @@ numPhysIntRegs=256
numROBEntries=192
numRobs=1
numThreads=1
-predType=tournament
profile=0
progress_interval=0
renameToDecodeDelay=1
@@ -165,6 +152,24 @@ workload=
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
+[system.cpu.branchPred]
+type=BranchPredictor
+BTBEntries=4096
+BTBTagSize=16
+RASSize=16
+choiceCtrBits=2
+choicePredictorSize=8192
+globalCtrBits=2
+globalHistoryBits=13
+globalPredictorSize=8192
+instShiftAmt=2
+localCtrBits=2
+localHistoryBits=11
+localHistoryTableSize=2048
+localPredictorSize=2048
+numThreads=1
+predType=tournament
+
[system.cpu.dcache]
type=BaseCache
addr_ranges=0:18446744073709551615
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
index f7bd2d44c..0c9f602b9 100755
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
@@ -1,12 +1,14 @@
+Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3/simout
+Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 4 2013 21:17:24
-gem5 started Jan 5 2013 01:42:51
-gem5 executing on u200540
+gem5 compiled Jan 23 2013 19:43:25
+gem5 started Jan 23 2013 21:42:21
+gem5 executing on ribera.cs.wisc.edu
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-o3
Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
info: Using bootloader at address 0x80000000
info: Entering event queue @ 0. Starting simulation...
-Exiting @ tick 2523517846500 because m5_exit instruction encountered
+Exiting @ tick 2523204701000 because m5_exit instruction encountered
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
index e98399cb1..80b8abc3e 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 2.523205 # Nu
sim_ticks 2523204701000 # Number of ticks simulated
final_tick 2523204701000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 64094 # Simulator instruction rate (inst/s)
-host_op_rate 82471 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 2681679652 # Simulator tick rate (ticks/s)
-host_mem_usage 409992 # Number of bytes of host memory used
-host_seconds 940.90 # Real time elapsed on the host
+host_inst_rate 50114 # Simulator instruction rate (inst/s)
+host_op_rate 64483 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 2096764175 # Simulator tick rate (ticks/s)
+host_mem_usage 452888 # Number of bytes of host memory used
+host_seconds 1203.38 # Real time elapsed on the host
sim_insts 60306320 # Number of instructions simulated
sim_ops 77597310 # Number of ops (including micro ops) simulated
system.realview.nvmem.bytes_read::cpu.inst 64 # Number of bytes read from this memory
@@ -225,6 +225,15 @@ system.cf0.dma_read_txs 0 # Nu
system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes.
system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
system.cf0.dma_write_txs 0 # Number of DMA write transactions.
+system.cpu.branchPred.lookups 14400111 # Number of BP lookups
+system.cpu.branchPred.condPredicted 11483411 # Number of conditional branches predicted
+system.cpu.branchPred.condIncorrect 706790 # Number of conditional branches incorrect
+system.cpu.branchPred.BTBLookups 9536193 # Number of BTB lookups
+system.cpu.branchPred.BTBHits 7670918 # Number of BTB hits
+system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
+system.cpu.branchPred.BTBHitPct 80.440046 # BTB Hit Percentage
+system.cpu.branchPred.usedRAS 1400062 # Number of times the RAS was used to get a target.
+system.cpu.branchPred.RASInCorrect 72720 # Number of incorrect RAS predictions.
system.cpu.dtb.inst_hits 0 # ITB inst hits
system.cpu.dtb.inst_misses 0 # ITB inst misses
system.cpu.dtb.read_hits 51212683 # DTB read hits
@@ -270,14 +279,6 @@ system.cpu.itb.accesses 11542101 # DT
system.cpu.numCycles 469830472 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.BPredUnit.lookups 14400111 # Number of BP lookups
-system.cpu.BPredUnit.condPredicted 11483411 # Number of conditional branches predicted
-system.cpu.BPredUnit.condIncorrect 706790 # Number of conditional branches incorrect
-system.cpu.BPredUnit.BTBLookups 9536193 # Number of BTB lookups
-system.cpu.BPredUnit.BTBHits 7670918 # Number of BTB hits
-system.cpu.BPredUnit.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.BPredUnit.usedRAS 1400062 # Number of times the RAS was used to get a target.
-system.cpu.BPredUnit.RASInCorrect 72720 # Number of incorrect RAS predictions.
system.cpu.fetch.icacheStallCycles 29776209 # Number of cycles fetch is stalled on an Icache miss
system.cpu.fetch.Insts 90590417 # Number of instructions fetch has processed
system.cpu.fetch.Branches 14400111 # Number of branches that fetch encountered