regressions: update stats due to branch predictor changes

The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.

1 files changed, 26 insertions, 19 deletions

diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini
index 5ab2174c6..454a21a12 100644
--- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini
+++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini
@@ -10,7 +10,7 @@ time_sync_spin_threshold=100000000
 type=LinuxArmSystem
 children=bridge cf0 cpu0 cpu1 cpu2 intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver
 atags_addr=256
-boot_loader=/gem5/dist/binaries/boot.arm
+boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
 clock=1000
 dtb_filename=
@@ -19,12 +19,12 @@ enable_context_switch_stats_dump=false
 flags_addr=268435504
 gic_cpu_addr=520093952
 init_param=0
-kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
+kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
 load_addr_mask=268435455
 machine_type=RealView_PBX
 mem_mode=atomic
 mem_ranges=0:134217727
-memories=system.realview.nvmem system.physmem
+memories=system.physmem system.realview.nvmem
 multi_proc=true
 num_work_ids=16
 readfile=tests/halt.sh
@@ -65,12 +65,13 @@ table_size=65536
 
 [system.cf0.image.child]
 type=RawDiskImage
-image_file=/gem5/dist/disks/linux-arm-ael.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
 read_only=true
 
 [system.cpu0]
 type=AtomicSimpleCPU
 children=dcache dtb icache interrupts isa itb tracer
+branchPred=Null
 checker=Null
 clock=500
 cpu_id=0
@@ -197,6 +198,7 @@ type=ExeTracer
 [system.cpu1]
 type=TimingSimpleCPU
 children=dtb interrupts isa itb tracer
+branchPred=Null
 checker=Null
 clock=500
 cpu_id=0
@@ -270,22 +272,18 @@ type=ExeTracer
 
 [system.cpu2]
 type=DerivO3CPU
-children=dtb fuPool interrupts isa itb tracer
-BTBEntries=4096
-BTBTagSize=16
+children=branchPred dtb fuPool interrupts isa itb tracer
 LFSTSize=1024
 LQEntries=32
 LSQCheckLoads=true
 LSQDepCheckShift=4
-RASSize=16
 SQEntries=32
 SSITSize=1024
 activity=0
 backComSize=5
+branchPred=system.cpu2.branchPred
 cachePorts=200
 checker=Null
-choiceCtrBits=2
-choicePredictorSize=8192
 clock=500
 commitToDecodeDelay=1
 commitToFetchDelay=1
@@ -308,23 +306,15 @@ forwardComSize=5
 fuPool=system.cpu2.fuPool
 function_trace=false
 function_trace_start=0
-globalCtrBits=2
-globalHistoryBits=13
-globalPredictorSize=8192
 iewToCommitDelay=1
 iewToDecodeDelay=1
 iewToFetchDelay=1
 iewToRenameDelay=1
-instShiftAmt=2
 interrupts=system.cpu2.interrupts
 isa=system.cpu2.isa
 issueToExecuteDelay=1
 issueWidth=8
 itb=system.cpu2.itb
-localCtrBits=2
-localHistoryBits=11
-localHistoryTableSize=2048
-localPredictorSize=2048
 max_insts_all_threads=0
 max_insts_any_thread=0
 max_loads_all_threads=0
@@ -336,7 +326,6 @@ numPhysIntRegs=256
 numROBEntries=192
 numRobs=1
 numThreads=1
-predType=tournament
 profile=0
 progress_interval=0
 renameToDecodeDelay=1
@@ -363,6 +352,24 @@ wbDepth=1
 wbWidth=8
 workload=
 
+[system.cpu2.branchPred]
+type=BranchPredictor
+BTBEntries=4096
+BTBTagSize=16
+RASSize=16
+choiceCtrBits=2
+choicePredictorSize=8192
+globalCtrBits=2
+globalHistoryBits=13
+globalPredictorSize=8192
+instShiftAmt=2
+localCtrBits=2
+localHistoryBits=11
+localHistoryTableSize=2048
+localPredictorSize=2048
+numThreads=1
+predType=tournament
+
 [system.cpu2.dtb]
 type=ArmTLB
 children=walker