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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-04 00:19:05 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-04 00:19:05 +0000 |
| commit | 5a249e03a4efa79d5513a5e2ebdd27159a14dbb9 (patch) | |
| tree | 100fe7fd1211e2aa0f6848d932a2ebf37e5bc508 /tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr | |
| parent | 6a05179e13a2ac8e72feb4bd00647013940d814e (diff) | |
| download | gem5-5a249e03a4efa79d5513a5e2ebdd27159a14dbb9.tar.xz | |
stats: Update to reflect changes to RealView platform code
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr')
| -rwxr-xr-x | tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr | 26 |
1 files changed, 10 insertions, 16 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr index ced0bcc1f..c832ed926 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr @@ -4,7 +4,6 @@ warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: Not doing anything for miscreg ACTLR -warn: Not doing anything for miscreg ACTLR warn: Not doing anything for write of miscreg ACTLR warn: The clidr register always reports 0 caches. warn: clidr LoUIS field of 0b001 to match current ARM implementations. @@ -26,35 +25,30 @@ warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4] +warn: CP14 unimplemented crn[1], opc1[4], crm[12], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0] -warn: CP14 unimplemented crn[0], opc1[4], crm[8], opc2[1] -warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[1] -warn: CP14 unimplemented crn[4], opc1[0], crm[12], opc2[1] warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[6] warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2] -warn: CP14 unimplemented crn[3], opc1[5], crm[12], opc2[1] -warn: CP14 unimplemented crn[3], opc1[4], crm[0], opc2[3] -warn: CP14 unimplemented crn[3], opc1[4], crm[4], opc2[3] -warn: CP14 unimplemented crn[15], opc1[0], crm[8], opc2[0] +warn: CP14 unimplemented crn[3], opc1[0], crm[0], opc2[0] +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3] +warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3] +warn: CP14 unimplemented crn[2], opc1[2], crm[0], opc2[2] +warn: CP14 unimplemented crn[12], opc1[0], crm[12], opc2[0] +warn: CP14 unimplemented crn[12], opc1[0], crm[12], opc2[1] +warn: CP14 unimplemented crn[12], opc1[0], crm[0], opc2[3] warn: instruction 'mcr bpiall' unimplemented warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR |