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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
| commit | 0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch) | |
| tree | c0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout | |
| parent | a70a83155bfe4c3877894c29f9dea720beb40f9c (diff) | |
| download | gem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz | |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout')
| -rwxr-xr-x | tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout index ade00a610..8b56b1fe5 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout @@ -1,10 +1,11 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 31 2014 10:01:44 -gem5 started Oct 31 2014 11:48:14 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /work/gem5.ext/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 +gem5 compiled Apr 22 2015 10:58:25 +gem5 started Apr 22 2015 11:13:13 +gem5 executing on phenom +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 + Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x4f45680 0x4f45680 - 0: system.cpu1.isa: ISA system set to: 0x4f45680 0x4f45680 + 0: system.cpu0.isa: ISA system set to: 0x351fd50 0x351fd50 + 0: system.cpu1.isa: ISA system set to: 0x351fd50 0x351fd50 |