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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3 | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3')
3 files changed, 13 insertions, 13 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini index 7b9011e3a..0865afb47 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini @@ -127,6 +127,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 @@ -602,6 +603,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout index 5ab09214a..e9eaa0c70 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3/simout -Redirecting stderr to build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 09:05:36 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 02:34:20 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 -re tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview-switcheroo-o3 Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt index 62d3d2d33..b715fd89b 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.548576 # Nu sim_ticks 2548576209000 # Number of ticks simulated final_tick 2548576209000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 60580 # Simulator instruction rate (inst/s) -host_op_rate 77951 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2559708219 # Simulator tick rate (ticks/s) -host_mem_usage 399668 # Number of bytes of host memory used -host_seconds 995.65 # Real time elapsed on the host +host_inst_rate 64501 # Simulator instruction rate (inst/s) +host_op_rate 82996 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2725389479 # Simulator tick rate (ticks/s) +host_mem_usage 403492 # Number of bytes of host memory used +host_seconds 935.12 # Real time elapsed on the host sim_insts 60316464 # Number of instructions simulated sim_ops 77611603 # Number of ops (including micro ops) simulated system.physmem.bytes_read::realview.clcd 121110528 # Number of bytes read from this memory @@ -1088,8 +1088,8 @@ system.cpu0.rename.LSQFullEvents 2115247 # Nu system.cpu0.rename.FullRegisterEvents 208 # Number of times there has been no free registers system.cpu0.rename.RenamedOperands 52034450 # Number of destination operands rename has renamed system.cpu0.rename.RenameLookups 231667374 # Number of register rename lookups that rename has made -system.cpu0.rename.int_rename_lookups 231623806 # Number of integer rename lookups -system.cpu0.rename.fp_rename_lookups 43568 # Number of floating rename lookups +system.cpu0.rename.int_rename_lookups 214169305 # Number of integer rename lookups +system.cpu0.rename.fp_rename_lookups 4937 # Number of floating rename lookups system.cpu0.rename.CommittedMaps 38251156 # Number of HB maps that are committed system.cpu0.rename.UndoneMaps 13783293 # Number of HB maps that are undone due to squashing system.cpu0.rename.serializingInsts 411980 # count of serializing insts renamed @@ -1776,8 +1776,8 @@ system.cpu1.rename.LSQFullEvents 2033878 # Nu system.cpu1.rename.FullRegisterEvents 525 # Number of times there has been no free registers system.cpu1.rename.RenamedOperands 54353089 # Number of destination operands rename has renamed system.cpu1.rename.RenameLookups 236755846 # Number of register rename lookups that rename has made -system.cpu1.rename.int_rename_lookups 236708688 # Number of integer rename lookups -system.cpu1.rename.fp_rename_lookups 47158 # Number of floating rename lookups +system.cpu1.rename.int_rename_lookups 219276243 # Number of integer rename lookups +system.cpu1.rename.fp_rename_lookups 5446 # Number of floating rename lookups system.cpu1.rename.CommittedMaps 40151278 # Number of HB maps that are committed system.cpu1.rename.UndoneMaps 14201811 # Number of HB maps that are undone due to squashing system.cpu1.rename.serializingInsts 419760 # count of serializing insts renamed |