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author | Steve Reinhardt <stever@gmail.com> | 2015-03-19 08:41:32 -0400 |
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committer | Steve Reinhardt <stever@gmail.com> | 2015-03-19 08:41:32 -0400 |
commit | 1483496803f8a8618f62adc5439ce435359b36fe (patch) | |
tree | a6134ff85d7e6e07e6d34293513f91b16ff94515 /tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout | |
parent | f1c3fda965dd4b28ab6b2e99f5f3210fa2089a17 (diff) | |
download | gem5-1483496803f8a8618f62adc5439ce435359b36fe.tar.xz |
stats: update Minor stats due to PF bug fix
A recent changeset of mine (http://repo.gem5.org/gem5/rev/4cfe55719da5)
inadvertently fixed a bug in the Minor CPU model which caused it to treat
software prefetches as regular loads. Prior to this changeset, Minor
did an ad-hoc generation of memory commands that left out the PF check;
because it now uses the common code that the other CPU models use,
it generates prefetches properly. These stat changes reflect the fact
that the Minor model now issues SoftPFReqs.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout')
-rwxr-xr-x[-rw-r--r--] | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout index b85d856c0..bc06c34c6 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-minor-dual/simout @@ -1,17 +1,17 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 10:35:48 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual +gem5 compiled Mar 15 2015 20:30:55 +gem5 started Mar 15 2015 20:31:14 +gem5 executing on zizzer2 +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual -re /z/stever/hg/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-minor-dual Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second -info: kernel located at: /projects/pd/randd/dist/binaries/vmlinux.aarch64.20140821 - 0: system.cpu0.isa: ISA system set to: 0x5394b00 0x5394b00 - 0: system.cpu1.isa: ISA system set to: 0x5394b00 0x5394b00 +info: kernel located at: /dist/m5/system/binaries/vmlinux.aarch64.20140821 + 0: system.cpu0.isa: ISA system set to: 0x3d33a20 0x3d33a20 + 0: system.cpu1.isa: ISA system set to: 0x3d33a20 0x3d33a20 info: Using bootloader at address 0x10 info: Using kernel entry physical address at 0x80080000 -info: Loading DTB file: /projects/pd/randd/dist/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 +info: Loading DTB file: /dist/m5/system/binaries/vexpress.aarch64.20140821.dtb at address 0x88000000 info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 47349475204500 because m5_exit instruction encountered +Exiting @ tick 47397610926500 because m5_exit instruction encountered |