diff options
| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 15:39:17 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 15:39:17 +0100 |
| commit | 023f6eb0f2093ea8ccd706353db6c3afa34c3a4d (patch) | |
| tree | d9f4f8d660d6d9fafa730222ab66d01ff625f7cb /tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout | |
| parent | bbb3abc16711e14858094b64a2eb1eb53204dded (diff) | |
| download | gem5-023f6eb0f2093ea8ccd706353db6c3afa34c3a4d.tar.xz | |
stats: Update ARM stats to include programmable oscillators
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout')
| -rwxr-xr-x[-rw-r--r--] | tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout index 7aed49fb9..977e84594 100644..100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-timing/simout @@ -1,11 +1,10 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 29 2014 09:18:22 -gem5 started Oct 29 2014 13:24:01 -gem5 executing on u200540-lin -command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-timing -re /work/gem5.latest/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-timing +gem5 compiled Aug 7 2015 10:13:08 +gem5 started Aug 7 2015 11:47:53 +gem5 executing on e104799-lin +command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-timing -re /work/gem5/outgoing/gem5/tests/run.py build/ARM/tests/opt/long/fs/10.linux-boot/arm/linux/realview64-switcheroo-timing + Selected 64-bit ARM architecture, updating default disk image... Global frequency set at 1000000000000 ticks per second - 0: system.cpu0.isa: ISA system set to: 0x5b6db00 0x5b6db00 - 0: system.cpu1.isa: ISA system set to: 0x5b6db00 0x5b6db00 |