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author | Nilay Vaish <nilay@cs.wisc.edu> | 2013-05-21 11:32:57 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2013-05-21 11:32:57 -0500 |
commit | 5b49c3d255eb82089496f8a77d6ab50004b5a2c2 (patch) | |
tree | c27568e48e0c39d9943830a870dbf234273c5b7d /tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini | |
parent | 4ef466cc8a6890a63f504cec02a65ed3f6386e12 (diff) | |
download | gem5-5b49c3d255eb82089496f8a77d6ab50004b5a2c2.tar.xz |
stats: updates statistics for ruby regressions
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini')
-rw-r--r-- | tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini | 38 |
1 files changed, 20 insertions, 18 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini index 6c0f26fdf..d3204d576 100644 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini @@ -74,6 +74,7 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_start_insts= switched_out=false system=system tracer=system.cpu0.tracer @@ -145,6 +146,7 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_start_insts= switched_out=false system=system tracer=system.cpu1.tracer @@ -1010,7 +1012,7 @@ pio=system.piobus.master[9] [system.physmem] type=SimpleDRAM activation_limit=4 -addr_mapping=openmap +addr_mapping=RaBaChCo banks_per_rank=8 channels=1 clock=1000 @@ -1135,9 +1137,9 @@ slave=system.pc.south_bridge.ide.dma [system.ruby.l1_cntrl0] type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory prefetcher sequencer -L1DcacheMemory=system.ruby.l1_cntrl0.L1DcacheMemory -L1IcacheMemory=system.ruby.l1_cntrl0.L1IcacheMemory +children=L1Dcache L1Icache prefetcher sequencer +L1Dcache=system.ruby.l1_cntrl0.L1Dcache +L1Icache=system.ruby.l1_cntrl0.L1Icache buffer_size=0 clock=500 cntrl_id=0 @@ -1156,7 +1158,7 @@ to_l2_latency=1 transitions_per_cycle=32 version=0 -[system.ruby.l1_cntrl0.L1DcacheMemory] +[system.ruby.l1_cntrl0.L1Dcache] type=RubyCache assoc=2 dataAccessLatency=1 @@ -1170,7 +1172,7 @@ start_index_bit=6 tagAccessLatency=1 tagArrayBanks=1 -[system.ruby.l1_cntrl0.L1IcacheMemory] +[system.ruby.l1_cntrl0.L1Icache] type=RubyCache assoc=2 dataAccessLatency=1 @@ -1198,9 +1200,9 @@ unit_filter=8 type=RubySequencer access_phys_mem=true clock=500 -dcache=system.ruby.l1_cntrl0.L1DcacheMemory +dcache=system.ruby.l1_cntrl0.L1Dcache deadlock_threshold=500000 -icache=system.ruby.l1_cntrl0.L1IcacheMemory +icache=system.ruby.l1_cntrl0.L1Icache max_outstanding_requests=16 ruby_system=system.ruby support_data_reqs=true @@ -1214,9 +1216,9 @@ slave=system.cpu0.icache_port system.cpu0.dcache_port system.cpu0.itb.walker.por [system.ruby.l1_cntrl1] type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory prefetcher sequencer -L1DcacheMemory=system.ruby.l1_cntrl1.L1DcacheMemory -L1IcacheMemory=system.ruby.l1_cntrl1.L1IcacheMemory +children=L1Dcache L1Icache prefetcher sequencer +L1Dcache=system.ruby.l1_cntrl1.L1Dcache +L1Icache=system.ruby.l1_cntrl1.L1Icache buffer_size=0 clock=500 cntrl_id=1 @@ -1235,7 +1237,7 @@ to_l2_latency=1 transitions_per_cycle=32 version=1 -[system.ruby.l1_cntrl1.L1DcacheMemory] +[system.ruby.l1_cntrl1.L1Dcache] type=RubyCache assoc=2 dataAccessLatency=1 @@ -1249,7 +1251,7 @@ start_index_bit=6 tagAccessLatency=1 tagArrayBanks=1 -[system.ruby.l1_cntrl1.L1IcacheMemory] +[system.ruby.l1_cntrl1.L1Icache] type=RubyCache assoc=2 dataAccessLatency=1 @@ -1277,9 +1279,9 @@ unit_filter=8 type=RubySequencer access_phys_mem=true clock=500 -dcache=system.ruby.l1_cntrl1.L1DcacheMemory +dcache=system.ruby.l1_cntrl1.L1Dcache deadlock_threshold=500000 -icache=system.ruby.l1_cntrl1.L1IcacheMemory +icache=system.ruby.l1_cntrl1.L1Icache max_outstanding_requests=16 ruby_system=system.ruby support_data_reqs=true @@ -1293,8 +1295,8 @@ slave=system.cpu1.icache_port system.cpu1.dcache_port system.cpu1.itb.walker.por [system.ruby.l2_cntrl0] type=L2Cache_Controller -children=L2cacheMemory -L2cacheMemory=system.ruby.l2_cntrl0.L2cacheMemory +children=L2cache +L2cache=system.ruby.l2_cntrl0.L2cache buffer_size=0 clock=500 cntrl_id=2 @@ -1308,7 +1310,7 @@ to_l1_latency=1 transitions_per_cycle=32 version=0 -[system.ruby.l2_cntrl0.L2cacheMemory] +[system.ruby.l2_cntrl0.L2cache] type=RubyCache assoc=2 dataAccessLatency=1 |