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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr')
-rwxr-xr-x | tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr index 6b689ca41..4291cf7c2 100755 --- a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr @@ -3,7 +3,6 @@ warn: Sockets disabled, not accepting terminal connections warn: Reading current count from inactive timer. warn: Sockets disabled, not accepting gdb connections warn: Don't know what interrupt to clear for console. -warn: instruction 'fxsave' unimplemented warn: x86 cpuid: unknown family 0x8086 warn: instruction 'wbinvd' unimplemented warn: instruction 'wbinvd' unimplemented |