diff options
| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 14:14:36 +0100 |
| commit | 1d933447fc62de67db938970a8308ac47189fd96 (patch) | |
| tree | df7f389eeae7916c3a58082644d6929bf0e94280 /tests/long/fs/10.linux-boot | |
| parent | 660fbd543f7c84dec81cd17bdb4ff08f954aec77 (diff) | |
| download | gem5-1d933447fc62de67db938970a8308ac47189fd96.tar.xz | |
stats: Update to match ARM ISA changes
Diffstat (limited to 'tests/long/fs/10.linux-boot')
21 files changed, 788 insertions, 492 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini index 1e2906ba4..cf4e1ea1a 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/config.ini @@ -24,7 +24,7 @@ exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -47,6 +47,8 @@ phys_addr_range_64=40 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -199,8 +201,15 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 numThreads=1 +useIndirect=true [system.cpu.checker] type=O3Checker @@ -1181,6 +1190,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -1373,6 +1383,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -1568,8 +1579,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -1615,6 +1627,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr index c53cbe481..6cbcdcc79 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simerr @@ -16,7 +16,7 @@ warn: instruction 'mcr bpiallis' unimplemented warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr dccimvac' unimplemented warn: Tried to read RealView I/O at offset 0x60 that doesn't exist -warn: 11083490000: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0 +warn: 11084065000: Instruction results do not match! (Values may not actually be integers) Inst: 0xa, checker: 0 warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist @@ -42,6 +42,6 @@ warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr warn: Ignoring write to miscreg pmcr -warn: 409465425500: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 +warn: 409343110000: Instruction results do not match! (Values may not actually be integers) Inst: 0x80000001, checker: 0x80000000 warn: instruction 'mcr dcisw' unimplemented warn: instruction 'mcr bpiall' unimplemented diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout index fde4d40f2..87c07a72a 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/simout @@ -44,4 +44,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 -Exiting @ tick 2832922792000 because m5_exit instruction encountered +Exiting @ tick 2832862976500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt index 11b022e8f..1631918b9 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-checker/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.832863 # Nu sim_ticks 2832862976500 # Number of ticks simulated final_tick 2832862976500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 63021 # Simulator instruction rate (inst/s) -host_op_rate 76439 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1578508192 # Simulator tick rate (ticks/s) -host_mem_usage 579360 # Number of bytes of host memory used -host_seconds 1794.65 # Real time elapsed on the host +host_inst_rate 104475 # Simulator instruction rate (inst/s) +host_op_rate 126719 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2616817312 # Simulator tick rate (ticks/s) +host_mem_usage 625044 # Number of bytes of host memory used +host_seconds 1082.56 # Real time elapsed on the host sim_insts 113100501 # Number of instructions simulated sim_ops 137180951 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -740,7 +740,7 @@ system.cpu.rename.IQFullEvents 65507 # Nu system.cpu.rename.LQFullEvents 18530 # Number of times rename has blocked due to LQ full system.cpu.rename.SQFullEvents 30752508 # Number of times rename has blocked due to SQ full system.cpu.rename.RenamedOperands 150221263 # Number of destination operands rename has renamed -system.cpu.rename.RenameLookups 676972712 # Number of register rename lookups that rename has made +system.cpu.rename.RenameLookups 676943612 # Number of register rename lookups that rename has made system.cpu.rename.int_rename_lookups 163957736 # Number of integer rename lookups system.cpu.rename.fp_rename_lookups 10899 # Number of floating rename lookups system.cpu.rename.CommittedMaps 141737618 # Number of HB maps that are committed @@ -757,7 +757,7 @@ system.cpu.iq.iqNonSpecInstsAdded 2117732 # Nu system.cpu.iq.iqInstsIssued 143038678 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 260968 # Number of squashed instructions issued system.cpu.iq.iqSquashedInstsExamined 8155598 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu.iq.iqSquashedOperandsExamined 14296072 # Number of squashed operands that are examined and possibly removed from graph +system.cpu.iq.iqSquashedOperandsExamined 14294324 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 121861 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 270560621 # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::mean 0.528675 # Number of insts issued each cycle @@ -979,7 +979,7 @@ system.cpu.fp_regfile_reads 9529 # nu system.cpu.fp_regfile_writes 2716 # number of floating regfile writes system.cpu.cc_regfile_reads 502156067 # number of cc regfile reads system.cpu.cc_regfile_writes 53129749 # number of cc regfile writes -system.cpu.misc_regfile_reads 347863701 # number of misc regfile reads +system.cpu.misc_regfile_reads 347855567 # number of misc regfile reads system.cpu.misc_regfile_writes 1521708 # number of misc regfile writes system.cpu.dcache.tags.replacements 838747 # number of replacements system.cpu.dcache.tags.tagsinuse 511.925928 # Cycle average of tags in use diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini index c9a130278..6af9f752e 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini @@ -24,7 +24,7 @@ exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -47,6 +47,8 @@ phys_addr_range_64=40 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -199,8 +201,15 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 numThreads=1 +useIndirect=true [system.cpu0.dcache] type=Cache @@ -846,8 +855,15 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 numThreads=1 +useIndirect=true [system.cpu1.dcache] type=Cache @@ -1499,14 +1515,14 @@ size=4194304 [system.membus] type=CoherentXBar -children=badaddr_responder +children=badaddr_responder snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 point_of_coherency=true response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -1533,6 +1549,13 @@ update_data=false warn_access=warn pio=system.membus.default +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=DRAMCtrl IDD0=0.075000 @@ -1737,6 +1760,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -1929,6 +1953,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -2124,8 +2149,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -2171,6 +2197,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr index b6712dc14..3e7bd42ce 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr @@ -33,6 +33,7 @@ warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] warn: allocating bonus target for snoop +warn: allocating bonus target for snoop warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout index e3fd3e7c9..5b77a63d3 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout @@ -29,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 -Exiting @ tick 2837474672000 because m5_exit instruction encountered +Exiting @ tick 2825959731500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt index 1ded9ce83..0e8d3a898 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.825960 # Nu sim_ticks 2825959731500 # Number of ticks simulated final_tick 2825959731500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 71367 # Simulator instruction rate (inst/s) -host_op_rate 86573 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1679006506 # Simulator tick rate (ticks/s) -host_mem_usage 618544 # Number of bytes of host memory used -host_seconds 1683.11 # Real time elapsed on the host +host_inst_rate 152939 # Simulator instruction rate (inst/s) +host_op_rate 185526 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 3598106166 # Simulator tick rate (ticks/s) +host_mem_usage 665816 # Number of bytes of host memory used +host_seconds 785.40 # Real time elapsed on the host sim_insts 120118276 # Number of instructions simulated sim_ops 145712235 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -639,7 +639,7 @@ system.cpu0.rename.IQFullEvents 164556 # Nu system.cpu0.rename.LQFullEvents 58179 # Number of times rename has blocked due to LQ full system.cpu0.rename.SQFullEvents 6849429 # Number of times rename has blocked due to SQ full system.cpu0.rename.RenamedOperands 141656181 # Number of destination operands rename has renamed -system.cpu0.rename.RenameLookups 634615161 # Number of register rename lookups that rename has made +system.cpu0.rename.RenameLookups 634589847 # Number of register rename lookups that rename has made system.cpu0.rename.int_rename_lookups 152645231 # Number of integer rename lookups system.cpu0.rename.fp_rename_lookups 9369 # Number of floating rename lookups system.cpu0.rename.CommittedMaps 130468277 # Number of HB maps that are committed @@ -656,7 +656,7 @@ system.cpu0.iq.iqNonSpecInstsAdded 1713414 # Nu system.cpu0.iq.iqInstsIssued 132756465 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 452944 # Number of squashed instructions issued system.cpu0.iq.iqSquashedInstsExamined 10581179 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu0.iq.iqSquashedOperandsExamined 21721412 # Number of squashed operands that are examined and possibly removed from graph +system.cpu0.iq.iqSquashedOperandsExamined 21719888 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 120083 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 198828221 # Number of insts issued each cycle system.cpu0.iq.issued_per_cycle::mean 0.667694 # Number of insts issued each cycle @@ -777,9 +777,9 @@ system.cpu0.iew.iewDispNonSpecInsts 875924 # Nu system.cpu0.iew.iewIQFullEvents 28511 # Number of times the IQ has become full, causing a stall system.cpu0.iew.iewLSQFullEvents 132116 # Number of times the LSQ has become full, causing a stall system.cpu0.iew.memOrderViolationEvents 19339 # Number of memory order violations -system.cpu0.iew.predictedTakenIncorrect 261904 # Number of branches that were predicted taken incorrectly +system.cpu0.iew.predictedTakenIncorrect 261906 # Number of branches that were predicted taken incorrectly system.cpu0.iew.predictedNotTakenIncorrect 398193 # Number of branches that were predicted not taken incorrectly -system.cpu0.iew.branchMispredicts 660097 # Number of branch mispredicts detected at execute +system.cpu0.iew.branchMispredicts 660099 # Number of branch mispredicts detected at execute system.cpu0.iew.iewExecutedInsts 131724041 # Number of executed instructions system.cpu0.iew.iewExecLoadInsts 23895876 # Number of load instructions executed system.cpu0.iew.iewExecSquashedInsts 965291 # Number of squashed instructions skipped in execute @@ -878,7 +878,7 @@ system.cpu0.fp_regfile_reads 8185 # nu system.cpu0.fp_regfile_writes 2264 # number of floating regfile writes system.cpu0.cc_regfile_reads 464897652 # number of cc regfile reads system.cpu0.cc_regfile_writes 49725456 # number of cc regfile writes -system.cpu0.misc_regfile_reads 274171027 # number of misc regfile reads +system.cpu0.misc_regfile_reads 274163615 # number of misc regfile reads system.cpu0.misc_regfile_writes 1224889 # number of misc regfile writes system.cpu0.dcache.tags.replacements 709828 # number of replacements system.cpu0.dcache.tags.tagsinuse 497.174198 # Cycle average of tags in use @@ -1860,7 +1860,7 @@ system.cpu1.rename.IQFullEvents 36982 # Nu system.cpu1.rename.LQFullEvents 15461 # Number of times rename has blocked due to LQ full system.cpu1.rename.SQFullEvents 1675349 # Number of times rename has blocked due to SQ full system.cpu1.rename.RenamedOperands 22265644 # Number of destination operands rename has renamed -system.cpu1.rename.RenameLookups 103654423 # Number of register rename lookups that rename has made +system.cpu1.rename.RenameLookups 103648875 # Number of register rename lookups that rename has made system.cpu1.rename.int_rename_lookups 25648399 # Number of integer rename lookups system.cpu1.rename.fp_rename_lookups 1667 # Number of floating rename lookups system.cpu1.rename.CommittedMaps 19867778 # Number of HB maps that are committed @@ -1877,7 +1877,7 @@ system.cpu1.iq.iqNonSpecInstsAdded 559995 # Nu system.cpu1.iq.iqInstsIssued 21251983 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 91992 # Number of squashed instructions issued system.cpu1.iq.iqSquashedInstsExamined 2044542 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu1.iq.iqSquashedOperandsExamined 4727165 # Number of squashed operands that are examined and possibly removed from graph +system.cpu1.iq.iqSquashedOperandsExamined 4726903 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 43295 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 34136181 # Number of insts issued each cycle system.cpu1.iq.issued_per_cycle::mean 0.622565 # Number of insts issued each cycle @@ -2099,7 +2099,7 @@ system.cpu1.fp_regfile_reads 1401 # nu system.cpu1.fp_regfile_writes 516 # number of floating regfile writes system.cpu1.cc_regfile_reads 75464831 # number of cc regfile reads system.cpu1.cc_regfile_writes 6816973 # number of cc regfile writes -system.cpu1.misc_regfile_reads 50047969 # number of misc regfile reads +system.cpu1.misc_regfile_reads 50047460 # number of misc regfile reads system.cpu1.misc_regfile_writes 387254 # number of misc regfile writes system.cpu1.dcache.tags.replacements 189214 # number of replacements system.cpu1.dcache.tags.tagsinuse 472.223119 # Cycle average of tags in use diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini index dead082fc..cf234591c 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini @@ -24,7 +24,7 @@ exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -47,6 +47,8 @@ phys_addr_range_64=40 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -199,8 +201,15 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 numThreads=1 +useIndirect=true [system.cpu.dcache] type=Cache @@ -1029,6 +1038,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -1221,6 +1231,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -1416,8 +1427,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -1463,6 +1475,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout index c85683f6b..76b741f0a 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout @@ -29,4 +29,4 @@ info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 info: trap check M:0 N:0 1:0 2:0 hdcr 0, hcptr 3fff, hstr 0 -Exiting @ tick 2832922792000 because m5_exit instruction encountered +Exiting @ tick 2832862976500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt index a08043e3c..690dc124e 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.832863 # Nu sim_ticks 2832862976500 # Number of ticks simulated final_tick 2832862976500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 70501 # Simulator instruction rate (inst/s) -host_op_rate 85511 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1765850548 # Simulator tick rate (ticks/s) -host_mem_usage 578080 # Number of bytes of host memory used -host_seconds 1604.25 # Real time elapsed on the host +host_inst_rate 159961 # Simulator instruction rate (inst/s) +host_op_rate 194019 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 4006592882 # Simulator tick rate (ticks/s) +host_mem_usage 625056 # Number of bytes of host memory used +host_seconds 707.05 # Real time elapsed on the host sim_insts 113100501 # Number of instructions simulated sim_ops 137180951 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -601,7 +601,7 @@ system.cpu.rename.IQFullEvents 65507 # Nu system.cpu.rename.LQFullEvents 18530 # Number of times rename has blocked due to LQ full system.cpu.rename.SQFullEvents 30752508 # Number of times rename has blocked due to SQ full system.cpu.rename.RenamedOperands 150221263 # Number of destination operands rename has renamed -system.cpu.rename.RenameLookups 676972712 # Number of register rename lookups that rename has made +system.cpu.rename.RenameLookups 676943612 # Number of register rename lookups that rename has made system.cpu.rename.int_rename_lookups 163957736 # Number of integer rename lookups system.cpu.rename.fp_rename_lookups 10899 # Number of floating rename lookups system.cpu.rename.CommittedMaps 141737618 # Number of HB maps that are committed @@ -618,7 +618,7 @@ system.cpu.iq.iqNonSpecInstsAdded 2117732 # Nu system.cpu.iq.iqInstsIssued 143038678 # Number of instructions issued system.cpu.iq.iqSquashedInstsIssued 260968 # Number of squashed instructions issued system.cpu.iq.iqSquashedInstsExamined 8155598 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu.iq.iqSquashedOperandsExamined 14296072 # Number of squashed operands that are examined and possibly removed from graph +system.cpu.iq.iqSquashedOperandsExamined 14294324 # Number of squashed operands that are examined and possibly removed from graph system.cpu.iq.iqSquashedNonSpecRemoved 121861 # Number of squashed non-spec instructions that were removed system.cpu.iq.issued_per_cycle::samples 270560621 # Number of insts issued each cycle system.cpu.iq.issued_per_cycle::mean 0.528675 # Number of insts issued each cycle @@ -840,7 +840,7 @@ system.cpu.fp_regfile_reads 9529 # nu system.cpu.fp_regfile_writes 2716 # number of floating regfile writes system.cpu.cc_regfile_reads 502156061 # number of cc regfile reads system.cpu.cc_regfile_writes 53129749 # number of cc regfile writes -system.cpu.misc_regfile_reads 347863701 # number of misc regfile reads +system.cpu.misc_regfile_reads 347855567 # number of misc regfile reads system.cpu.misc_regfile_writes 1521708 # number of misc regfile writes system.cpu.dcache.tags.replacements 838747 # number of replacements system.cpu.dcache.tags.tagsinuse 511.925928 # Cycle average of tags in use diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini index 4d37af833..9d9d131ca 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/config.ini @@ -24,7 +24,7 @@ exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -47,6 +47,8 @@ phys_addr_range_64=40 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -552,11 +554,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu2.dstage2_mmu] type=ArmStage2MMU @@ -1155,11 +1164,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu3.dstage2_mmu] type=ArmStage2MMU @@ -1690,14 +1706,14 @@ size=4194304 [system.membus] type=CoherentXBar -children=badaddr_responder +children=badaddr_responder snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 point_of_coherency=true response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -1724,6 +1740,13 @@ update_data=false warn_access=warn pio=system.membus.default +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=DRAMCtrl IDD0=0.075000 @@ -1928,6 +1951,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -2120,6 +2144,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -2315,8 +2340,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -2362,6 +2388,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simerr index 9318c5011..e34805b0d 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/simerr @@ -12,8 +12,6 @@ warn: instruction 'mcr dccmvau' unimplemented warn: instruction 'mcr icimvau' unimplemented warn: instruction 'mcr bpiallis' unimplemented warn: instruction 'mcr icialluis' unimplemented -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: instruction 'mcr dccimvac' unimplemented warn: Tried to read RealView I/O at offset 0x60 that doesn't exist WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -33,6 +31,8 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] @@ -40,21 +40,20 @@ warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10462, Bank: 2 +warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 8288, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6918, Bank: 3 -WARNING: Bank is already active! -Command: 0, Timestamp: 11135, Bank: 1 -WARNING: Bank is already active! -Command: 0, Timestamp: 11139, Bank: 6 -warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[0] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10621, Bank: 7 +WARNING: Bank is already active! +Command: 0, Timestamp: 11318, Bank: 7 warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr @@ -64,11 +63,12 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: CP14 unimplemented crn[10], opc1[0], crm[4], opc2[3] warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2] -warn: CP14 unimplemented crn[7], opc1[0], crm[12], opc2[1] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -79,14 +79,17 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: instruction 'mcr bpiall' unimplemented -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: instruction 'mcr dcisw' unimplemented +warn: CP14 unimplemented crn[5], opc1[4], crm[4], opc2[5] +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3] +warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3] +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: CP14 unimplemented crn[2], opc1[2], crm[0], opc2[2] +warn: instruction 'mcr bpiall' unimplemented +warn: CP14 unimplemented crn[14], opc1[7], crm[1], opc2[0] +warn: CP14 unimplemented crn[14], opc1[7], crm[14], opc2[7] WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -99,6 +102,8 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -107,14 +112,14 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt index 42b6a0fb0..c8a56e9dc 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.823729 # Nu sim_ticks 2823728611500 # Number of ticks simulated final_tick 2823728611500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 192143 # Simulator instruction rate (inst/s) -host_op_rate 233071 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 4415299854 # Simulator tick rate (ticks/s) -host_mem_usage 584992 # Number of bytes of host memory used -host_seconds 639.53 # Real time elapsed on the host +host_inst_rate 406612 # Simulator instruction rate (inst/s) +host_op_rate 493225 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 9343639540 # Simulator tick rate (ticks/s) +host_mem_usage 632204 # Number of bytes of host memory used +host_seconds 302.21 # Real time elapsed on the host sim_insts 122881667 # Number of instructions simulated sim_ops 149056790 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -534,7 +534,7 @@ system.cpu0.num_func_calls 5787158 # nu system.cpu0.num_conditional_control_insts 7357632 # number of instructions that are conditional controls system.cpu0.num_int_insts 58995481 # number of integer instructions system.cpu0.num_fp_insts 4380 # number of float instructions -system.cpu0.num_int_register_reads 108779991 # number of times the integer registers were read +system.cpu0.num_int_register_reads 108769217 # number of times the integer registers were read system.cpu0.num_int_register_writes 41129875 # number of times the integer registers were written system.cpu0.num_fp_register_reads 3339 # number of times the floating registers were read system.cpu0.num_fp_register_writes 1042 # number of times the floating registers were written @@ -1292,7 +1292,7 @@ system.cpu1.num_func_calls 1992181 # nu system.cpu1.num_conditional_control_insts 2177842 # number of instructions that are conditional controls system.cpu1.num_int_insts 18584422 # number of integer instructions system.cpu1.num_fp_insts 1582 # number of float instructions -system.cpu1.num_int_register_reads 34435383 # number of times the integer registers were read +system.cpu1.num_int_register_reads 34431709 # number of times the integer registers were read system.cpu1.num_int_register_writes 13029372 # number of times the integer registers were written system.cpu1.num_fp_register_reads 1129 # number of times the floating registers were read system.cpu1.num_fp_register_writes 454 # number of times the floating registers were written @@ -1852,7 +1852,7 @@ system.cpu3.rename.IQFullEvents 1185922 # Nu system.cpu3.rename.LQFullEvents 108960 # Number of times rename has blocked due to LQ full system.cpu3.rename.SQFullEvents 3941702 # Number of times rename has blocked due to SQ full system.cpu3.rename.RenamedOperands 46859897 # Number of destination operands rename has renamed -system.cpu3.rename.RenameLookups 206328923 # Number of register rename lookups that rename has made +system.cpu3.rename.RenameLookups 206319121 # Number of register rename lookups that rename has made system.cpu3.rename.int_rename_lookups 50493322 # Number of integer rename lookups system.cpu3.rename.fp_rename_lookups 4028 # Number of floating rename lookups system.cpu3.rename.CommittedMaps 39227152 # Number of HB maps that are committed @@ -1869,7 +1869,7 @@ system.cpu3.iq.iqNonSpecInstsAdded 518690 # Nu system.cpu3.iq.iqInstsIssued 41211343 # Number of instructions issued system.cpu3.iq.iqSquashedInstsIssued 55539 # Number of squashed instructions issued system.cpu3.iq.iqSquashedInstsExamined 6082671 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu3.iq.iqSquashedOperandsExamined 14073441 # Number of squashed operands that are examined and possibly removed from graph +system.cpu3.iq.iqSquashedOperandsExamined 14072351 # Number of squashed operands that are examined and possibly removed from graph system.cpu3.iq.iqSquashedNonSpecRemoved 54569 # Number of squashed non-spec instructions that were removed system.cpu3.iq.issued_per_cycle::samples 54325621 # Number of insts issued each cycle system.cpu3.iq.issued_per_cycle::mean 0.758599 # Number of insts issued each cycle @@ -2091,7 +2091,7 @@ system.cpu3.fp_regfile_reads 14550 # nu system.cpu3.fp_regfile_writes 12084 # number of floating regfile writes system.cpu3.cc_regfile_reads 144202792 # number of cc regfile reads system.cpu3.cc_regfile_writes 15932581 # number of cc regfile writes -system.cpu3.misc_regfile_reads 74870960 # number of misc regfile reads +system.cpu3.misc_regfile_reads 74868210 # number of misc regfile reads system.cpu3.misc_regfile_writes 343753 # number of misc regfile writes system.iobus.trans_dist::ReadReq 30152 # Transaction distribution system.iobus.trans_dist::ReadResp 30152 # Transaction distribution diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini index 847b205be..00e7e2739 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/config.ini @@ -24,7 +24,7 @@ exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -47,6 +47,8 @@ phys_addr_range_64=40 readfile=/home/stever/hg/m5sim.org/gem5/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -199,11 +201,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu0.dcache] type=Cache @@ -804,11 +813,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu1.dstage2_mmu] type=ArmStage2MMU @@ -1339,14 +1355,14 @@ size=4194304 [system.membus] type=CoherentXBar -children=badaddr_responder +children=badaddr_responder snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 point_of_coherency=true response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -1373,6 +1389,13 @@ update_data=false warn_access=warn pio=system.membus.default +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=DRAMCtrl IDD0=0.075000 @@ -1577,6 +1600,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -1769,6 +1793,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -1964,8 +1989,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -2011,6 +2037,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr index d345b4b2d..2c5672b0b 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/simerr @@ -26,31 +26,38 @@ warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[4] +warn: CP14 unimplemented crn[1], opc1[4], crm[12], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[1], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] warn: CP14 unimplemented crn[1], opc1[0], crm[5], opc2[4] warn: CP14 unimplemented crn[5], opc1[4], crm[0], opc2[0] +warn: CP14 unimplemented crn[0], opc1[4], crm[8], opc2[1] warn: Returning zero for read from miscreg pmcr warn: Ignoring write to miscreg pmcntenclr warn: Ignoring write to miscreg pmintenclr warn: Ignoring write to miscreg pmovsr warn: Ignoring write to miscreg pmcr -warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[6] +warn: CP14 unimplemented crn[5], opc1[4], crm[8], opc2[2] +warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[2] warn: CP14 unimplemented crn[0], opc1[4], crm[12], opc2[2] -warn: CP14 unimplemented crn[3], opc1[0], crm[0], opc2[0] -warn: CP14 unimplemented crn[6], opc1[5], crm[0], opc2[3] -warn: CP14 unimplemented crn[6], opc1[5], crm[4], opc2[3] +warn: CP14 unimplemented crn[5], opc1[4], crm[4], opc2[5] warn: CP14 unimplemented crn[15], opc1[0], crm[8], opc2[0] +warn: CP14 unimplemented crn[3], opc1[4], crm[0], opc2[3] +warn: CP14 unimplemented crn[3], opc1[4], crm[4], opc2[3] warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[0] -warn: CP14 unimplemented crn[2], opc1[2], crm[0], opc2[2] -warn: CP14 unimplemented crn[12], opc1[0], crm[12], opc2[0] -warn: CP14 unimplemented crn[12], opc1[0], crm[12], opc2[1] -warn: CP14 unimplemented crn[12], opc1[0], crm[0], opc2[3] +warn: CP14 unimplemented crn[5], opc1[4], crm[12], opc2[3] warn: instruction 'mcr dcisw' unimplemented +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: instruction 'mcr bpiall' unimplemented -warn: CP14 unimplemented crn[2], opc1[2], crm[4], opc2[1] warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt index 8140fab33..3a0955877 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview-switcheroo-o3/stats.txt @@ -4,11 +4,11 @@ sim_seconds 2.804583 # Nu sim_ticks 2804582834000 # Number of ticks simulated final_tick 2804582834000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 77550 # Simulator instruction rate (inst/s) -host_op_rate 94124 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1860425573 # Simulator tick rate (ticks/s) -host_mem_usage 586788 # Number of bytes of host memory used -host_seconds 1507.50 # Real time elapsed on the host +host_inst_rate 167374 # Simulator instruction rate (inst/s) +host_op_rate 203147 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 4015325540 # Simulator tick rate (ticks/s) +host_mem_usage 633236 # Number of bytes of host memory used +host_seconds 698.47 # Real time elapsed on the host sim_insts 116905819 # Number of instructions simulated sim_ops 141891765 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -639,7 +639,7 @@ system.cpu0.rename.IQFullEvents 1036846 # Nu system.cpu0.rename.LQFullEvents 275223 # Number of times rename has blocked due to LQ full system.cpu0.rename.SQFullEvents 5569610 # Number of times rename has blocked due to SQ full system.cpu0.rename.RenamedOperands 83235701 # Number of destination operands rename has renamed -system.cpu0.rename.RenameLookups 372792978 # Number of register rename lookups that rename has made +system.cpu0.rename.RenameLookups 372775200 # Number of register rename lookups that rename has made system.cpu0.rename.int_rename_lookups 90140763 # Number of integer rename lookups system.cpu0.rename.fp_rename_lookups 7010 # Number of floating rename lookups system.cpu0.rename.CommittedMaps 70379825 # Number of HB maps that are committed @@ -656,7 +656,7 @@ system.cpu0.iq.iqNonSpecInstsAdded 1057787 # Nu system.cpu0.iq.iqInstsIssued 74749052 # Number of instructions issued system.cpu0.iq.iqSquashedInstsIssued 90659 # Number of squashed instructions issued system.cpu0.iq.iqSquashedInstsExamined 10605329 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu0.iq.iqSquashedOperandsExamined 23154537 # Number of squashed operands that are examined and possibly removed from graph +system.cpu0.iq.iqSquashedOperandsExamined 23152649 # Number of squashed operands that are examined and possibly removed from graph system.cpu0.iq.iqSquashedNonSpecRemoved 112514 # Number of squashed non-spec instructions that were removed system.cpu0.iq.issued_per_cycle::samples 103827961 # Number of insts issued each cycle system.cpu0.iq.issued_per_cycle::mean 0.719932 # Number of insts issued each cycle @@ -878,7 +878,7 @@ system.cpu0.fp_regfile_reads 17106 # nu system.cpu0.fp_regfile_writes 13230 # number of floating regfile writes system.cpu0.cc_regfile_reads 262463335 # number of cc regfile reads system.cpu0.cc_regfile_writes 27226302 # number of cc regfile writes -system.cpu0.misc_regfile_reads 143950430 # number of misc regfile reads +system.cpu0.misc_regfile_reads 143945708 # number of misc regfile reads system.cpu0.misc_regfile_writes 725062 # number of misc regfile writes system.cpu0.dcache.tags.replacements 852281 # number of replacements system.cpu0.dcache.tags.tagsinuse 511.984445 # Cycle average of tags in use @@ -1571,7 +1571,7 @@ system.cpu1.rename.IQFullEvents 1748729 # Nu system.cpu1.rename.LQFullEvents 211009 # Number of times rename has blocked due to LQ full system.cpu1.rename.SQFullEvents 4894541 # Number of times rename has blocked due to SQ full system.cpu1.rename.RenamedOperands 89713841 # Number of destination operands rename has renamed -system.cpu1.rename.RenameLookups 398200824 # Number of register rename lookups that rename has made +system.cpu1.rename.RenameLookups 398185196 # Number of register rename lookups that rename has made system.cpu1.rename.int_rename_lookups 96380963 # Number of integer rename lookups system.cpu1.rename.fp_rename_lookups 6166 # Number of floating rename lookups system.cpu1.rename.CommittedMaps 76287775 # Number of HB maps that are committed @@ -1588,7 +1588,7 @@ system.cpu1.iq.iqNonSpecInstsAdded 1152123 # Nu system.cpu1.iq.iqInstsIssued 80030097 # Number of instructions issued system.cpu1.iq.iqSquashedInstsIssued 91651 # Number of squashed instructions issued system.cpu1.iq.iqSquashedInstsExamined 10961230 # Number of squashed instructions iterated over during squash; mainly for profiling -system.cpu1.iq.iqSquashedOperandsExamined 24701225 # Number of squashed operands that are examined and possibly removed from graph +system.cpu1.iq.iqSquashedOperandsExamined 24699895 # Number of squashed operands that are examined and possibly removed from graph system.cpu1.iq.iqSquashedNonSpecRemoved 103564 # Number of squashed non-spec instructions that were removed system.cpu1.iq.issued_per_cycle::samples 107161169 # Number of insts issued each cycle system.cpu1.iq.issued_per_cycle::mean 0.746820 # Number of insts issued each cycle @@ -1810,7 +1810,7 @@ system.cpu1.fp_regfile_reads 16634 # nu system.cpu1.fp_regfile_writes 13036 # number of floating regfile writes system.cpu1.cc_regfile_reads 280643076 # number of cc regfile reads system.cpu1.cc_regfile_writes 29716175 # number of cc regfile writes -system.cpu1.misc_regfile_reads 149728966 # number of misc regfile reads +system.cpu1.misc_regfile_reads 149724890 # number of misc regfile reads system.cpu1.misc_regfile_writes 794523 # number of misc regfile writes system.iobus.trans_dist::ReadReq 30198 # Transaction distribution system.iobus.trans_dist::ReadResp 30198 # Transaction distribution diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini index be51ba10d..35469b90f 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/config.ini @@ -20,10 +20,11 @@ dtb_filename=/work/gem5/dist/binaries/vexpress.aarch64.20140821.dtb early_kernel_symbols=false enable_context_switch_stats_dump=false eventq_index=0 +exit_on_work_items=false flags_addr=469827632 gic_cpu_addr=738205696 have_large_asid_64=false -have_lpae=false +have_lpae=true have_security=false have_virtualization=false highest_el_is_64=false @@ -46,6 +47,8 @@ phys_addr_range_64=40 readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh reset_addr_64=0 symbolfile= +thermal_components= +thermal_model=Null work_begin_ckpt_count=0 work_begin_cpu_id_exit=-1 work_begin_exit_count=0 @@ -145,7 +148,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=false max_miss_count=0 @@ -223,7 +225,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=2 is_read_only=true max_miss_count=0 @@ -553,11 +554,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu2.dstage2_mmu] type=ArmStage2MMU @@ -1156,11 +1164,18 @@ choicePredictorSize=8192 eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 +indirectHashGHR=true +indirectHashTargets=true +indirectPathLength=3 +indirectSets=256 +indirectTagSize=16 +indirectWays=2 instShiftAmt=2 localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 +useIndirect=true [system.cpu3.dstage2_mmu] type=ArmStage2MMU @@ -1626,7 +1641,6 @@ clk_domain=system.clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=false hit_latency=50 is_read_only=false max_miss_count=0 @@ -1663,7 +1677,6 @@ clk_domain=system.cpu_clk_domain clusivity=mostly_incl demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true hit_latency=20 is_read_only=false max_miss_count=0 @@ -1693,13 +1706,14 @@ size=4194304 [system.membus] type=CoherentXBar -children=badaddr_responder +children=badaddr_responder snoop_filter clk_domain=system.clk_domain eventq_index=0 forward_latency=4 frontend_latency=3 +point_of_coherency=true response_latency=2 -snoop_filter=Null +snoop_filter=system.membus.snoop_filter snoop_response_latency=4 system=system use_default_range=false @@ -1726,6 +1740,13 @@ update_data=false warn_access=warn pio=system.membus.default +[system.membus.snoop_filter] +type=SnoopFilter +eventq_index=0 +lookup_latency=1 +max_capacity=8388608 +system=system + [system.physmem] type=DRAMCtrl IDD0=0.075000 @@ -1930,6 +1951,7 @@ pio=system.iobus.master[5] type=SubSystem children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys eventq_index=0 +thermal_domain=Null [system.realview.dcc.osc_cpu] type=RealViewOsc @@ -2122,6 +2144,7 @@ cpu_pio_delay=10000 dist_addr=738201600 dist_pio_delay=10000 eventq_index=0 +gem5_extensions=true int_latency=10000 it_lines=128 platform=system.realview @@ -2317,8 +2340,9 @@ pio=system.membus.master[4] [system.realview.mcc] type=SubSystem -children=osc_clcd osc_mcc osc_peripheral osc_system_bus +children=osc_clcd osc_mcc osc_peripheral osc_system_bus temp_crtl eventq_index=0 +thermal_domain=Null [system.realview.mcc.osc_clcd] type=RealViewOsc @@ -2364,6 +2388,16 @@ position=0 site=0 voltage_domain=system.voltage_domain +[system.realview.mcc.temp_crtl] +type=RealViewTemperatureSensor +dcc=0 +device=0 +eventq_index=0 +parent=system.realview.realview_io +position=0 +site=0 +system=system + [system.realview.mmc_fake] type=AmbaFake amba_id=0 @@ -2587,6 +2621,7 @@ clk_domain=system.cpu_clk_domain eventq_index=0 forward_latency=0 frontend_latency=1 +point_of_coherency=false response_latency=1 snoop_filter=system.toL2Bus.snoop_filter snoop_response_latency=1 diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr index 14afb57bc..b0ba116d4 100755 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/simerr @@ -5,26 +5,24 @@ warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections warn: Existing EnergyCtrl, but no enabled DVFSHandler found. warn: SCReg: Access to unknown device dcc0:site0:pos0:fn7:dev0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8890, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 9681, Bank: 7 +warn: Tried to read RealView I/O at offset 0x60 that doesn't exist +warn: Tried to read RealView I/O at offset 0x48 that doesn't exist +WARNING: Bank is already active! +Command: 0, Timestamp: 9468, Bank: 3 +WARNING: Bank is already active! +Command: 0, Timestamp: 9409, Bank: 2 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: Tried to read RealView I/O at offset 0x60 that doesn't exist -warn: Tried to read RealView I/O at offset 0x48 that doesn't exist -WARNING: Bank is already active! -Command: 0, Timestamp: 9956, Bank: 2 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 8667, Bank: 1 -WARNING: Bank is already active! -Command: 0, Timestamp: 12274, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 12120, Bank: 5 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -42,23 +40,35 @@ Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 11643, Bank: 2 +Command: 0, Timestamp: 6517, Bank: 3 warn: Tried to read RealView I/O at offset 0x8 that doesn't exist warn: Tried to read RealView I/O at offset 0x48 that doesn't exist -WARNING: Bank is already active! -Command: 0, Timestamp: 11264, Bank: 3 -WARNING: Bank is already active! -Command: 0, Timestamp: 8878, Bank: 3 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 12188, Bank: 4 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -109,10 +119,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -129,6 +135,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -137,8 +147,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -151,10 +159,48 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7601, Bank: 1 +WARNING: Bank is already active! +Command: 0, Timestamp: 7443, Bank: 1 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: Bank is not active! +Command: 1, Timestamp: 5441, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 5583, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 5642, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 5744, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 5805, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 5897, Bank: 7 +WARNING: Bank is not active! +Command: 1, Timestamp: 6007, Bank: 7 +WARNING: Bank is already active! +Command: 0, Timestamp: 6564, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 11135, Bank: 7 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -163,6 +209,14 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -177,32 +231,30 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6453, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: Bank is already active! -Command: 0, Timestamp: 8188, Bank: 4 -WARNING: Bank is already active! -Command: 0, Timestamp: 9018, Bank: 6 +Command: 0, Timestamp: 10204, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 11838, Bank: 3 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -211,22 +263,28 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 6477, Bank: 5 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +Command: 0, Timestamp: 7445, Bank: 4 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7567, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -239,8 +297,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 12028, Bank: 7 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -255,16 +311,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -273,34 +323,26 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6774, Bank: 7 WARNING: Bank is already active! -Command: 0, Timestamp: 10642, Bank: 6 +Command: 0, Timestamp: 6448, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -309,14 +351,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 9126, Bank: 4 +Command: 0, Timestamp: 10284, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 6534, Bank: 3 +WARNING: Bank is not active! +Command: 1, Timestamp: 3928, Bank: 1 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -327,28 +373,16 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 11016, Bank: 1 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -365,6 +399,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -389,14 +427,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -407,10 +445,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7643, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -419,8 +461,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 10843, Bank: 3 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -431,6 +475,12 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6764, Bank: 7 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -439,12 +489,20 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 8559, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7033, Bank: 5 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -455,12 +513,16 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7772, Bank: 1 +WARNING: Bank is already active! +Command: 0, Timestamp: 8190, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 9257, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -469,34 +531,26 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -509,18 +563,20 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 10981, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -529,6 +585,8 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -541,12 +599,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -557,10 +609,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -575,22 +623,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 9067, Bank: 2 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -603,10 +635,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -619,10 +647,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -639,8 +663,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 10772, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -651,16 +673,20 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 5 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6808, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -671,20 +697,22 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 10047, Bank: 2 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -713,6 +741,12 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -729,6 +763,14 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -745,14 +787,12 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -765,16 +805,44 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is not active! +Command: 1, Timestamp: 4731, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 4795, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 4818, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5308, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5494, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5524, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5619, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5650, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5683, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5714, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 5778, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 6025, Bank: 1 +WARNING: Bank is not active! +Command: 1, Timestamp: 6210, Bank: 1 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 7197, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 8763, Bank: 2 +Command: 0, Timestamp: 6448, Bank: 1 WARNING: Bank is already active! -Command: 0, Timestamp: 8788, Bank: 6 +Command: 0, Timestamp: 6993, Bank: 2 WARNING: Bank is already active! -Command: 0, Timestamp: 10548, Bank: 1 +Command: 0, Timestamp: 12168, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -787,6 +855,10 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -797,20 +869,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -835,12 +893,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -863,14 +915,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 9949, Bank: 7 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -879,8 +931,20 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -901,18 +965,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -921,10 +981,18 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -937,8 +1005,10 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -949,10 +1019,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 7475, Bank: 3 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -963,16 +1029,14 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 9111, Bank: 5 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -981,10 +1045,6 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -993,12 +1053,26 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 7906, Bank: 2 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1015,6 +1089,12 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1035,14 +1115,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -WARNING: Bank is already active! -Command: 0, Timestamp: 7611, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 6 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -1055,6 +1131,8 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1063,8 +1141,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1077,20 +1153,16 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1099,12 +1171,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: Bank is already active! -Command: 0, Timestamp: 6448, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 9985, Bank: 2 -WARNING: Bank is already active! -Command: 0, Timestamp: 8266, Bank: 1 +Command: 0, Timestamp: 6595, Bank: 3 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1119,8 +1189,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1145,10 +1213,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR -warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. @@ -1165,8 +1229,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1177,6 +1239,8 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1185,54 +1249,70 @@ WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: Bank is already active! -Command: 0, Timestamp: 6480, Bank: 7 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 6448, Bank: 7 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 6508, Bank: 1 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 7192, Bank: 5 +WARNING: Bank is already active! +Command: 0, Timestamp: 7939, Bank: 2 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1241,6 +1321,10 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: Bank is already active! +Command: 0, Timestamp: 6642, Bank: 4 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR @@ -1263,10 +1347,6 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1279,14 +1359,22 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 -WARNING: One or more banks are active! REF requires all banks to be precharged. -Command: 4, Timestamp: 12458, Bank: 0 +WARNING: Bank is already active! +Command: 0, Timestamp: 10183, Bank: 6 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR @@ -1303,10 +1391,18 @@ warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 +warn: User mode does not have SPSR +warn: User mode does not have SPSR +warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR warn: User mode does not have SPSR +warn: User mode does not have SPSR +WARNING: One or more banks are active! REF requires all banks to be precharged. +Command: 4, Timestamp: 12458, Bank: 0 WARNING: One or more banks are active! REF requires all banks to be precharged. Command: 4, Timestamp: 12458, Bank: 0 warn: User mode does not have SPSR diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt index d8c58ee0c..d7be73045 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/stats.txt @@ -4,11 +4,11 @@ sim_seconds 51.316243 # Nu sim_ticks 51316242679000 # Number of ticks simulated final_tick 51316242679000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 361668 # Simulator instruction rate (inst/s) -host_op_rate 424976 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 21619129427 # Simulator tick rate (ticks/s) -host_mem_usage 686216 # Number of bytes of host memory used -host_seconds 2373.65 # Real time elapsed on the host +host_inst_rate 408194 # Simulator instruction rate (inst/s) +host_op_rate 479646 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 24400273917 # Simulator tick rate (ticks/s) +host_mem_usage 732460 # Number of bytes of host memory used +host_seconds 2103.10 # Real time elapsed on the host sim_insts 858473131 # Number of instructions simulated sim_ops 1008744567 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -372,10 +372,10 @@ system.physmem_1.preEnergy 539141625 # En system.physmem_1.readEnergy 1669683600 # Energy for read commands per rank (pJ) system.physmem_1.writeEnergy 1531975680 # Energy for write commands per rank (pJ) system.physmem_1.refreshEnergy 3312965298240 # Energy for refresh commands per rank (pJ) -system.physmem_1.actBackEnergy 1172482833105 # Energy for active background per rank (pJ) -system.physmem_1.preBackEnergy 29689600432500 # Energy for precharge background per rank (pJ) -system.physmem_1.totalEnergy 34179780291750 # Total energy per rank (pJ) -system.physmem_1.averagePower 667.615252 # Core power per rank (mW) +system.physmem_1.actBackEnergy 1172484635445 # Energy for active background per rank (pJ) +system.physmem_1.preBackEnergy 29689595916750 # Energy for precharge background per rank (pJ) +system.physmem_1.totalEnergy 34179777578340 # Total energy per rank (pJ) +system.physmem_1.averagePower 667.615263 # Core power per rank (mW) system.physmem_1.memoryStateTime::IDLE 48917806002648 # Time in different power states system.physmem_1.memoryStateTime::REF 1693745040000 # Time in different power states system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states diff --git a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal index 7c4566f67..e2578c2a4 100644 --- a/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal +++ b/tests/long/fs/10.linux-boot/ref/arm/linux/realview64-switcheroo-full/system.terminal @@ -32,135 +32,135 @@ [ 0.000000] NR_IRQS:64 nr_irqs:64 0
[ 0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[ 0.000000] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 2748779069440ns
-[ 0.000014] Console: colour dummy device 80x25
-[ 0.000015] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
-[ 0.000016] pid_max: default: 32768 minimum: 301
-[ 0.000024] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000025] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
-[ 0.000086] hw perfevents: no hardware support available
-[ 1.060049] CPU1: failed to come online
-[ 2.080100] CPU2: failed to come online
-[ 3.100151] CPU3: failed to come online
-[ 3.100153] Brought up 1 CPUs
-[ 3.100153] SMP: Total of 1 processors activated.
-[ 3.100180] devtmpfs: initialized
-[ 3.100805] atomic64_test: passed
-[ 3.100869] regulator-dummy: no parameters
-[ 3.101131] NET: Registered protocol family 16
-[ 3.101220] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
-[ 3.101223] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
-[ 3.101262] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
-[ 3.101264] Serial: AMBA PL011 UART driver
-[ 3.101385] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
-[ 3.101407] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
-[ 3.101978] console [ttyAMA0] enabled
-[ 3.102041] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
-[ 3.102067] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
-[ 3.102093] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
-[ 3.102118] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
-[ 3.130359] 3V3: 3300 mV
-[ 3.130380] vgaarb: loaded
-[ 3.130421] SCSI subsystem initialized
-[ 3.130492] libata version 3.00 loaded.
-[ 3.130577] usbcore: registered new interface driver usbfs
-[ 3.130605] usbcore: registered new interface driver hub
-[ 3.130658] usbcore: registered new device driver usb
-[ 3.130692] pps_core: LinuxPPS API ver. 1 registered
-[ 3.130701] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
-[ 3.130721] PTP clock support registered
-[ 3.130886] Switched to clocksource arch_sys_counter
-[ 3.131839] NET: Registered protocol family 2
-[ 3.131931] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
-[ 3.131947] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
-[ 3.131964] TCP: Hash tables configured (established 2048 bind 2048)
-[ 3.131979] TCP: reno registered
-[ 3.131985] UDP hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.131997] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
-[ 3.132028] NET: Registered protocol family 1
-[ 3.132061] RPC: Registered named UNIX socket transport module.
-[ 3.132071] RPC: Registered udp transport module.
-[ 3.132079] RPC: Registered tcp transport module.
-[ 3.132087] RPC: Registered tcp NFSv4.1 backchannel transport module.
-[ 3.132098] PCI: CLS 0 bytes, default 64
-[ 3.132201] futex hash table entries: 1024 (order: 4, 65536 bytes)
-[ 3.132250] HugeTLB registered 2 MB page size, pre-allocated 0 pages
-[ 3.133974] fuse init (API version 7.23)
-[ 3.134030] msgmni has been set to 469
-[ 3.136051] io scheduler noop registered
-[ 3.136088] io scheduler cfq registered (default)
-[ 3.136364] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
-[ 3.136366] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
-[ 3.136367] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
-[ 3.136369] pci_bus 0000:00: root bus resource [bus 00-ff]
-[ 3.136370] pci_bus 0000:00: scanning bus
-[ 3.136372] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
-[ 3.136374] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
-[ 3.136377] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136394] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
-[ 3.136396] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
-[ 3.136398] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
-[ 3.136399] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
-[ 3.136401] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
-[ 3.136403] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
-[ 3.136405] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
-[ 3.136422] pci_bus 0000:00: fixups for bus
-[ 3.136423] pci_bus 0000:00: bus scan returning with max=00
-[ 3.136425] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
-[ 3.136430] pci 0000:00:00.0: fixup irq: got 33
-[ 3.136431] pci 0000:00:00.0: assigning IRQ 33
-[ 3.136434] pci 0000:00:01.0: fixup irq: got 34
-[ 3.136435] pci 0000:00:01.0: assigning IRQ 34
-[ 3.136437] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
-[ 3.136439] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
-[ 3.136441] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
-[ 3.136442] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
-[ 3.136444] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
-[ 3.136458] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
-[ 3.136471] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
-[ 3.136484] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
-[ 3.137065] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
-[ 3.137231] ata_piix 0000:00:01.0: version 2.13
-[ 3.137233] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
-[ 3.137238] ata_piix 0000:00:01.0: enabling bus mastering
-[ 3.137427] scsi0 : ata_piix
-[ 3.137561] scsi1 : ata_piix
-[ 3.137617] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
-[ 3.137630] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
-[ 3.137788] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
-[ 3.137801] e1000: Copyright (c) 1999-2006 Intel Corporation.
-[ 3.137820] e1000 0000:00:00.0: enabling device (0000 -> 0002)
-[ 3.137832] e1000 0000:00:00.0: enabling bus mastering
-[ 3.290888] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
-[ 3.290890] ata1.00: 2096640 sectors, multi 0: LBA
-[ 3.290896] ata1.00: configured for UDMA/33
-[ 3.290913] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
-[ 3.290974] sd 0:0:0:0: Attached scsi generic sg0 type 0
-[ 3.290982] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
-[ 3.290996] sd 0:0:0:0: [sda] Write Protect is off
-[ 3.290997] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
-[ 3.291004] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
-[ 3.291057] sda: sda1
-[ 3.291119] sd 0:0:0:0: [sda] Attached SCSI disk
-[ 3.411182] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
-[ 3.411197] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
-[ 3.411227] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
-[ 3.411238] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
-[ 3.411269] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
-[ 3.411282] igb: Copyright (c) 2007-2014 Intel Corporation.
-[ 3.411405] usbcore: registered new interface driver usb-storage
-[ 3.411475] mousedev: PS/2 mouse device common for all mice
-[ 3.411653] usbcore: registered new interface driver usbhid
-[ 3.411663] usbhid: USB HID core driver
-[ 3.411687] TCP: cubic registered
-[ 3.411694] NET: Registered protocol family 17
- -[ 3.411928] devtmpfs: mounted
-[ 3.411936] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
+[ 0.000027] Console: colour dummy device 80x25
+[ 0.000030] Calibrating delay loop (skipped) preset value.. 3997.69 BogoMIPS (lpj=19988480)
+[ 0.000032] pid_max: default: 32768 minimum: 301
+[ 0.000046] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000048] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
+[ 0.000177] hw perfevents: no hardware support available
+[ 1.060045] CPU1: failed to come online
+[ 2.080096] CPU2: failed to come online
+[ 3.100147] CPU3: failed to come online
+[ 3.100149] Brought up 1 CPUs
+[ 3.100150] SMP: Total of 1 processors activated.
+[ 3.100176] devtmpfs: initialized
+[ 3.100784] atomic64_test: passed
+[ 3.100838] regulator-dummy: no parameters
+[ 3.101093] NET: Registered protocol family 16
+[ 3.101177] vdso: 2 pages (1 code, 1 data) at base ffffffc0006cd000
+[ 3.101181] hw-breakpoint: found 2 breakpoint and 2 watchpoint registers.
+[ 3.101220] software IO TLB [mem 0x8d400000-0x8d800000] (4MB) mapped at [ffffffc00d400000-ffffffc00d7fffff]
+[ 3.101221] Serial: AMBA PL011 UART driver
+[ 3.101342] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/sysctl@020000
+[ 3.101365] 1c090000.uart: ttyAMA0 at MMIO 0x1c090000 (irq = 37, base_baud = 0) is a PL011 rev3
+[ 3.101399] console [ttyAMA0] enabled
+[ 3.101503] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0a0000
+[ 3.101553] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0b0000
+[ 3.101603] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/uart@0c0000
+[ 3.101649] of_amba_device_create(): amba_device_add() failed (-19) for /smb/motherboard/iofpga@3,00000000/wdt@0f0000
+[ 3.130355] 3V3: 3300 mV
+[ 3.130376] vgaarb: loaded
+[ 3.130417] SCSI subsystem initialized
+[ 3.130486] libata version 3.00 loaded.
+[ 3.130565] usbcore: registered new interface driver usbfs
+[ 3.130591] usbcore: registered new interface driver hub
+[ 3.130645] usbcore: registered new device driver usb
+[ 3.130677] pps_core: LinuxPPS API ver. 1 registered
+[ 3.130686] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
+[ 3.130706] PTP clock support registered
+[ 3.130853] Switched to clocksource arch_sys_counter
+[ 3.131766] NET: Registered protocol family 2
+[ 3.131853] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
+[ 3.131874] TCP bind hash table entries: 2048 (order: 3, 32768 bytes)
+[ 3.131900] TCP: Hash tables configured (established 2048 bind 2048)
+[ 3.131914] TCP: reno registered
+[ 3.131921] UDP hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131933] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
+[ 3.131960] NET: Registered protocol family 1
+[ 3.131995] RPC: Registered named UNIX socket transport module.
+[ 3.132005] RPC: Registered udp transport module.
+[ 3.132012] RPC: Registered tcp transport module.
+[ 3.132020] RPC: Registered tcp NFSv4.1 backchannel transport module.
+[ 3.132032] PCI: CLS 0 bytes, default 64
+[ 3.132126] futex hash table entries: 1024 (order: 4, 65536 bytes)
+[ 3.132190] HugeTLB registered 2 MB page size, pre-allocated 0 pages
+[ 3.133863] fuse init (API version 7.23)
+[ 3.133946] msgmni has been set to 469
+[ 3.135911] io scheduler noop registered
+[ 3.135957] io scheduler cfq registered (default)
+[ 3.136166] pci-host-generic 30000000.pci: PCI host bridge to bus 0000:00
+[ 3.136178] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
+[ 3.136189] pci_bus 0000:00: root bus resource [mem 0x40000000-0x4fffffff]
+[ 3.136190] pci_bus 0000:00: root bus resource [bus 00-ff]
+[ 3.136191] pci_bus 0000:00: scanning bus
+[ 3.136194] pci 0000:00:00.0: [8086:1075] type 00 class 0x020000
+[ 3.136196] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
+[ 3.136199] pci 0000:00:00.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136215] pci 0000:00:01.0: [8086:7111] type 00 class 0x010185
+[ 3.136217] pci 0000:00:01.0: reg 0x10: [io 0x0000-0x0007]
+[ 3.136219] pci 0000:00:01.0: reg 0x14: [io 0x0000-0x0003]
+[ 3.136221] pci 0000:00:01.0: reg 0x18: [io 0x0000-0x0007]
+[ 3.136222] pci 0000:00:01.0: reg 0x1c: [io 0x0000-0x0003]
+[ 3.136224] pci 0000:00:01.0: reg 0x20: [io 0x0000-0x000f]
+[ 3.136226] pci 0000:00:01.0: reg 0x30: [mem 0x00000000-0x000007ff pref]
+[ 3.136243] pci_bus 0000:00: fixups for bus
+[ 3.136244] pci_bus 0000:00: bus scan returning with max=00
+[ 3.136246] pci 0000:00:00.0: calling quirk_e100_interrupt+0x0/0x1cc
+[ 3.136251] pci 0000:00:00.0: fixup irq: got 33
+[ 3.136252] pci 0000:00:00.0: assigning IRQ 33
+[ 3.136255] pci 0000:00:01.0: fixup irq: got 34
+[ 3.136256] pci 0000:00:01.0: assigning IRQ 34
+[ 3.136258] pci 0000:00:00.0: BAR 0: assigned [mem 0x40000000-0x4001ffff]
+[ 3.136260] pci 0000:00:00.0: BAR 6: assigned [mem 0x40020000-0x400207ff pref]
+[ 3.136262] pci 0000:00:01.0: BAR 6: assigned [mem 0x40020800-0x40020fff pref]
+[ 3.136264] pci 0000:00:01.0: BAR 4: assigned [io 0x1000-0x100f]
+[ 3.136265] pci 0000:00:01.0: BAR 0: assigned [io 0x1010-0x1017]
+[ 3.136267] pci 0000:00:01.0: BAR 2: assigned [io 0x1018-0x101f]
+[ 3.136269] pci 0000:00:01.0: BAR 1: assigned [io 0x1020-0x1023]
+[ 3.136270] pci 0000:00:01.0: BAR 3: assigned [io 0x1024-0x1027]
+[ 3.136757] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
+[ 3.137006] ata_piix 0000:00:01.0: version 2.13
+[ 3.137015] ata_piix 0000:00:01.0: enabling device (0000 -> 0001)
+[ 3.137032] ata_piix 0000:00:01.0: enabling bus mastering
+[ 3.137198] scsi0 : ata_piix
+[ 3.137253] scsi1 : ata_piix
+[ 3.137270] ata1: PATA max UDMA/33 cmd 0x1010 ctl 0x1020 bmdma 0x1000 irq 34
+[ 3.137271] ata2: PATA max UDMA/33 cmd 0x1018 ctl 0x1024 bmdma 0x1008 irq 34
+[ 3.137332] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI
+[ 3.137333] e1000: Copyright (c) 1999-2006 Intel Corporation.
+[ 3.137337] e1000 0000:00:00.0: enabling device (0000 -> 0002)
+[ 3.137339] e1000 0000:00:00.0: enabling bus mastering
+[ 3.290857] ata1.00: ATA-7: M5 IDE Disk, , max UDMA/66
+[ 3.290858] ata1.00: 2096640 sectors, multi 0: LBA
+[ 3.290864] ata1.00: configured for UDMA/33
+[ 3.290881] scsi 0:0:0:0: Direct-Access ATA M5 IDE Disk n/a PQ: 0 ANSI: 5
+[ 3.290942] sd 0:0:0:0: Attached scsi generic sg0 type 0
+[ 3.290950] sd 0:0:0:0: [sda] 2096640 512-byte logical blocks: (1.07 GB/1023 MiB)
+[ 3.290964] sd 0:0:0:0: [sda] Write Protect is off
+[ 3.290965] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
+[ 3.290972] sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't support DPO or FUA
+[ 3.291025] sda: sda1
+[ 3.291087] sd 0:0:0:0: [sda] Attached SCSI disk
+[ 3.411146] e1000 0000:00:00.0 eth0: (PCI:33MHz:32-bit) 00:90:00:00:00:01
+[ 3.411161] e1000 0000:00:00.0 eth0: Intel(R) PRO/1000 Network Connection
+[ 3.411190] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k
+[ 3.411201] e1000e: Copyright(c) 1999 - 2014 Intel Corporation.
+[ 3.411232] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.0.5-k
+[ 3.411245] igb: Copyright (c) 2007-2014 Intel Corporation.
+[ 3.411368] usbcore: registered new interface driver usb-storage
+[ 3.411435] mousedev: PS/2 mouse device common for all mice
+[ 3.411616] usbcore: registered new interface driver usbhid
+[ 3.411625] usbhid: USB HID core driver
+[ 3.411647] TCP: cubic registered
+[ 3.411654] NET: Registered protocol family 17
+ +[ 3.411878] devtmpfs: mounted
+[ 3.411886] Freeing unused kernel memory: 208K (ffffffc000692000 - ffffffc0006c6000)
-[ 3.450190] udevd[607]: starting version 182
+[ 3.450099] udevd[607]: starting version 182
Starting Bootlog daemon: bootlogd.
-[ 3.533187] random: dd urandom read with 19 bits of entropy available
+[ 3.543144] random: dd urandom read with 19 bits of entropy available
Populating dev cache
net.ipv4.conf.default.rp_filter = 1
net.ipv4.conf.all.rp_filter = 1
@@ -169,7 +169,7 @@ Mon Jan 27 08:00:00 UTC 2014 hwclock: can't open '/dev/misc/rtc': No such file or directory
INIT: Entering runlevel: 5
Configuring network interfaces... udhcpc (v1.21.1) started
-[ 3.671104] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
+[ 3.681072] e1000: eth0 NIC Link is Up 1000 Mbps Full Duplex, Flow Control: None
Sending discover...
Sending discover...
Sending discover...
|