tests: update t1000 & pc-switcheroo-full stats

committed reference config.json files too

5 files changed, 842 insertions, 46 deletions

diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
index 8dffb60f8..477b3f3c7 100644
--- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
@@ -1,7 +1,9 @@
 [root]
 type=Root
 children=system
+eventq_index=0
 full_system=true
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=200000000
 time_sync_spin_threshold=200000
@@ -12,6 +14,7 @@ children=bridge clk_domain cpu cpu_clk_domain disk0 hypervisor_desc intrctrl iob
 boot_osflags=a
 cache_line_size=64
 clk_domain=system.clk_domain
+eventq_index=0
 hypervisor_addr=1099243257856
 hypervisor_bin=/dist/m5/system/binaries/q_new.bin
 hypervisor_desc=system.hypervisor_desc
@@ -20,9 +23,10 @@ hypervisor_desc_bin=/dist/m5/system/binaries/1up-hv.bin
 init_param=0
 kernel=
 load_addr_mask=1099511627775
+load_offset=0
 mem_mode=atomic
 mem_ranges=1048576:68157439 2147483648:2415919103
-memories=system.rom system.physmem1 system.hypervisor_desc system.physmem0 system.nvram system.partition_desc
+memories=system.nvram system.rom system.hypervisor_desc system.physmem0 system.physmem1 system.partition_desc
 num_work_ids=16
 nvram=system.nvram
 nvram_addr=133429198848
@@ -32,7 +36,7 @@ openboot_bin=/dist/m5/system/binaries/openboot_new.bin
 partition_desc=system.partition_desc
 partition_desc_addr=133445976064
 partition_desc_bin=/dist/m5/system/binaries/1up-md.bin
-readfile=tests/halt.sh
+readfile=/z/stever/hg/gem5/tests/halt.sh
 reset_addr=1099243192320
 reset_bin=/dist/m5/system/binaries/reset_new.bin
 rom=system.rom
@@ -50,6 +54,7 @@ system_port=system.membus.slave[0]
 type=Bridge
 clk_domain=system.clk_domain
 delay=100
+eventq_index=0
 ranges=133412421632:133412421639 134217728000:554050781183 644245094400:652835028991 725849473024:1095485095935 1099255955456:1099255955463
 req_size=16
 resp_size=16
@@ -59,11 +64,13 @@ slave=system.membus.master[2]
 [system.clk_domain]
 type=SrcClockDomain
 clock=2
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.cpu]
 type=AtomicSimpleCPU
 children=dtb interrupts isa itb tracer
+branchPred=Null
 checker=Null
 clk_domain=system.cpu_clk_domain
 cpu_id=0
@@ -71,6 +78,7 @@ do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+eventq_index=0
 fastmem=false
 function_trace=false
 function_trace_start=0
@@ -90,6 +98,7 @@ simpoint_profile_file=simpoint.bb.gz
 simpoint_start_insts=
 simulate_data_stalls=false
 simulate_inst_stalls=false
+socket_id=0
 switched_out=false
 system=system
 tracer=system.cpu.tracer
@@ -100,30 +109,37 @@ icache_port=system.membus.slave[1]
 
 [system.cpu.dtb]
 type=SparcTLB
+eventq_index=0
 size=64
 
 [system.cpu.interrupts]
 type=SparcInterrupts
+eventq_index=0
 
 [system.cpu.isa]
 type=SparcISA
+eventq_index=0
 
 [system.cpu.itb]
 type=SparcTLB
+eventq_index=0
 size=64
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu_clk_domain]
 type=SrcClockDomain
 clock=2
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.disk0]
 type=MmDisk
 children=image
 clk_domain=system.clk_domain
+eventq_index=0
 image=system.disk0.image
 pio_addr=134217728000
 pio_latency=200
@@ -134,12 +150,14 @@ pio=system.iobus.master[14]
 type=CowDiskImage
 children=child
 child=system.disk0.image.child
+eventq_index=0
 image_file=
 read_only=false
 table_size=65536
 
 [system.disk0.image.child]
 type=RawDiskImage
+eventq_index=0
 image_file=/dist/m5/system/disks/disk.s10hw2
 read_only=true
 
@@ -148,6 +166,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -157,11 +176,13 @@ port=system.membus.master[5]
 
 [system.intrctrl]
 type=IntrControl
+eventq_index=0
 sys=system
 
 [system.iobus]
 type=NoncoherentBus
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 use_default_range=false
 width=8
@@ -172,6 +193,7 @@ slave=system.bridge.master
 type=CoherentBus
 children=badaddr_responder
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -183,6 +205,7 @@ slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
 [system.membus.badaddr_responder]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=0
 pio_latency=200
@@ -202,6 +225,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -214,6 +238,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -226,6 +251,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -238,6 +264,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -250,6 +277,7 @@ type=SimpleMemory
 bandwidth=0.000000
 clk_domain=system.clk_domain
 conf_table_reported=true
+eventq_index=0
 in_addr_map=true
 latency=60
 latency_var=0
@@ -260,12 +288,14 @@ port=system.membus.master[3]
 [system.t1000]
 type=T1000
 children=fake_clk fake_jbi fake_l2_1 fake_l2_2 fake_l2_3 fake_l2_4 fake_l2esr_1 fake_l2esr_2 fake_l2esr_3 fake_l2esr_4 fake_membnks fake_ssi hterm htod hvuart iob pterm puart0
+eventq_index=0
 intrctrl=system.intrctrl
 system=system
 
 [system.t1000.fake_clk]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=644245094400
 pio_latency=200
@@ -283,6 +313,7 @@ pio=system.iobus.master[0]
 [system.t1000.fake_jbi]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=549755813888
 pio_latency=200
@@ -300,6 +331,7 @@ pio=system.iobus.master[11]
 [system.t1000.fake_l2_1]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=725849473024
 pio_latency=200
@@ -317,6 +349,7 @@ pio=system.iobus.master[2]
 [system.t1000.fake_l2_2]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=725849473088
 pio_latency=200
@@ -334,6 +367,7 @@ pio=system.iobus.master[3]
 [system.t1000.fake_l2_3]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=725849473152
 pio_latency=200
@@ -351,6 +385,7 @@ pio=system.iobus.master[4]
 [system.t1000.fake_l2_4]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=725849473216
 pio_latency=200
@@ -368,6 +403,7 @@ pio=system.iobus.master[5]
 [system.t1000.fake_l2esr_1]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=734439407616
 pio_latency=200
@@ -385,6 +421,7 @@ pio=system.iobus.master[6]
 [system.t1000.fake_l2esr_2]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=734439407680
 pio_latency=200
@@ -402,6 +439,7 @@ pio=system.iobus.master[7]
 [system.t1000.fake_l2esr_3]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=734439407744
 pio_latency=200
@@ -419,6 +457,7 @@ pio=system.iobus.master[8]
 [system.t1000.fake_l2esr_4]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=734439407808
 pio_latency=200
@@ -436,6 +475,7 @@ pio=system.iobus.master[9]
 [system.t1000.fake_membnks]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=648540061696
 pio_latency=200
@@ -453,6 +493,7 @@ pio=system.iobus.master[1]
 [system.t1000.fake_ssi]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=1095216660480
 pio_latency=200
@@ -469,6 +510,7 @@ pio=system.iobus.master[10]
 
 [system.t1000.hterm]
 type=Terminal
+eventq_index=0
 intr_control=system.intrctrl
 number=0
 output=true
@@ -477,6 +519,7 @@ port=3456
 [system.t1000.htod]
 type=DumbTOD
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=1099255906296
 pio_latency=200
 system=system
@@ -486,6 +529,7 @@ pio=system.membus.master[1]
 [system.t1000.hvuart]
 type=Uart8250
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=1099255955456
 pio_latency=200
 platform=system.t1000
@@ -496,6 +540,7 @@ pio=system.iobus.master[13]
 [system.t1000.iob]
 type=Iob
 clk_domain=system.clk_domain
+eventq_index=0
 pio_latency=2
 platform=system.t1000
 system=system
@@ -503,6 +548,7 @@ pio=system.membus.master[0]
 
 [system.t1000.pterm]
 type=Terminal
+eventq_index=0
 intr_control=system.intrctrl
 number=0
 output=true
@@ -511,6 +557,7 @@ port=3456
 [system.t1000.puart0]
 type=Uart8250
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=133412421632
 pio_latency=200
 platform=system.t1000
@@ -520,5 +567,6 @@ pio=system.iobus.master[12]
 
 [system.voltage_domain]
 type=VoltageDomain
+eventq_index=0
 voltage=1.000000
 
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json
new file mode 100644
index 000000000..5f0592320
--- /dev/null
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.json
@@ -0,0 +1,717 @@
+{
+    "name": null, 
+    "sim_quantum": 0, 
+    "system": {
+        "bridge": {
+            "slave": {
+                "peer": "system.membus.master[2]", 
+                "role": "SLAVE"
+            }, 
+            "name": "bridge", 
+            "req_size": 16, 
+            "delay": 5.0000000000000004e-08, 
+            "eventq_index": 0, 
+            "master": {
+                "peer": "system.iobus.slave[0]", 
+                "role": "MASTER"
+            }, 
+            "cxx_class": "Bridge", 
+            "path": "system.bridge", 
+            "resp_size": 16, 
+            "type": "Bridge"
+        }, 
+        "iobus": {
+            "slave": {
+                "peer": [
+                    "system.bridge.master"
+                ], 
+                "role": "SLAVE"
+            }, 
+            "name": "iobus", 
+            "header_cycles": 1, 
+            "width": 8, 
+            "eventq_index": 0, 
+            "master": {
+                "peer": [
+                    "system.t1000.fake_clk.pio", 
+                    "system.t1000.fake_membnks.pio", 
+                    "system.t1000.fake_l2_1.pio", 
+                    "system.t1000.fake_l2_2.pio", 
+                    "system.t1000.fake_l2_3.pio", 
+                    "system.t1000.fake_l2_4.pio", 
+                    "system.t1000.fake_l2esr_1.pio", 
+                    "system.t1000.fake_l2esr_2.pio", 
+                    "system.t1000.fake_l2esr_3.pio", 
+                    "system.t1000.fake_l2esr_4.pio", 
+                    "system.t1000.fake_ssi.pio", 
+                    "system.t1000.fake_jbi.pio", 
+                    "system.t1000.puart0.pio", 
+                    "system.t1000.hvuart.pio", 
+                    "system.disk0.pio"
+                ], 
+                "role": "MASTER"
+            }, 
+            "cxx_class": "NoncoherentBus", 
+            "path": "system.iobus", 
+            "type": "NoncoherentBus", 
+            "use_default_range": false
+        }, 
+        "rom": {
+            "latency": 3.0000000000000004e-08, 
+            "name": "rom", 
+            "eventq_index": 0, 
+            "latency_var": 0.0, 
+            "conf_table_reported": true, 
+            "cxx_class": "SimpleMemory", 
+            "path": "system.rom", 
+            "null": false, 
+            "type": "SimpleMemory", 
+            "port": {
+                "peer": "system.membus.master[3]", 
+                "role": "SLAVE"
+            }, 
+            "in_addr_map": true
+        }, 
+        "membus": {
+            "slave": {
+                "peer": [
+                    "system.system_port", 
+                    "system.cpu.icache_port", 
+                    "system.cpu.dcache_port"
+                ], 
+                "role": "SLAVE"
+            }, 
+            "name": "membus", 
+            "badaddr_responder": {
+                "ret_data8": 255, 
+                "name": "badaddr_responder", 
+                "pio": {
+                    "peer": "system.membus.default", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": true, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": false, 
+                "ret_data64": 18446744073709551615, 
+                "cxx_class": "IsaFake", 
+                "path": "system.membus.badaddr_responder", 
+                "pio_addr": 0, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "default": {
+                "peer": "system.membus.badaddr_responder.pio", 
+                "role": "MASTER"
+            }, 
+            "header_cycles": 1, 
+            "width": 8, 
+            "eventq_index": 0, 
+            "master": {
+                "peer": [
+                    "system.t1000.iob.pio", 
+                    "system.t1000.htod.pio", 
+                    "system.bridge.slave", 
+                    "system.rom.port", 
+                    "system.nvram.port", 
+                    "system.hypervisor_desc.port", 
+                    "system.partition_desc.port", 
+                    "system.physmem0.port", 
+                    "system.physmem1.port"
+                ], 
+                "role": "MASTER"
+            }, 
+            "cxx_class": "CoherentBus", 
+            "path": "system.membus", 
+            "type": "CoherentBus", 
+            "use_default_range": false
+        }, 
+        "t1000": {
+            "htod": {
+                "name": "htod", 
+                "pio": {
+                    "peer": "system.membus.master[1]", 
+                    "role": "SLAVE"
+                }, 
+                "time": "Thu Jan  1 00:00:00 2009", 
+                "pio_latency": 1.0000000000000001e-07, 
+                "eventq_index": 0, 
+                "cxx_class": "DumbTOD", 
+                "path": "system.t1000.htod", 
+                "pio_addr": 1099255906296, 
+                "type": "DumbTOD"
+            }, 
+            "puart0": {
+                "name": "puart0", 
+                "pio": {
+                    "peer": "system.iobus.master[12]", 
+                    "role": "SLAVE"
+                }, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "eventq_index": 0, 
+                "cxx_class": "Uart8250", 
+                "path": "system.t1000.puart0", 
+                "pio_addr": 133412421632, 
+                "type": "Uart8250"
+            }, 
+            "fake_membnks": {
+                "ret_data8": 255, 
+                "name": "fake_membnks", 
+                "pio": {
+                    "peer": "system.iobus.master[1]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 16384, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": false, 
+                "ret_data64": 0, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_membnks", 
+                "pio_addr": 648540061696, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "cxx_class": "T1000", 
+            "fake_jbi": {
+                "ret_data8": 255, 
+                "name": "fake_jbi", 
+                "pio": {
+                    "peer": "system.iobus.master[11]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 4294967296, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": false, 
+                "ret_data64": 18446744073709551615, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_jbi", 
+                "pio_addr": 549755813888, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2esr_2": {
+                "ret_data8": 255, 
+                "name": "fake_l2esr_2", 
+                "pio": {
+                    "peer": "system.iobus.master[7]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 0, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2esr_2", 
+                "pio_addr": 734439407680, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "eventq_index": 0, 
+            "hterm": {
+                "name": "hterm", 
+                "output": true, 
+                "number": 0, 
+                "eventq_index": 0, 
+                "cxx_class": "Terminal", 
+                "path": "system.t1000.hterm", 
+                "type": "Terminal", 
+                "port": 3456
+            }, 
+            "type": "T1000", 
+            "fake_l2_4": {
+                "ret_data8": 255, 
+                "name": "fake_l2_4", 
+                "pio": {
+                    "peer": "system.iobus.master[5]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 1, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2_4", 
+                "pio_addr": 725849473216, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2_1": {
+                "ret_data8": 255, 
+                "name": "fake_l2_1", 
+                "pio": {
+                    "peer": "system.iobus.master[2]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 1, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2_1", 
+                "pio_addr": 725849473024, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2_2": {
+                "ret_data8": 255, 
+                "name": "fake_l2_2", 
+                "pio": {
+                    "peer": "system.iobus.master[3]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 1, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2_2", 
+                "pio_addr": 725849473088, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2_3": {
+                "ret_data8": 255, 
+                "name": "fake_l2_3", 
+                "pio": {
+                    "peer": "system.iobus.master[4]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 1, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2_3", 
+                "pio_addr": 725849473152, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "pterm": {
+                "name": "pterm", 
+                "output": true, 
+                "number": 0, 
+                "eventq_index": 0, 
+                "cxx_class": "Terminal", 
+                "path": "system.t1000.pterm", 
+                "type": "Terminal", 
+                "port": 3456
+            }, 
+            "path": "system.t1000", 
+            "iob": {
+                "name": "iob", 
+                "pio": {
+                    "peer": "system.membus.master[0]", 
+                    "role": "SLAVE"
+                }, 
+                "pio_latency": 1e-09, 
+                "eventq_index": 0, 
+                "cxx_class": "Iob", 
+                "path": "system.t1000.iob", 
+                "type": "Iob"
+            }, 
+            "hvuart": {
+                "name": "hvuart", 
+                "pio": {
+                    "peer": "system.iobus.master[13]", 
+                    "role": "SLAVE"
+                }, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "eventq_index": 0, 
+                "cxx_class": "Uart8250", 
+                "path": "system.t1000.hvuart", 
+                "pio_addr": 1099255955456, 
+                "type": "Uart8250"
+            }, 
+            "name": "t1000", 
+            "fake_l2esr_3": {
+                "ret_data8": 255, 
+                "name": "fake_l2esr_3", 
+                "pio": {
+                    "peer": "system.iobus.master[8]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 0, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2esr_3", 
+                "pio_addr": 734439407744, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_ssi": {
+                "ret_data8": 255, 
+                "name": "fake_ssi", 
+                "pio": {
+                    "peer": "system.iobus.master[10]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 268435456, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": false, 
+                "ret_data64": 18446744073709551615, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_ssi", 
+                "pio_addr": 1095216660480, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2esr_1": {
+                "ret_data8": 255, 
+                "name": "fake_l2esr_1", 
+                "pio": {
+                    "peer": "system.iobus.master[6]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 0, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2esr_1", 
+                "pio_addr": 734439407616, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_l2esr_4": {
+                "ret_data8": 255, 
+                "name": "fake_l2esr_4", 
+                "pio": {
+                    "peer": "system.iobus.master[9]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 8, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": true, 
+                "ret_data64": 0, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_l2esr_4", 
+                "pio_addr": 734439407808, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }, 
+            "fake_clk": {
+                "ret_data8": 255, 
+                "name": "fake_clk", 
+                "pio": {
+                    "peer": "system.iobus.master[0]", 
+                    "role": "SLAVE"
+                }, 
+                "ret_bad_addr": false, 
+                "pio_latency": 1.0000000000000001e-07, 
+                "fake_mem": false, 
+                "pio_size": 4294967296, 
+                "ret_data32": 4294967295, 
+                "eventq_index": 0, 
+                "update_data": false, 
+                "ret_data64": 18446744073709551615, 
+                "cxx_class": "IsaFake", 
+                "path": "system.t1000.fake_clk", 
+                "pio_addr": 644245094400, 
+                "type": "IsaFake", 
+                "ret_data16": 65535
+            }
+        }, 
+        "partition_desc_addr": 133445976064, 
+        "physmem": [
+            {
+                "latency": 3.0000000000000004e-08, 
+                "name": "physmem0", 
+                "eventq_index": 0, 
+                "latency_var": 0.0, 
+                "conf_table_reported": true, 
+                "cxx_class": "SimpleMemory", 
+                "path": "system.physmem0", 
+                "null": false, 
+                "type": "SimpleMemory", 
+                "port": {
+                    "peer": "system.membus.master[7]", 
+                    "role": "SLAVE"
+                }, 
+                "in_addr_map": true
+            }, 
+            {
+                "latency": 3.0000000000000004e-08, 
+                "name": "physmem1", 
+                "eventq_index": 0, 
+                "latency_var": 0.0, 
+                "conf_table_reported": true, 
+                "cxx_class": "SimpleMemory", 
+                "path": "system.physmem1", 
+                "null": false, 
+                "type": "SimpleMemory", 
+                "port": {
+                    "peer": "system.membus.master[8]", 
+                    "role": "SLAVE"
+                }, 
+                "in_addr_map": true
+            }
+        ], 
+        "hypervisor_addr": 1099243257856, 
+        "cxx_class": "SparcSystem", 
+        "load_offset": 0, 
+        "openboot_addr": 1099243716608, 
+        "work_end_ckpt_count": 0, 
+        "nvram_addr": 133429198848, 
+        "work_begin_ckpt_count": 0, 
+        "partition_desc": {
+            "latency": 3.0000000000000004e-08, 
+            "name": "partition_desc", 
+            "eventq_index": 0, 
+            "latency_var": 0.0, 
+            "conf_table_reported": true, 
+            "cxx_class": "SimpleMemory", 
+            "path": "system.partition_desc", 
+            "null": false, 
+            "type": "SimpleMemory", 
+            "port": {
+                "peer": "system.membus.master[6]", 
+                "role": "SLAVE"
+            }, 
+            "in_addr_map": true
+        }, 
+        "clk_domain": {
+            "name": "clk_domain", 
+            "clock": 1e-09, 
+            "eventq_index": 0, 
+            "cxx_class": "SrcClockDomain", 
+            "path": "system.clk_domain", 
+            "type": "SrcClockDomain"
+        }, 
+        "hypervisor_desc": {
+            "latency": 3.0000000000000004e-08, 
+            "name": "hypervisor_desc", 
+            "eventq_index": 0, 
+            "latency_var": 0.0, 
+            "conf_table_reported": true, 
+            "cxx_class": "SimpleMemory", 
+            "path": "system.hypervisor_desc", 
+            "null": false, 
+            "type": "SimpleMemory", 
+            "port": {
+                "peer": "system.membus.master[5]", 
+                "role": "SLAVE"
+            }, 
+            "in_addr_map": true
+        }, 
+        "nvram": {
+            "latency": 3.0000000000000004e-08, 
+            "name": "nvram", 
+            "eventq_index": 0, 
+            "latency_var": 0.0, 
+            "conf_table_reported": true, 
+            "cxx_class": "SimpleMemory", 
+            "path": "system.nvram", 
+            "null": false, 
+            "type": "SimpleMemory", 
+            "port": {
+                "peer": "system.membus.master[4]", 
+                "role": "SLAVE"
+            }, 
+            "in_addr_map": true
+        }, 
+        "eventq_index": 0, 
+        "work_end_exit_count": 0, 
+        "type": "SparcSystem", 
+        "voltage_domain": {
+            "eventq_index": 0, 
+            "path": "system.voltage_domain", 
+            "type": "VoltageDomain", 
+            "name": "voltage_domain", 
+            "cxx_class": "VoltageDomain"
+        }, 
+        "cache_line_size": 64, 
+        "work_cpus_ckpt_count": 0, 
+        "work_begin_exit_count": 0, 
+        "num_work_ids": 16, 
+        "path": "system", 
+        "cpu_clk_domain": {
+            "name": "cpu_clk_domain", 
+            "clock": 1e-09, 
+            "eventq_index": 0, 
+            "cxx_class": "SrcClockDomain", 
+            "path": "system.cpu_clk_domain", 
+            "type": "SrcClockDomain"
+        }, 
+        "mem_mode": "atomic", 
+        "name": "system", 
+        "init_param": 0, 
+        "system_port": {
+            "peer": "system.membus.slave[0]", 
+            "role": "MASTER"
+        }, 
+        "load_addr_mask": 1099511627775, 
+        "cpu": {
+            "simpoint_interval": 100000000, 
+            "do_statistics_insts": true, 
+            "numThreads": 1, 
+            "itb": {
+                "name": "itb", 
+                "eventq_index": 0, 
+                "cxx_class": "SparcISA::TLB", 
+                "path": "system.cpu.itb", 
+                "type": "SparcTLB", 
+                "size": 64
+            }, 
+            "function_trace": false, 
+            "do_checkpoint_insts": true, 
+            "cxx_class": "AtomicSimpleCPU", 
+            "max_loads_all_threads": 0, 
+            "simpoint_profile": false, 
+            "simulate_data_stalls": false, 
+            "function_trace_start": 0, 
+            "cpu_id": 0, 
+            "width": 1, 
+            "eventq_index": 0, 
+            "do_quiesce": true, 
+            "type": "AtomicSimpleCPU", 
+            "fastmem": false, 
+            "profile": 0.0, 
+            "icache_port": {
+                "peer": "system.membus.slave[1]", 
+                "role": "MASTER"
+            }, 
+            "interrupts": {
+                "eventq_index": 0, 
+                "path": "system.cpu.interrupts", 
+                "type": "SparcInterrupts", 
+                "name": "interrupts", 
+                "cxx_class": "SparcISA::Interrupts"
+            }, 
+            "socket_id": 0, 
+            "max_insts_all_threads": 0, 
+            "path": "system.cpu", 
+            "isa": [
+                {
+                    "eventq_index": 0, 
+                    "path": "system.cpu.isa", 
+                    "type": "SparcISA", 
+                    "name": "isa", 
+                    "cxx_class": "SparcISA::ISA"
+                }
+            ], 
+            "switched_out": false, 
+            "name": "cpu", 
+            "dtb": {
+                "name": "dtb", 
+                "eventq_index": 0, 
+                "cxx_class": "SparcISA::TLB", 
+                "path": "system.cpu.dtb", 
+                "type": "SparcTLB", 
+                "size": 64
+            }, 
+            "max_insts_any_thread": 0, 
+            "simulate_inst_stalls": false, 
+            "progress_interval": 0.0, 
+            "dcache_port": {
+                "peer": "system.membus.slave[2]", 
+                "role": "MASTER"
+            }, 
+            "max_loads_any_thread": 0, 
+            "tracer": {
+                "eventq_index": 0, 
+                "path": "system.cpu.tracer", 
+                "type": "ExeTracer", 
+                "name": "tracer", 
+                "cxx_class": "Trace::ExeTracer"
+            }
+        }, 
+        "intrctrl": {
+            "eventq_index": 0, 
+            "path": "system.intrctrl", 
+            "type": "IntrControl", 
+            "name": "intrctrl", 
+            "cxx_class": "IntrControl"
+        }, 
+        "disk0": {
+            "name": "disk0", 
+            "pio": {
+                "peer": "system.iobus.master[14]", 
+                "role": "SLAVE"
+            }, 
+            "image": {
+                "read_only": false, 
+                "name": "image", 
+                "child": {
+                    "read_only": true, 
+                    "name": "child", 
+                    "eventq_index": 0, 
+                    "cxx_class": "RawDiskImage", 
+                    "path": "system.disk0.image.child", 
+                    "type": "RawDiskImage"
+                }, 
+                "eventq_index": 0, 
+                "cxx_class": "CowDiskImage", 
+                "path": "system.disk0.image", 
+                "table_size": 65536, 
+                "type": "CowDiskImage"
+            }, 
+            "pio_latency": 1.0000000000000001e-07, 
+            "eventq_index": 0, 
+            "cxx_class": "MmDisk", 
+            "path": "system.disk0", 
+            "pio_addr": 134217728000, 
+            "type": "MmDisk"
+        }, 
+        "hypervisor_desc_addr": 133446500352, 
+        "reset_addr": 1099243192320, 
+        "work_item_id": -1, 
+        "work_begin_cpu_id_exit": -1
+    }, 
+    "time_sync_period": 0.1, 
+    "eventq_index": 0, 
+    "time_sync_spin_threshold": 9.999999999999999e-05, 
+    "cxx_class": "Root", 
+    "path": "root", 
+    "time_sync_enable": false, 
+    "type": "Root", 
+    "full_system": true
+}
\ No newline at end of file
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr
index 387f71a0d..c7cb2a7c3 100755
--- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr
@@ -23,7 +23,5 @@ warn: rounding error > tolerance
 warn: rounding error > tolerance
     0.145519 rounded to 0
 warn: Sockets disabled, not accepting terminal connections
-warn: CoherentBus system.membus has no snooping ports attached!
 warn: Sockets disabled, not accepting gdb connections
 warn: Don't know what interrupt to clear for console.
-hack: be nice to actually delete the event here
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
index e75f41d79..001061453 100755
--- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
@@ -1,12 +1,10 @@
-Redirecting stdout to build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic/simout
-Redirecting stderr to build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 22 2013 06:07:13
-gem5 started Sep 22 2013 06:07:33
+gem5 compiled May 12 2014 11:27:38
+gem5 started May 12 2014 11:28:05
 gem5 executing on zizzer
-command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re tests/run.py build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
+command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic -re /z/stever/hg/gem5/tests/run.py build/SPARC/tests/opt/long/fs/80.solaris-boot/sparc/solaris/t1000-simple-atomic
 Global frequency set at 2000000000 ticks per second
 info: No kernel set for full system simulation. Assuming you know what you're doing
       0: system.t1000.htod: Real-time clock set to Thu Jan  1 00:00:00 2009
diff --git a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
index e1724881e..3676ead42 100644
--- a/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
+++ b/tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  2.233778                       # Nu
 sim_ticks                                  4467555024                       # Number of ticks simulated
 final_tick                                 4467555024                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   2000000000                       # Frequency of simulated ticks
-host_inst_rate                                1895600                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1896345                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                3800545                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 576292                       # Number of bytes of host memory used
-host_seconds                                  1175.50                       # Real time elapsed on the host
+host_inst_rate                                2578014                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2579027                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                5168737                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 527944                       # Number of bytes of host memory used
+host_seconds                                   864.34                       # Real time elapsed on the host
 sim_insts                                  2228284650                       # Number of instructions simulated
 sim_ops                                    2229160714                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
@@ -35,38 +35,6 @@ system.nvram.bw_write::cpu.data                    41                       # Wr
 system.nvram.bw_write::total                       41                       # Write bandwidth from this memory (bytes/s)
 system.nvram.bw_total::cpu.data                   168                       # Total bandwidth to/from this memory (bytes/s)
 system.nvram.bw_total::total                      168                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem1.bytes_read::cpu.inst       8318106840                       # Number of bytes read from this memory
-system.physmem1.bytes_read::cpu.data       1495885127                       # Number of bytes read from this memory
-system.physmem1.bytes_read::total          9813991967                       # Number of bytes read from this memory
-system.physmem1.bytes_inst_read::cpu.inst   8318106840                       # Number of instructions bytes read from this memory
-system.physmem1.bytes_inst_read::total     8318106840                       # Number of instructions bytes read from this memory
-system.physmem1.bytes_written::cpu.data     897268422                       # Number of bytes written to this memory
-system.physmem1.bytes_written::total        897268422                       # Number of bytes written to this memory
-system.physmem1.num_reads::cpu.inst        2079526710                       # Number of read requests responded to by this memory
-system.physmem1.num_reads::cpu.data         323962420                       # Number of read requests responded to by this memory
-system.physmem1.num_reads::total           2403489130                       # Number of read requests responded to by this memory
-system.physmem1.num_writes::cpu.data        187387796                       # Number of write requests responded to by this memory
-system.physmem1.num_writes::total           187387796                       # Number of write requests responded to by this memory
-system.physmem1.num_other::cpu.data           5403067                       # Number of other requests responded to by this memory
-system.physmem1.num_other::total              5403067                       # Number of other requests responded to by this memory
-system.physmem1.bw_read::cpu.inst          3723784842                       # Total read bandwidth from this memory (bytes/s)
-system.physmem1.bw_read::cpu.data           669666123                       # Total read bandwidth from this memory (bytes/s)
-system.physmem1.bw_read::total             4393450966                       # Total read bandwidth from this memory (bytes/s)
-system.physmem1.bw_inst_read::cpu.inst     3723784842                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem1.bw_inst_read::total        3723784842                       # Instruction read bandwidth from this memory (bytes/s)
-system.physmem1.bw_write::cpu.data          401682091                       # Write bandwidth from this memory (bytes/s)
-system.physmem1.bw_write::total             401682091                       # Write bandwidth from this memory (bytes/s)
-system.physmem1.bw_total::cpu.inst         3723784842                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem1.bw_total::cpu.data         1071348214                       # Total bandwidth to/from this memory (bytes/s)
-system.physmem1.bw_total::total            4795133057                       # Total bandwidth to/from this memory (bytes/s)
-system.partition_desc.bytes_read::cpu.data         4846                       # Number of bytes read from this memory
-system.partition_desc.bytes_read::total          4846                       # Number of bytes read from this memory
-system.partition_desc.num_reads::cpu.data          608                       # Number of read requests responded to by this memory
-system.partition_desc.num_reads::total            608                       # Number of read requests responded to by this memory
-system.partition_desc.bw_read::cpu.data          2169                       # Total read bandwidth from this memory (bytes/s)
-system.partition_desc.bw_read::total             2169                       # Total read bandwidth from this memory (bytes/s)
-system.partition_desc.bw_total::cpu.data         2169                       # Total bandwidth to/from this memory (bytes/s)
-system.partition_desc.bw_total::total            2169                       # Total bandwidth to/from this memory (bytes/s)
 system.rom.bytes_read::cpu.inst                432296                       # Number of bytes read from this memory
 system.rom.bytes_read::cpu.data                696392                       # Number of bytes read from this memory
 system.rom.bytes_read::total                  1128688                       # Number of bytes read from this memory
@@ -107,6 +75,38 @@ system.physmem0.bw_write::total               6894251                       # Wr
 system.physmem0.bw_total::cpu.inst          274105779                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem0.bw_total::cpu.data           50557518                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem0.bw_total::total             324663297                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem1.bytes_read::cpu.inst       8318106840                       # Number of bytes read from this memory
+system.physmem1.bytes_read::cpu.data       1495885127                       # Number of bytes read from this memory
+system.physmem1.bytes_read::total          9813991967                       # Number of bytes read from this memory
+system.physmem1.bytes_inst_read::cpu.inst   8318106840                       # Number of instructions bytes read from this memory
+system.physmem1.bytes_inst_read::total     8318106840                       # Number of instructions bytes read from this memory
+system.physmem1.bytes_written::cpu.data     897268422                       # Number of bytes written to this memory
+system.physmem1.bytes_written::total        897268422                       # Number of bytes written to this memory
+system.physmem1.num_reads::cpu.inst        2079526710                       # Number of read requests responded to by this memory
+system.physmem1.num_reads::cpu.data         323962420                       # Number of read requests responded to by this memory
+system.physmem1.num_reads::total           2403489130                       # Number of read requests responded to by this memory
+system.physmem1.num_writes::cpu.data        187387796                       # Number of write requests responded to by this memory
+system.physmem1.num_writes::total           187387796                       # Number of write requests responded to by this memory
+system.physmem1.num_other::cpu.data           5403067                       # Number of other requests responded to by this memory
+system.physmem1.num_other::total              5403067                       # Number of other requests responded to by this memory
+system.physmem1.bw_read::cpu.inst          3723784842                       # Total read bandwidth from this memory (bytes/s)
+system.physmem1.bw_read::cpu.data           669666123                       # Total read bandwidth from this memory (bytes/s)
+system.physmem1.bw_read::total             4393450966                       # Total read bandwidth from this memory (bytes/s)
+system.physmem1.bw_inst_read::cpu.inst     3723784842                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem1.bw_inst_read::total        3723784842                       # Instruction read bandwidth from this memory (bytes/s)
+system.physmem1.bw_write::cpu.data          401682091                       # Write bandwidth from this memory (bytes/s)
+system.physmem1.bw_write::total             401682091                       # Write bandwidth from this memory (bytes/s)
+system.physmem1.bw_total::cpu.inst         3723784842                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem1.bw_total::cpu.data         1071348214                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem1.bw_total::total            4795133057                       # Total bandwidth to/from this memory (bytes/s)
+system.partition_desc.bytes_read::cpu.data         4846                       # Number of bytes read from this memory
+system.partition_desc.bytes_read::total          4846                       # Number of bytes read from this memory
+system.partition_desc.num_reads::cpu.data          608                       # Number of read requests responded to by this memory
+system.partition_desc.num_reads::total            608                       # Number of read requests responded to by this memory
+system.partition_desc.bw_read::cpu.data          2169                       # Total read bandwidth from this memory (bytes/s)
+system.partition_desc.bw_read::total             2169                       # Total read bandwidth from this memory (bytes/s)
+system.partition_desc.bw_total::cpu.data         2169                       # Total bandwidth to/from this memory (bytes/s)
+system.partition_desc.bw_total::total            2169                       # Total bandwidth to/from this memory (bytes/s)
 system.membus.throughput                   5163367605                       # Throughput (bytes/s)
 system.membus.data_through_bus            11533814443                       # Total data (bytes)
 system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
@@ -136,6 +136,41 @@ system.cpu.num_busy_cycles                 2233777513                       # Nu
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 system.cpu.Branches                         441057355                       # Number of branches fetched
+system.cpu.op_class::No_OpClass              49673656      2.22%      2.22% # Class of executed instruction
+system.cpu.op_class::IntAlu                1619015933     72.49%     74.71% # Class of executed instruction
+system.cpu.op_class::IntMult                        0      0.00%     74.71% # Class of executed instruction
+system.cpu.op_class::IntDiv                         0      0.00%     74.71% # Class of executed instruction
+system.cpu.op_class::FloatAdd                 8419779      0.38%     75.09% # Class of executed instruction
+system.cpu.op_class::FloatCmp                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::FloatCvt                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::FloatMult                      0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::FloatDiv                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::FloatSqrt                      0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdAdd                        0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdAddAcc                     0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdAlu                        0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdCmp                        0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdCvt                        0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdMisc                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdMult                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdMultAcc                    0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdShift                      0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdShiftAcc                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdSqrt                       0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatAdd                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatAlu                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatCmp                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatCvt                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatDiv                   0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatMisc                  0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatMult                  0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatMultAcc               0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::SimdFloatSqrt                  0      0.00%     75.09% # Class of executed instruction
+system.cpu.op_class::MemRead                356274529     15.95%     91.04% # Class of executed instruction
+system.cpu.op_class::MemWrite               200199782      8.96%    100.00% # Class of executed instruction
+system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
+system.cpu.op_class::total                 2233583679                       # Class of executed instruction
 system.cpu.kern.inst.arm                            0                       # number of arm instructions executed
 system.cpu.kern.inst.quiesce                        0                       # number of quiesce instructions executed