diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-05-03 23:18:13 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-05-03 23:18:13 -0500 |
| commit | e8f56bdf45cf77083525273fe83fca95a165d40f (patch) | |
| tree | c53fccb8e9d6ae2bf7b1f7378f9e1f370cc2dd4c /tests/long/fs | |
| parent | 39cbae9581d84c3f0f005abdc91869d6e3232190 (diff) | |
| download | gem5-e8f56bdf45cf77083525273fe83fca95a165d40f.tar.xz | |
Regression: Move x86 fs ruby simulation from quick to long
--HG--
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt
rename : tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal
Diffstat (limited to 'tests/long/fs')
6 files changed, 2335 insertions, 0 deletions
diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini new file mode 100644 index 000000000..78474a665 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini @@ -0,0 +1,1383 @@ +[root] +type=Root +children=system +full_system=true +time_sync_enable=false +time_sync_period=100000000000 +time_sync_spin_threshold=100000000 + +[system] +type=LinuxX86System +children=acpi_description_table_pointer cpu0 cpu1 dir_cntrl0 dma_cntrl0 e820_table intel_mp_pointer intel_mp_table intrctrl l1_cntrl0 l1_cntrl1 l2_cntrl0 pc physmem piobus ruby smbios_table sys_port_proxy +acpi_description_table_pointer=system.acpi_description_table_pointer +boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1 +e820_table=system.e820_table +init_param=0 +intel_mp_pointer=system.intel_mp_pointer +intel_mp_table=system.intel_mp_table +kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp +load_addr_mask=18446744073709551615 +mem_mode=timing +memories=system.physmem +num_work_ids=16 +readfile=tests/halt.sh +smbios_table=system.smbios_table +symbolfile= +work_begin_ckpt_count=0 +work_begin_cpu_id_exit=-1 +work_begin_exit_count=0 +work_cpus_ckpt_count=0 +work_end_ckpt_count=0 +work_end_exit_count=0 +work_item_id=-1 +system_port=system.sys_port_proxy.slave[0] + +[system.acpi_description_table_pointer] +type=X86ACPIRSDP +children=xsdt +oem_id= +revision=2 +rsdt=Null +xsdt=system.acpi_description_table_pointer.xsdt + +[system.acpi_description_table_pointer.xsdt] +type=X86ACPIXSDT +creator_id= +creator_revision=0 +entries= +oem_id= +oem_revision=0 +oem_table_id= + +[system.cpu0] +type=TimingSimpleCPU +children=dtb interrupts itb tracer +checker=Null +clock=500 +cpu_id=0 +defer_registration=false +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu0.dtb +function_trace=false +function_trace_start=0 +interrupts=system.cpu0.interrupts +itb=system.cpu0.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +phase=0 +profile=0 +progress_interval=0 +system=system +tracer=system.cpu0.tracer +workload= +dcache_port=system.l1_cntrl0.sequencer.slave[1] +icache_port=system.l1_cntrl0.sequencer.slave[0] + +[system.cpu0.dtb] +type=X86TLB +children=walker +size=64 +walker=system.cpu0.dtb.walker + +[system.cpu0.dtb.walker] +type=X86PagetableWalker +system=system +port=system.l1_cntrl0.sequencer.slave[3] + +[system.cpu0.interrupts] +type=X86LocalApic +int_latency=1000 +pio_addr=2305843009213693952 +pio_latency=1000 +system=system +int_master=system.piobus.slave[4] +int_slave=system.piobus.master[19] +pio=system.piobus.master[18] + +[system.cpu0.itb] +type=X86TLB +children=walker +size=64 +walker=system.cpu0.itb.walker + +[system.cpu0.itb.walker] +type=X86PagetableWalker +system=system +port=system.l1_cntrl0.sequencer.slave[2] + +[system.cpu0.tracer] +type=ExeTracer + +[system.cpu1] +type=TimingSimpleCPU +children=dtb interrupts itb tracer +checker=Null +clock=500 +cpu_id=1 +defer_registration=false +do_checkpoint_insts=true +do_quiesce=true +do_statistics_insts=true +dtb=system.cpu1.dtb +function_trace=false +function_trace_start=0 +interrupts=system.cpu1.interrupts +itb=system.cpu1.itb +max_insts_all_threads=0 +max_insts_any_thread=0 +max_loads_all_threads=0 +max_loads_any_thread=0 +numThreads=1 +phase=0 +profile=0 +progress_interval=0 +system=system +tracer=system.cpu1.tracer +workload= +dcache_port=system.l1_cntrl1.sequencer.slave[1] +icache_port=system.l1_cntrl1.sequencer.slave[0] + +[system.cpu1.dtb] +type=X86TLB +children=walker +size=64 +walker=system.cpu1.dtb.walker + +[system.cpu1.dtb.walker] +type=X86PagetableWalker +system=system +port=system.l1_cntrl1.sequencer.slave[3] + +[system.cpu1.interrupts] +type=X86LocalApic +int_latency=1000 +pio_addr=2305843009213693952 +pio_latency=1000 +system=system +int_master=system.piobus.slave[5] +int_slave=system.piobus.master[21] +pio=system.piobus.master[20] + +[system.cpu1.itb] +type=X86TLB +children=walker +size=64 +walker=system.cpu1.itb.walker + +[system.cpu1.itb.walker] +type=X86PagetableWalker +system=system +port=system.l1_cntrl1.sequencer.slave[2] + +[system.cpu1.tracer] +type=ExeTracer + +[system.dir_cntrl0] +type=Directory_Controller +children=directory memBuffer +buffer_size=0 +cntrl_id=3 +directory=system.dir_cntrl0.directory +directory_latency=6 +memBuffer=system.dir_cntrl0.memBuffer +number_of_TBEs=256 +recycle_latency=10 +ruby_system=system.ruby +to_mem_ctrl_latency=1 +transitions_per_cycle=32 +version=0 + +[system.dir_cntrl0.directory] +type=RubyDirectoryMemory +map_levels=4 +numa_high_bit=6 +size=134217728 +use_map=false +version=0 + +[system.dir_cntrl0.memBuffer] +type=RubyMemoryControl +bank_bit_0=8 +bank_busy_time=11 +bank_queue_size=12 +banks_per_rank=8 +basic_bus_busy_time=2 +dimm_bit_0=12 +dimms_per_channel=2 +mem_bus_cycle_multiplier=10 +mem_ctl_latency=12 +mem_fixed_delay=0 +mem_random_arbitrate=0 +rank_bit_0=11 +rank_rank_delay=1 +ranks_per_dimm=2 +read_write_delay=2 +refresh_period=1560 +tFaw=0 +version=0 + +[system.dma_cntrl0] +type=DMA_Controller +children=dma_sequencer +buffer_size=0 +cntrl_id=4 +dma_sequencer=system.dma_cntrl0.dma_sequencer +number_of_TBEs=256 +recycle_latency=10 +request_latency=6 +ruby_system=system.ruby +transitions_per_cycle=32 +version=0 + +[system.dma_cntrl0.dma_sequencer] +type=DMASequencer +access_phys_mem=true +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_network_tester=false +using_ruby_tester=false +version=0 +slave=system.pc.south_bridge.ide.dma + +[system.e820_table] +type=X86E820Table +children=entries0 entries1 +entries=system.e820_table.entries0 system.e820_table.entries1 + +[system.e820_table.entries0] +type=X86E820Entry +addr=0 +range_type=2 +size=1048576 + +[system.e820_table.entries1] +type=X86E820Entry +addr=1048576 +range_type=1 +size=133169152 + +[system.intel_mp_pointer] +type=X86IntelMPFloatingPointer +default_config=0 +imcr_present=true +spec_rev=4 + +[system.intel_mp_table] +type=X86IntelMPConfigTable +children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 base_entries33 ext_entries +base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32 system.intel_mp_table.base_entries33 +ext_entries=system.intel_mp_table.ext_entries +local_apic=4276092928 +oem_id= +oem_table_addr=0 +oem_table_size=0 +product_id= +spec_rev=4 + +[system.intel_mp_table.base_entries00] +type=X86IntelMPProcessor +bootstrap=true +enable=true +family=0 +feature_flags=0 +local_apic_id=0 +local_apic_version=20 +model=0 +stepping=0 + +[system.intel_mp_table.base_entries01] +type=X86IntelMPProcessor +bootstrap=false +enable=true +family=0 +feature_flags=0 +local_apic_id=1 +local_apic_version=20 +model=0 +stepping=0 + +[system.intel_mp_table.base_entries02] +type=X86IntelMPIOAPIC +address=4273995776 +enable=true +id=2 +version=17 + +[system.intel_mp_table.base_entries03] +type=X86IntelMPBus +bus_id=0 +bus_type=ISA + +[system.intel_mp_table.base_entries04] +type=X86IntelMPBus +bus_id=1 +bus_type=PCI + +[system.intel_mp_table.base_entries05] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=16 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=1 +source_bus_irq=16 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries06] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=0 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries07] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=2 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=0 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries08] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=1 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries09] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=1 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=1 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries10] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=3 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries11] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=3 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=3 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries12] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=4 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries13] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=4 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=4 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries14] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=5 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries15] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=5 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=5 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries16] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=6 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries17] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=6 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=6 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries18] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=7 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries19] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=7 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=7 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries20] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=8 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries21] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=8 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=8 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries22] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=9 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries23] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=9 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=9 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries24] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=10 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries25] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=10 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=10 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries26] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=11 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries27] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=11 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=11 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries28] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=12 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries29] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=12 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=12 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries30] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=13 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries31] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=13 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=13 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries32] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=0 +interrupt_type=ExtInt +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=14 +trigger=ConformTrigger + +[system.intel_mp_table.base_entries33] +type=X86IntelMPIOIntAssignment +dest_io_apic_id=2 +dest_io_apic_intin=14 +interrupt_type=INT +polarity=ConformPolarity +source_bus_id=0 +source_bus_irq=14 +trigger=ConformTrigger + +[system.intel_mp_table.ext_entries] +type=X86IntelMPBusHierarchy +bus_id=0 +parent_bus=1 +subtractive_decode=true + +[system.intrctrl] +type=IntrControl +sys=system + +[system.l1_cntrl0] +type=L1Cache_Controller +children=L1DcacheMemory L1IcacheMemory sequencer +L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory +L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory +buffer_size=0 +cntrl_id=0 +l1_request_latency=2 +l1_response_latency=2 +l2_select_num_bits=0 +number_of_TBEs=256 +recycle_latency=10 +ruby_system=system.ruby +send_evictions=false +sequencer=system.l1_cntrl0.sequencer +to_l2_latency=1 +transitions_per_cycle=32 +version=0 + +[system.l1_cntrl0.L1DcacheMemory] +type=RubyCache +assoc=2 +is_icache=false +latency=3 +replacement_policy=PSEUDO_LRU +size=32768 +start_index_bit=6 + +[system.l1_cntrl0.L1IcacheMemory] +type=RubyCache +assoc=2 +is_icache=false +latency=3 +replacement_policy=PSEUDO_LRU +size=32768 +start_index_bit=6 + +[system.l1_cntrl0.sequencer] +type=RubySequencer +access_phys_mem=true +dcache=system.l1_cntrl0.L1DcacheMemory +deadlock_threshold=500000 +icache=system.l1_cntrl0.L1IcacheMemory +max_outstanding_requests=16 +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_network_tester=false +using_ruby_tester=false +version=0 +pio_port=system.piobus.slave[2] +slave=system.cpu0.icache_port system.cpu0.dcache_port system.cpu0.itb.walker.port system.cpu0.dtb.walker.port + +[system.l1_cntrl1] +type=L1Cache_Controller +children=L1DcacheMemory L1IcacheMemory sequencer +L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory +L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory +buffer_size=0 +cntrl_id=1 +l1_request_latency=2 +l1_response_latency=2 +l2_select_num_bits=0 +number_of_TBEs=256 +recycle_latency=10 +ruby_system=system.ruby +send_evictions=false +sequencer=system.l1_cntrl1.sequencer +to_l2_latency=1 +transitions_per_cycle=32 +version=1 + +[system.l1_cntrl1.L1DcacheMemory] +type=RubyCache +assoc=2 +is_icache=false +latency=3 +replacement_policy=PSEUDO_LRU +size=32768 +start_index_bit=6 + +[system.l1_cntrl1.L1IcacheMemory] +type=RubyCache +assoc=2 +is_icache=false +latency=3 +replacement_policy=PSEUDO_LRU +size=32768 +start_index_bit=6 + +[system.l1_cntrl1.sequencer] +type=RubySequencer +access_phys_mem=true +dcache=system.l1_cntrl1.L1DcacheMemory +deadlock_threshold=500000 +icache=system.l1_cntrl1.L1IcacheMemory +max_outstanding_requests=16 +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_network_tester=false +using_ruby_tester=false +version=1 +pio_port=system.piobus.slave[3] +slave=system.cpu1.icache_port system.cpu1.dcache_port system.cpu1.itb.walker.port system.cpu1.dtb.walker.port + +[system.l2_cntrl0] +type=L2Cache_Controller +children=L2cacheMemory +L2cacheMemory=system.l2_cntrl0.L2cacheMemory +buffer_size=0 +cntrl_id=2 +l2_request_latency=2 +l2_response_latency=2 +number_of_TBEs=256 +recycle_latency=10 +ruby_system=system.ruby +to_l1_latency=1 +transitions_per_cycle=32 +version=0 + +[system.l2_cntrl0.L2cacheMemory] +type=RubyCache +assoc=2 +is_icache=false +latency=15 +replacement_policy=PSEUDO_LRU +size=4194304 +start_index_bit=6 + +[system.pc] +type=Pc +children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge terminal +intrctrl=system.intrctrl +system=system + +[system.pc.behind_pci] +type=IsaFake +fake_mem=false +pio_addr=9223372036854779128 +pio_latency=1000 +pio_size=8 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[12] + +[system.pc.com_1] +type=Uart8250 +children=terminal +pio_addr=9223372036854776824 +pio_latency=1000 +platform=system.pc +system=system +terminal=system.pc.com_1.terminal +pio=system.piobus.master[13] + +[system.pc.com_1.terminal] +type=Terminal +intr_control=system.intrctrl +number=0 +output=true +port=3456 + +[system.pc.com_1.terminal] +type=Terminal +intr_control=system.intrctrl +number=0 +output=true +port=3456 + +[system.pc.fake_com_2] +type=IsaFake +fake_mem=false +pio_addr=9223372036854776568 +pio_latency=1000 +pio_size=8 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[14] + +[system.pc.fake_com_3] +type=IsaFake +fake_mem=false +pio_addr=9223372036854776808 +pio_latency=1000 +pio_size=8 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[15] + +[system.pc.fake_com_4] +type=IsaFake +fake_mem=false +pio_addr=9223372036854776552 +pio_latency=1000 +pio_size=8 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[16] + +[system.pc.fake_floppy] +type=IsaFake +fake_mem=false +pio_addr=9223372036854776818 +pio_latency=1000 +pio_size=2 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[17] + +[system.pc.i_dont_exist] +type=IsaFake +fake_mem=false +pio_addr=9223372036854775936 +pio_latency=1000 +pio_size=1 +ret_bad_addr=false +ret_data16=65535 +ret_data32=4294967295 +ret_data64=18446744073709551615 +ret_data8=255 +system=system +update_data=false +warn_access= +pio=system.piobus.master[11] + +[system.pc.pciconfig] +type=PciConfigAll +bus=0 +pio_latency=1 +platform=system.pc +size=16777216 +system=system +pio=system.piobus.default + +[system.pc.south_bridge] +type=SouthBridge +children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker +cmos=system.pc.south_bridge.cmos +dma1=system.pc.south_bridge.dma1 +io_apic=system.pc.south_bridge.io_apic +keyboard=system.pc.south_bridge.keyboard +pic1=system.pc.south_bridge.pic1 +pic2=system.pc.south_bridge.pic2 +pio_latency=1000 +pit=system.pc.south_bridge.pit +platform=system.pc +speaker=system.pc.south_bridge.speaker + +[system.pc.south_bridge.cmos] +type=Cmos +children=int_pin +int_pin=system.pc.south_bridge.cmos.int_pin +pio_addr=9223372036854775920 +pio_latency=1000 +system=system +time=Sun Jan 1 00:00:00 2012 +pio=system.piobus.master[1] + +[system.pc.south_bridge.cmos.int_pin] +type=X86IntSourcePin + +[system.pc.south_bridge.dma1] +type=I8237 +pio_addr=9223372036854775808 +pio_latency=1000 +system=system +pio=system.piobus.master[2] + +[system.pc.south_bridge.ide] +type=IdeController +children=disks0 disks1 +BAR0=496 +BAR0LegacyIO=true +BAR0Size=8 +BAR1=1012 +BAR1LegacyIO=true +BAR1Size=3 +BAR2=368 +BAR2LegacyIO=true +BAR2Size=8 +BAR3=884 +BAR3LegacyIO=true +BAR3Size=3 +BAR4=1 +BAR4LegacyIO=false +BAR4Size=16 +BAR5=1 +BAR5LegacyIO=false +BAR5Size=0 +BIST=0 +CacheLineSize=0 +CardbusCIS=0 +ClassCode=1 +Command=0 +DeviceID=28945 +ExpansionROM=0 +HeaderType=0 +InterruptLine=14 +InterruptPin=1 +LatencyTimer=0 +MaximumLatency=0 +MinimumGrant=0 +ProgIF=128 +Revision=0 +Status=640 +SubClassCode=1 +SubsystemID=0 +SubsystemVendorID=0 +VendorID=32902 +config_latency=20000 +ctrl_offset=0 +disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1 +io_shift=0 +max_backoff_delay=10000000 +min_backoff_delay=4000 +pci_bus=0 +pci_dev=4 +pci_func=0 +pio_latency=1000 +platform=system.pc +system=system +config=system.piobus.master[4] +dma=system.piobus.slave[0] +pio=system.piobus.master[3] + +[system.pc.south_bridge.ide.disks0] +type=IdeDisk +children=image +delay=1000000 +driveID=master +image=system.pc.south_bridge.ide.disks0.image + +[system.pc.south_bridge.ide.disks0.image] +type=CowDiskImage +children=child +child=system.pc.south_bridge.ide.disks0.image.child +image_file= +read_only=false +table_size=65536 + +[system.pc.south_bridge.ide.disks0.image.child] +type=RawDiskImage +image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img +read_only=true + +[system.pc.south_bridge.ide.disks1] +type=IdeDisk +children=image +delay=1000000 +driveID=master +image=system.pc.south_bridge.ide.disks1.image + +[system.pc.south_bridge.ide.disks1.image] +type=CowDiskImage +children=child +child=system.pc.south_bridge.ide.disks1.image.child +image_file= +read_only=false +table_size=65536 + +[system.pc.south_bridge.ide.disks1.image.child] +type=RawDiskImage +image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img +read_only=true + +[system.pc.south_bridge.int_lines0] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines0.sink +source=system.pc.south_bridge.pic1.output + +[system.pc.south_bridge.int_lines0.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.io_apic +number=0 + +[system.pc.south_bridge.int_lines1] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines1.sink +source=system.pc.south_bridge.pic2.output + +[system.pc.south_bridge.int_lines1.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.pic1 +number=2 + +[system.pc.south_bridge.int_lines2] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines2.sink +source=system.pc.south_bridge.cmos.int_pin + +[system.pc.south_bridge.int_lines2.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.pic2 +number=0 + +[system.pc.south_bridge.int_lines3] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines3.sink +source=system.pc.south_bridge.pit.int_pin + +[system.pc.south_bridge.int_lines3.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.pic1 +number=0 + +[system.pc.south_bridge.int_lines4] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines4.sink +source=system.pc.south_bridge.pit.int_pin + +[system.pc.south_bridge.int_lines4.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.io_apic +number=2 + +[system.pc.south_bridge.int_lines5] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines5.sink +source=system.pc.south_bridge.keyboard.keyboard_int_pin + +[system.pc.south_bridge.int_lines5.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.io_apic +number=1 + +[system.pc.south_bridge.int_lines6] +type=X86IntLine +children=sink +sink=system.pc.south_bridge.int_lines6.sink +source=system.pc.south_bridge.keyboard.mouse_int_pin + +[system.pc.south_bridge.int_lines6.sink] +type=X86IntSinkPin +device=system.pc.south_bridge.io_apic +number=12 + +[system.pc.south_bridge.io_apic] +type=I82094AA +apic_id=2 +external_int_pic=system.pc.south_bridge.pic1 +int_latency=1000 +pio_addr=4273995776 +pio_latency=1000 +system=system +int_master=system.piobus.slave[1] +pio=system.piobus.master[10] + +[system.pc.south_bridge.keyboard] +type=I8042 +children=keyboard_int_pin mouse_int_pin +command_port=9223372036854775908 +data_port=9223372036854775904 +keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin +mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin +pio_addr=0 +pio_latency=1000 +system=system +pio=system.piobus.master[5] + +[system.pc.south_bridge.keyboard.keyboard_int_pin] +type=X86IntSourcePin + +[system.pc.south_bridge.keyboard.mouse_int_pin] +type=X86IntSourcePin + +[system.pc.south_bridge.pic1] +type=I8259 +children=output +mode=I8259Master +output=system.pc.south_bridge.pic1.output +pio_addr=9223372036854775840 +pio_latency=1000 +slave=system.pc.south_bridge.pic2 +system=system +pio=system.piobus.master[6] + +[system.pc.south_bridge.pic1.output] +type=X86IntSourcePin + +[system.pc.south_bridge.pic2] +type=I8259 +children=output +mode=I8259Slave +output=system.pc.south_bridge.pic2.output +pio_addr=9223372036854775968 +pio_latency=1000 +slave=Null +system=system +pio=system.piobus.master[7] + +[system.pc.south_bridge.pic2.output] +type=X86IntSourcePin + +[system.pc.south_bridge.pit] +type=I8254 +children=int_pin +int_pin=system.pc.south_bridge.pit.int_pin +pio_addr=9223372036854775872 +pio_latency=1000 +system=system +pio=system.piobus.master[8] + +[system.pc.south_bridge.pit.int_pin] +type=X86IntSourcePin + +[system.pc.south_bridge.speaker] +type=PcSpeaker +i8254=system.pc.south_bridge.pit +pio_addr=9223372036854775905 +pio_latency=1000 +system=system +pio=system.piobus.master[9] + +[system.physmem] +type=SimpleMemory +conf_table_reported=false +file= +in_addr_map=true +latency=30000 +latency_var=0 +null=false +range=0:134217727 +zero=false +port=system.piobus.master[0] + +[system.piobus] +type=Bus +block_size=64 +bus_id=0 +clock=1000 +header_cycles=1 +use_default_range=true +width=64 +default=system.pc.pciconfig.pio +master=system.physmem.port[0] system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.cpu0.interrupts.pio system.cpu0.interrupts.int_slave system.cpu1.interrupts.pio system.cpu1.interrupts.int_slave +slave=system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master system.l1_cntrl0.sequencer.pio_port system.l1_cntrl1.sequencer.pio_port system.cpu0.interrupts.int_master system.cpu1.interrupts.int_master + +[system.ruby] +type=RubySystem +children=network profiler +block_size_bytes=64 +clock=500 +mem_size=134217728 +no_mem_vec=false +random_seed=1234 +randomization=false +stats_filename=ruby.stats + +[system.ruby.network] +type=SimpleNetwork +children=topology +adaptive_routing=false +buffer_size=0 +control_msg_size=8 +endpoint_bandwidth=1000 +number_of_virtual_networks=10 +ruby_system=system.ruby +topology=system.ruby.network.topology + +[system.ruby.network.topology] +type=Topology +children=ext_links0 ext_links1 ext_links2 ext_links3 ext_links4 int_links0 int_links1 int_links2 int_links3 int_links4 routers0 routers1 routers2 routers3 routers4 routers5 +description=Crossbar +ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2 system.ruby.network.topology.ext_links3 system.ruby.network.topology.ext_links4 +int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2 system.ruby.network.topology.int_links3 system.ruby.network.topology.int_links4 +print_config=false +routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2 system.ruby.network.topology.routers3 system.ruby.network.topology.routers4 system.ruby.network.topology.routers5 + +[system.ruby.network.topology.ext_links0] +type=SimpleExtLink +bandwidth_factor=16 +ext_node=system.l1_cntrl0 +int_node=system.ruby.network.topology.routers0 +latency=1 +link_id=0 +weight=1 + +[system.ruby.network.topology.ext_links1] +type=SimpleExtLink +bandwidth_factor=16 +ext_node=system.l1_cntrl1 +int_node=system.ruby.network.topology.routers1 +latency=1 +link_id=1 +weight=1 + +[system.ruby.network.topology.ext_links2] +type=SimpleExtLink +bandwidth_factor=16 +ext_node=system.l2_cntrl0 +int_node=system.ruby.network.topology.routers2 +latency=1 +link_id=2 +weight=1 + +[system.ruby.network.topology.ext_links3] +type=SimpleExtLink +bandwidth_factor=16 +ext_node=system.dir_cntrl0 +int_node=system.ruby.network.topology.routers3 +latency=1 +link_id=3 +weight=1 + +[system.ruby.network.topology.ext_links4] +type=SimpleExtLink +bandwidth_factor=16 +ext_node=system.dma_cntrl0 +int_node=system.ruby.network.topology.routers4 +latency=1 +link_id=4 +weight=1 + +[system.ruby.network.topology.int_links0] +type=SimpleIntLink +bandwidth_factor=16 +latency=1 +link_id=5 +node_a=system.ruby.network.topology.routers0 +node_b=system.ruby.network.topology.routers5 +weight=1 + +[system.ruby.network.topology.int_links1] +type=SimpleIntLink +bandwidth_factor=16 +latency=1 +link_id=6 +node_a=system.ruby.network.topology.routers1 +node_b=system.ruby.network.topology.routers5 +weight=1 + +[system.ruby.network.topology.int_links2] +type=SimpleIntLink +bandwidth_factor=16 +latency=1 +link_id=7 +node_a=system.ruby.network.topology.routers2 +node_b=system.ruby.network.topology.routers5 +weight=1 + +[system.ruby.network.topology.int_links3] +type=SimpleIntLink +bandwidth_factor=16 +latency=1 +link_id=8 +node_a=system.ruby.network.topology.routers3 +node_b=system.ruby.network.topology.routers5 +weight=1 + +[system.ruby.network.topology.int_links4] +type=SimpleIntLink +bandwidth_factor=16 +latency=1 +link_id=9 +node_a=system.ruby.network.topology.routers4 +node_b=system.ruby.network.topology.routers5 +weight=1 + +[system.ruby.network.topology.routers0] +type=BasicRouter +router_id=0 + +[system.ruby.network.topology.routers1] +type=BasicRouter +router_id=1 + +[system.ruby.network.topology.routers2] +type=BasicRouter +router_id=2 + +[system.ruby.network.topology.routers3] +type=BasicRouter +router_id=3 + +[system.ruby.network.topology.routers4] +type=BasicRouter +router_id=4 + +[system.ruby.network.topology.routers5] +type=BasicRouter +router_id=5 + +[system.ruby.profiler] +type=RubyProfiler +all_instructions=false +hot_lines=false +num_of_sequencers=2 +ruby_system=system.ruby + +[system.smbios_table] +type=X86SMBiosSMBiosTable +children=structures +major_version=2 +minor_version=5 +structures=system.smbios_table.structures + +[system.smbios_table.structures] +type=X86SMBiosBiosInformation +characteristic_ext_bytes= +characteristics= +emb_cont_firmware_major=0 +emb_cont_firmware_minor=0 +major=0 +minor=0 +release_date=06/08/2008 +rom_size=0 +starting_addr_segment=0 +vendor= +version= + +[system.sys_port_proxy] +type=RubyPortProxy +access_phys_mem=true +ruby_system=system.ruby +support_data_reqs=true +support_inst_reqs=true +system=system +using_network_tester=false +using_ruby_tester=false +version=0 +slave=system.system_port + diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats new file mode 100644 index 000000000..f3d58bfdd --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats @@ -0,0 +1,708 @@ + +================ Begin RubySystem Configuration Print ================ + +RubySystem config: + random_seed: 1234 + randomization: 0 + cycle_period: 500 + block_size_bytes: 64 + block_size_bits: 6 + memory_size_bytes: 134217728 + memory_size_bits: 27 + +Network Configuration +--------------------- +network: SIMPLE_NETWORK +topology: + +virtual_net_0: active, unordered +virtual_net_1: active, ordered +virtual_net_2: active, unordered +virtual_net_3: inactive +virtual_net_4: inactive +virtual_net_5: inactive +virtual_net_6: inactive +virtual_net_7: inactive +virtual_net_8: inactive +virtual_net_9: inactive + + +Profiler Configuration +---------------------- +periodic_stats_period: 1000000 + +================ End RubySystem Configuration Print ================ + + +Real time: Apr/30/2012 03:41:58 + +Profiler Stats +-------------- +Elapsed_time_in_seconds: 635 +Elapsed_time_in_minutes: 10.5833 +Elapsed_time_in_hours: 0.176389 +Elapsed_time_in_days: 0.00734954 + +Virtual_time_in_seconds: 634.41 +Virtual_time_in_minutes: 10.5735 +Virtual_time_in_hours: 0.176225 +Virtual_time_in_days: 0.00734271 + +Ruby_current_time: 10609379371 +Ruby_start_time: 0 +Ruby_cycles: 10609379371 + +mbytes_resident: 267.07 +mbytes_total: 511.406 +resident_ratio: 0.522235 + +ruby_cycles_executed: [ 10609379372 10609379372 ] + +Busy Controller Counts: +L1Cache-0:0 L1Cache-1:0 +L2Cache-0:0 +Directory-0:0 +DMA-0:0 + +Busy Bank Count:0 + +sequencer_requests_outstanding: [binsize: 1 max: 2 count: 187820632 average: 1.00009 | standard deviation: 0.00953306 | 0 187803562 17070 ] + +All Non-Zero Cycle Demand Cache Accesses +---------------------------------------- +miss_latency: [binsize: 1 max: 171 count: 187820631 average: 3.39134 | standard deviation: 5.2186 | 0 0 0 185167359 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 968687 360 299 324 1431839 442 29 55471 396 374 169 16721 201 124 40 32 58 1 1 3 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12771 11 6 12 99731 53 39 34 64890 57 7 6 12 49 6 0 1 5 5 ] +miss_latency_LD: [binsize: 1 max: 171 count: 14904214 average: 5.1415 | standard deviation: 9.3064 | 0 0 0 13521342 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127527 49 51 45 1194807 288 8 19874 224 232 85 4872 149 99 34 25 32 1 1 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2618 2 2 1 16177 17 7 5 15599 14 3 1 4 10 3 0 0 1 1 ] +miss_latency_ST: [binsize: 1 max: 171 count: 9480962 average: 5.51309 | standard deviation: 17.8961 | 0 0 0 9129497 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 28986 16 10 12 180921 99 2 14858 85 68 52 1857 24 15 2 2 7 0 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4517 5 0 4 70891 24 21 21 48866 33 3 5 5 39 3 0 1 4 4 ] +miss_latency_IFETCH: [binsize: 1 max: 165 count: 162265044 average: 3.09464 | standard deviation: 1.92336 | 0 0 0 161451088 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 795815 273 223 254 225 27 19 28 19 28 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5358 4 4 7 11621 10 11 8 3 9 0 0 3 ] +miss_latency_RMW_Read: [binsize: 1 max: 163 count: 492779 average: 6.1766 | standard deviation: 10.7903 | 0 0 0 426659 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10783 15 11 11 33161 10 0 12125 33 16 10 8497 16 8 2 2 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 227 0 0 0 868 1 0 0 315 1 1 ] +miss_latency_Locked_RMW_Read: [binsize: 1 max: 161 count: 338816 average: 5.46921 | standard deviation: 8.08396 | 0 0 0 299957 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5576 7 4 2 22725 18 0 8586 35 30 22 1495 12 2 2 3 6 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 51 0 0 0 174 1 0 0 107 ] +miss_latency_Locked_RMW_Write: [binsize: 1 max: 3 count: 338816 average: 3 | standard deviation: 0 | 0 0 0 338816 ] +miss_latency_NULL: [binsize: 1 max: 171 count: 187820631 average: 3.39134 | standard deviation: 5.2186 | 0 0 0 185167359 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 968687 360 299 324 1431839 442 29 55471 396 374 169 16721 201 124 40 32 58 1 1 3 2 4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 12771 11 6 12 99731 53 39 34 64890 57 7 6 12 49 6 0 1 5 5 ] +miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_wCC_Times: 0 +miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +imcomplete_dir_Times: 0 +miss_latency_LD_NULL: [binsize: 1 max: 171 count: 14904214 average: 5.1415 | standard deviation: 9.3064 | 0 0 0 13521342 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 127527 49 51 45 1194807 288 8 19874 224 232 85 4872 149 99 34 25 32 1 1 2 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2618 2 2 1 16177 17 7 5 15599 14 3 1 4 10 3 0 0 1 1 ] +miss_latency_ST_NULL: [binsize: 1 max: 171 count: 9480962 average: 5.51309 | standard deviation: 17.8961 | 0 0 0 9129497 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 28986 16 10 12 180921 99 2 14858 85 68 52 1857 24 15 2 2 7 0 0 0 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 4517 5 0 4 70891 24 21 21 48866 33 3 5 5 39 3 0 1 4 4 ] +miss_latency_IFETCH_NULL: [binsize: 1 max: 165 count: 162265044 average: 3.09464 | standard deviation: 1.92336 | 0 0 0 161451088 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 795815 273 223 254 225 27 19 28 19 28 0 0 0 0 0 0 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5358 4 4 7 11621 10 11 8 3 9 0 0 3 ] +miss_latency_RMW_Read_NULL: [binsize: 1 max: 163 count: 492779 average: 6.1766 | standard deviation: 10.7903 | 0 0 0 426659 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10783 15 11 11 33161 10 0 12125 33 16 10 8497 16 8 2 2 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 227 0 0 0 868 1 0 0 315 1 1 ] +miss_latency_Locked_RMW_Read_NULL: [binsize: 1 max: 161 count: 338816 average: 5.46921 | standard deviation: 8.08396 | 0 0 0 299957 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5576 7 4 2 22725 18 0 8586 35 30 22 1495 12 2 2 3 6 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 51 0 0 0 174 1 0 0 107 ] +miss_latency_Locked_RMW_Write_NULL: [binsize: 1 max: 3 count: 338816 average: 3 | standard deviation: 0 | 0 0 0 338816 ] + +All Non-Zero Cycle SW Prefetch Requests +------------------------------------ +prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] +Request vs. RubySystem State Profile +-------------------------------- + + +filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + +Message Delayed Cycles +---------------------- +Total_delay_cycles: [binsize: 1 max: 13 count: 10850974 average: 0.59462 | standard deviation: 1.42374 | 9237583 1029 657 892 1609097 1059 106 119 110 244 9 6 16 47 ] +Total_nonPF_delay_cycles: [binsize: 1 max: 9 count: 4764816 average: 0.0223746 | standard deviation: 0.296857 | 4737436 520 425 679 25631 106 3 1 10 5 ] + virtual_network_0_delay_cycles: [binsize: 1 max: 13 count: 6086158 average: 1.04263 | standard deviation: 1.75725 | 4500147 509 232 213 1583466 953 103 118 100 239 9 6 16 47 ] + virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 9 count: 83533 average: 0.0149761 | standard deviation: 0.225696 | 83067 123 97 98 116 28 0 0 0 4 ] + virtual_network_3_delay_cycles: [binsize: 1 max: 9 count: 4681283 average: 0.0225067 | standard deviation: 0.297971 | 4654369 397 328 581 25515 78 3 1 10 1 ] + virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + +Resource Usage +-------------- +page_size: 4096 +user_time: 634 +system_time: 0 +page_reclaims: 70180 +page_faults: 196 +swaps: 0 +block_inputs: 0 +block_outputs: 0 + +Network Stats +------------- + +total_msg_count_Control: 8492901 67943208 +total_msg_count_Request_Control: 248654 1989232 +total_msg_count_Response_Data: 8788194 632749968 +total_msg_count_Response_Control: 10854297 86834376 +total_msg_count_Writeback_Data: 4753752 342270144 +total_msg_count_Writeback_Control: 282753 2262024 +total_msgs: 33420551 total_bytes: 1134048952 + +switch_0_inlinks: 2 +switch_0_outlinks: 2 +links_utilized_percent_switch_0: 0.0323999 + links_utilized_percent_switch_0_link_0: 0.0382499 bw: 16000 base_latency: 1 + links_utilized_percent_switch_0_link_1: 0.02655 bw: 16000 base_latency: 1 + + outgoing_messages_switch_0_link_0_Request_Control: 42688 341504 [ 42688 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Data: 842729 60676488 [ 0 842729 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_0_Response_Control: 488898 3911184 [ 0 488898 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Control: 855066 6840528 [ 855066 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Data: 40424 2910528 [ 0 40424 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Response_Control: 517774 4142192 [ 0 16296 501478 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Data: 429162 30899664 [ 429108 54 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_0_link_1_Writeback_Control: 34458 275664 [ 34458 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + +switch_1_inlinks: 2 +switch_1_outlinks: 2 +links_utilized_percent_switch_1: 0.0735359 + links_utilized_percent_switch_1_link_0: 0.0818749 bw: 16000 base_latency: 1 + links_utilized_percent_switch_1_link_1: 0.0651969 bw: 16000 base_latency: 1 + + outgoing_messages_switch_1_link_0_Request_Control: 40845 326760 [ 40845 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Data: 1788501 128772072 [ 0 1788501 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_0_Response_Control: 1235479 9883832 [ 0 1235479 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Control: 1798206 14385648 [ 1798206 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Data: 34071 2453112 [ 0 34071 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Response_Control: 1270539 10164312 [ 0 17798 1252741 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Data: 1155422 83190384 [ 1155308 114 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_1_link_1_Writeback_Control: 59793 478344 [ 59793 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + +switch_2_inlinks: 2 +switch_2_outlinks: 2 +links_utilized_percent_switch_2: 0.110241 + links_utilized_percent_switch_2_link_0: 0.0976111 bw: 16000 base_latency: 1 + links_utilized_percent_switch_2_link_1: 0.122871 bw: 16000 base_latency: 1 + + outgoing_messages_switch_2_link_0_Control: 2653272 21226176 [ 2653272 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Data: 202919 14610168 [ 0 202919 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Response_Control: 1876808 15014464 [ 0 122589 1754219 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Data: 1584584 114090048 [ 1584416 168 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_0_Writeback_Control: 94251 754008 [ 94251 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Control: 177695 1421560 [ 177695 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Request_Control: 81588 652704 [ 81588 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Data: 2677208 192758976 [ 0 2677208 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_2_link_1_Response_Control: 1717623 13740984 [ 0 1717623 0 0 0 0 0 0 0 0 ] base_latency: 1 + +switch_3_inlinks: 2 +switch_3_outlinks: 2 +links_utilized_percent_switch_3: 0.00651138 + links_utilized_percent_switch_3_link_0: 0.00495717 bw: 16000 base_latency: 1 + links_utilized_percent_switch_3_link_1: 0.00806559 bw: 16000 base_latency: 1 + + outgoing_messages_switch_3_link_0_Control: 177695 1421560 [ 177695 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Data: 95249 6857928 [ 0 95249 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_0_Response_Control: 16914 135312 [ 0 16914 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Data: 177695 12794040 [ 0 177695 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_3_link_1_Response_Control: 112163 897304 [ 0 112163 0 0 0 0 0 0 0 0 ] base_latency: 1 + +switch_4_inlinks: 2 +switch_4_outlinks: 2 +links_utilized_percent_switch_4: 0 + links_utilized_percent_switch_4_link_0: 0 bw: 16000 base_latency: 1 + links_utilized_percent_switch_4_link_1: 0 bw: 16000 base_latency: 1 + + +switch_5_inlinks: 5 +switch_5_outlinks: 5 +links_utilized_percent_switch_5: 0.0445386 + links_utilized_percent_switch_5_link_0: 0.0382499 bw: 16000 base_latency: 1 + links_utilized_percent_switch_5_link_1: 0.0818749 bw: 16000 base_latency: 1 + links_utilized_percent_switch_5_link_2: 0.0976111 bw: 16000 base_latency: 1 + links_utilized_percent_switch_5_link_3: 0.00495717 bw: 16000 base_latency: 1 + links_utilized_percent_switch_5_link_4: 0 bw: 16000 base_latency: 1 + + outgoing_messages_switch_5_link_0_Request_Control: 42688 341504 [ 42688 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_0_Response_Data: 842729 60676488 [ 0 842729 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_0_Response_Control: 488898 3911184 [ 0 488898 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_1_Request_Control: 40845 326760 [ 40845 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_1_Response_Data: 1788501 128772072 [ 0 1788501 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_1_Response_Control: 1235479 9883832 [ 0 1235479 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_2_Control: 2653272 21226176 [ 2653272 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_2_Response_Data: 202919 14610168 [ 0 202919 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_2_Response_Control: 1876808 15014464 [ 0 122589 1754219 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_2_Writeback_Data: 1584584 114090048 [ 1584416 168 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_2_Writeback_Control: 94251 754008 [ 94251 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_3_Control: 177695 1421560 [ 177695 0 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_3_Response_Data: 95249 6857928 [ 0 95249 0 0 0 0 0 0 0 0 ] base_latency: 1 + outgoing_messages_switch_5_link_3_Response_Control: 16914 135312 [ 0 16914 0 0 0 0 0 0 0 0 ] base_latency: 1 + +Cache Stats: system.l1_cntrl0.L1IcacheMemory + system.l1_cntrl0.L1IcacheMemory_total_misses: 326846 + system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 326846 + system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0 + system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0 + system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0 + + system.l1_cntrl0.L1IcacheMemory_request_type_IFETCH: 100% + + system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 326846 100% + +Cache Stats: system.l1_cntrl0.L1DcacheMemory + system.l1_cntrl0.L1DcacheMemory_total_misses: 528220 + system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 528220 + system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0 + system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0 + system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0 + + system.l1_cntrl0.L1DcacheMemory_request_type_LD: 54.1774% + system.l1_cntrl0.L1DcacheMemory_request_type_ST: 45.8226% + + system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 528220 100% + + --- L1Cache --- + - Event Counts - +Load [6224073 8680141 ] 14904214 +Ifetch [103471616 58793435 ] 162265051 +Store [5279560 5371813 ] 10651373 +Inv [16350 17912 ] 34262 +L1_Replacement [827635 1770998 ] 2598633 +Fwd_GETX [12252 11795 ] 24047 +Fwd_GETS [14082 11138 ] 25220 +Fwd_GET_INSTR [4 0 ] 4 +Data [658 968 ] 1626 +Data_Exclusive [248296 1024255 ] 1272551 +DataS_fromL1 [11138 14086 ] 25224 +Data_all_Acks [582637 749192 ] 1331829 +Ack [12337 9705 ] 22042 +Ack_all [12995 10673 ] 23668 +WB_Ack [463566 1215101 ] 1678667 + + - Transitions - +NP Load [277889 1086402 ] 1364291 +NP Ifetch [326723 486562 ] 813285 +NP Store [224047 199057 ] 423104 +NP Inv [5639 4132 ] 9771 +NP L1_Replacement [0 0 ] 0 + +I Load [8287 10294 ] 18581 +I Ifetch [123 548 ] 671 +I Store [5660 5638 ] 11298 +I Inv [0 0 ] 0 +I L1_Replacement [8798 9094 ] 17892 + +S Load [577238 501390 ] 1078628 +S Ifetch [103144768 58306320 ] 161451088 +S Store [12337 9705 ] 22042 +S Inv [10590 13636 ] 24226 +S L1_Replacement [355271 546803 ] 902074 + +E Load [1142385 2670000 ] 3812385 +E Ifetch [0 0 ] 0 +E Store [81265 85104 ] 166369 +E Inv [67 30 ] 97 +E L1_Replacement [165622 937435 ] 1103057 +E Fwd_GETX [352 103 ] 455 +E Fwd_GETS [877 1394 ] 2271 +E Fwd_GET_INSTR [0 0 ] 0 + +M Load [4218274 4412055 ] 8630329 +M Ifetch [0 0 ] 0 +M Store [4956251 5072309 ] 10028560 +M Inv [54 114 ] 168 +M L1_Replacement [297944 277666 ] 575610 +M Fwd_GETX [11900 11692 ] 23592 +M Fwd_GETS [13205 9744 ] 22949 +M Fwd_GET_INSTR [4 0 ] 4 + +IS Load [0 0 ] 0 +IS Ifetch [0 0 ] 0 +IS Store [0 0 ] 0 +IS Inv [0 0 ] 0 +IS L1_Replacement [0 0 ] 0 +IS Data_Exclusive [248296 1024255 ] 1272551 +IS DataS_fromL1 [11138 14086 ] 25224 +IS Data_all_Acks [353588 545465 ] 899053 + +IM Load [0 0 ] 0 +IM Ifetch [0 0 ] 0 +IM Store [0 0 ] 0 +IM Inv [0 0 ] 0 +IM L1_Replacement [0 0 ] 0 +IM Data [658 968 ] 1626 +IM Data_all_Acks [229049 203727 ] 432776 +IM Ack [0 0 ] 0 + +SM Load [0 0 ] 0 +SM Ifetch [0 0 ] 0 +SM Store [0 0 ] 0 +SM Inv [0 0 ] 0 +SM L1_Replacement [0 0 ] 0 +SM Ack [12337 9705 ] 22042 +SM Ack_all [12995 10673 ] 23668 + +IS_I Load [0 0 ] 0 +IS_I Ifetch [0 0 ] 0 +IS_I Store [0 0 ] 0 +IS_I Inv [0 0 ] 0 +IS_I L1_Replacement [0 0 ] 0 +IS_I Data_Exclusive [0 0 ] 0 +IS_I DataS_fromL1 [0 0 ] 0 +IS_I Data_all_Acks [0 0 ] 0 + +M_I Load [0 0 ] 0 +M_I Ifetch [2 5 ] 7 +M_I Store [0 0 ] 0 +M_I Inv [0 0 ] 0 +M_I L1_Replacement [0 0 ] 0 +M_I Fwd_GETX [0 0 ] 0 +M_I Fwd_GETS [0 0 ] 0 +M_I Fwd_GET_INSTR [0 0 ] 0 +M_I WB_Ack [463566 1215101 ] 1678667 + +SINK_WB_ACK Load [0 0 ] 0 +SINK_WB_ACK Ifetch [0 0 ] 0 +SINK_WB_ACK Store [0 0 ] 0 +SINK_WB_ACK Inv [0 0 ] 0 +SINK_WB_ACK L1_Replacement [0 0 ] 0 +SINK_WB_ACK WB_Ack [0 0 ] 0 + +Cache Stats: system.l1_cntrl1.L1IcacheMemory + system.l1_cntrl1.L1IcacheMemory_total_misses: 487110 + system.l1_cntrl1.L1IcacheMemory_total_demand_misses: 487110 + system.l1_cntrl1.L1IcacheMemory_total_prefetches: 0 + system.l1_cntrl1.L1IcacheMemory_total_sw_prefetches: 0 + system.l1_cntrl1.L1IcacheMemory_total_hw_prefetches: 0 + + system.l1_cntrl1.L1IcacheMemory_request_type_IFETCH: 100% + + system.l1_cntrl1.L1IcacheMemory_access_mode_type_Supervisor: 487110 100% + +Cache Stats: system.l1_cntrl1.L1DcacheMemory + system.l1_cntrl1.L1DcacheMemory_total_misses: 1311096 + system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 1311096 + system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0 + system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0 + system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0 + + system.l1_cntrl1.L1DcacheMemory_request_type_LD: 83.6473% + system.l1_cntrl1.L1DcacheMemory_request_type_ST: 16.3527% + + system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor: 1311096 100% + +Cache Stats: system.l2_cntrl0.L2cacheMemory + system.l2_cntrl0.L2cacheMemory_total_misses: 226966 + system.l2_cntrl0.L2cacheMemory_total_demand_misses: 226966 + system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 + system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 + + system.l2_cntrl0.L2cacheMemory_request_type_GETS: 26.2969% + system.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR: 7.50861% + system.l2_cntrl0.L2cacheMemory_request_type_GETX: 66.1945% + + system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 226966 100% + + --- L2Cache --- + - Event Counts - +L1_GET_INSTR [813956 ] 813956 +L1_GETS [1383116 ] 1383116 +L1_GETX [434406 ] 434406 +L1_UPGRADE [22042 ] 22042 +L1_PUTX [1678667 ] 1678667 +L1_PUTX_old [0 ] 0 +Fwd_L1_GETX [0 ] 0 +Fwd_L1_GETS [0 ] 0 +Fwd_L1_GET_INSTR [0 ] 0 +L2_Replacement [95206 ] 95206 +L2_Replacement_clean [16957 ] 16957 +Mem_Data [177695 ] 177695 +Mem_Ack [112163 ] 112163 +WB_Data [24702 ] 24702 +WB_Data_clean [690 ] 690 +Ack [1945 ] 1945 +Ack_all [8481 ] 8481 +Unblock [25224 ] 25224 +Unblock_Cancel [0 ] 0 +Exclusive_Unblock [1728995 ] 1728995 +MEM_Inv [0 ] 0 + + - Transitions - +NP L1_GET_INSTR [17038 ] 17038 +NP L1_GETS [34465 ] 34465 +NP L1_GETX [126192 ] 126192 +NP L1_PUTX [0 ] 0 +NP L1_PUTX_old [0 ] 0 + +SS L1_GET_INSTR [796726 ] 796726 +SS L1_GETS [85101 ] 85101 +SS L1_GETX [1832 ] 1832 +SS L1_UPGRADE [22042 ] 22042 +SS L1_PUTX [0 ] 0 +SS L1_PUTX_old [0 ] 0 +SS L2_Replacement [266 ] 266 +SS L2_Replacement_clean [8118 ] 8118 +SS MEM_Inv [0 ] 0 + +M L1_GET_INSTR [188 ] 188 +M L1_GETS [1238086 ] 1238086 +M L1_GETX [282331 ] 282331 +M L1_PUTX [0 ] 0 +M L1_PUTX_old [0 ] 0 +M L2_Replacement [94758 ] 94758 +M L2_Replacement_clean [8756 ] 8756 +M MEM_Inv [0 ] 0 + +MT L1_GET_INSTR [4 ] 4 +MT L1_GETS [25220 ] 25220 +MT L1_GETX [24047 ] 24047 +MT L1_PUTX [1678667 ] 1678667 +MT L1_PUTX_old [0 ] 0 +MT L2_Replacement [182 ] 182 +MT L2_Replacement_clean [83 ] 83 +MT MEM_Inv [0 ] 0 + +M_I L1_GET_INSTR [0 ] 0 +M_I L1_GETS [0 ] 0 +M_I L1_GETX [0 ] 0 +M_I L1_UPGRADE [0 ] 0 +M_I L1_PUTX [0 ] 0 +M_I L1_PUTX_old [0 ] 0 +M_I Mem_Ack [112163 ] 112163 +M_I MEM_Inv [0 ] 0 + +MT_I L1_GET_INSTR [0 ] 0 +MT_I L1_GETS [0 ] 0 +MT_I L1_GETX [0 ] 0 +MT_I L1_UPGRADE [0 ] 0 +MT_I L1_PUTX [0 ] 0 +MT_I L1_PUTX_old [0 ] 0 +MT_I WB_Data [125 ] 125 +MT_I WB_Data_clean [0 ] 0 +MT_I Ack_all [57 ] 57 +MT_I MEM_Inv [0 ] 0 + +MCT_I L1_GET_INSTR [0 ] 0 +MCT_I L1_GETS [0 ] 0 +MCT_I L1_GETX [0 ] 0 +MCT_I L1_UPGRADE [0 ] 0 +MCT_I L1_PUTX [0 ] 0 +MCT_I L1_PUTX_old [0 ] 0 +MCT_I WB_Data [43 ] 43 +MCT_I WB_Data_clean [0 ] 0 +MCT_I Ack_all [40 ] 40 + +I_I L1_GET_INSTR [0 ] 0 +I_I L1_GETS [0 ] 0 +I_I L1_GETX [0 ] 0 +I_I L1_UPGRADE [0 ] 0 +I_I L1_PUTX [0 ] 0 +I_I L1_PUTX_old [0 ] 0 +I_I Ack [1679 ] 1679 +I_I Ack_all [8118 ] 8118 + +S_I L1_GET_INSTR [0 ] 0 +S_I L1_GETS [0 ] 0 +S_I L1_GETX [0 ] 0 +S_I L1_UPGRADE [0 ] 0 +S_I L1_PUTX [0 ] 0 +S_I L1_PUTX_old [0 ] 0 +S_I Ack [266 ] 266 +S_I Ack_all [266 ] 266 +S_I MEM_Inv [0 ] 0 + +ISS L1_GET_INSTR [0 ] 0 +ISS L1_GETS [0 ] 0 +ISS L1_GETX [0 ] 0 +ISS L1_PUTX [0 ] 0 +ISS L1_PUTX_old [0 ] 0 +ISS L2_Replacement [0 ] 0 +ISS L2_Replacement_clean [0 ] 0 +ISS Mem_Data [34465 ] 34465 +ISS MEM_Inv [0 ] 0 + +IS L1_GET_INSTR [0 ] 0 +IS L1_GETS [0 ] 0 +IS L1_GETX [0 ] 0 +IS L1_PUTX [0 ] 0 +IS L1_PUTX_old [0 ] 0 +IS L2_Replacement [0 ] 0 +IS L2_Replacement_clean [0 ] 0 +IS Mem_Data [17038 ] 17038 +IS MEM_Inv [0 ] 0 + +IM L1_GET_INSTR [0 ] 0 +IM L1_GETS [0 ] 0 +IM L1_GETX [0 ] 0 +IM L1_PUTX [0 ] 0 +IM L1_PUTX_old [0 ] 0 +IM L2_Replacement [0 ] 0 +IM L2_Replacement_clean [0 ] 0 +IM Mem_Data [126192 ] 126192 +IM MEM_Inv [0 ] 0 + +SS_MB L1_GET_INSTR [0 ] 0 +SS_MB L1_GETS [174 ] 174 +SS_MB L1_GETX [0 ] 0 +SS_MB L1_UPGRADE [0 ] 0 +SS_MB L1_PUTX [0 ] 0 +SS_MB L1_PUTX_old [0 ] 0 +SS_MB L2_Replacement [0 ] 0 +SS_MB L2_Replacement_clean [0 ] 0 +SS_MB Unblock_Cancel [0 ] 0 +SS_MB Exclusive_Unblock [23874 ] 23874 +SS_MB MEM_Inv [0 ] 0 + +MT_MB L1_GET_INSTR [0 ] 0 +MT_MB L1_GETS [70 ] 70 +MT_MB L1_GETX [4 ] 4 +MT_MB L1_UPGRADE [0 ] 0 +MT_MB L1_PUTX [0 ] 0 +MT_MB L1_PUTX_old [0 ] 0 +MT_MB L2_Replacement [0 ] 0 +MT_MB L2_Replacement_clean [0 ] 0 +MT_MB Unblock_Cancel [0 ] 0 +MT_MB Exclusive_Unblock [1705121 ] 1705121 +MT_MB MEM_Inv [0 ] 0 + +M_MB L1_GET_INSTR [0 ] 0 +M_MB L1_GETS [0 ] 0 +M_MB L1_GETX [0 ] 0 +M_MB L1_UPGRADE [0 ] 0 +M_MB L1_PUTX [0 ] 0 +M_MB L1_PUTX_old [0 ] 0 +M_MB L2_Replacement [0 ] 0 +M_MB L2_Replacement_clean [0 ] 0 +M_MB Exclusive_Unblock [0 ] 0 +M_MB MEM_Inv [0 ] 0 + +MT_IIB L1_GET_INSTR [0 ] 0 +MT_IIB L1_GETS [0 ] 0 +MT_IIB L1_GETX [0 ] 0 +MT_IIB L1_UPGRADE [0 ] 0 +MT_IIB L1_PUTX [0 ] 0 +MT_IIB L1_PUTX_old [0 ] 0 +MT_IIB L2_Replacement [0 ] 0 +MT_IIB L2_Replacement_clean [0 ] 0 +MT_IIB WB_Data [24523 ] 24523 +MT_IIB WB_Data_clean [689 ] 689 +MT_IIB Unblock [12 ] 12 +MT_IIB MEM_Inv [0 ] 0 + +MT_IB L1_GET_INSTR [0 ] 0 +MT_IB L1_GETS [0 ] 0 +MT_IB L1_GETX [0 ] 0 +MT_IB L1_UPGRADE [0 ] 0 +MT_IB L1_PUTX [0 ] 0 +MT_IB L1_PUTX_old [0 ] 0 +MT_IB L2_Replacement [0 ] 0 +MT_IB L2_Replacement_clean [0 ] 0 +MT_IB WB_Data [11 ] 11 +MT_IB WB_Data_clean [1 ] 1 +MT_IB Unblock_Cancel [0 ] 0 +MT_IB MEM_Inv [0 ] 0 + +MT_SB L1_GET_INSTR [0 ] 0 +MT_SB L1_GETS [0 ] 0 +MT_SB L1_GETX [0 ] 0 +MT_SB L1_UPGRADE [0 ] 0 +MT_SB L1_PUTX [0 ] 0 +MT_SB L1_PUTX_old [0 ] 0 +MT_SB L2_Replacement [0 ] 0 +MT_SB L2_Replacement_clean [0 ] 0 +MT_SB Unblock [25212 ] 25212 +MT_SB MEM_Inv [0 ] 0 + +Memory controller: system.dir_cntrl0.memBuffer: + memory_total_requests: 272944 + memory_reads: 177695 + memory_writes: 95249 + memory_refreshes: 4108449 + memory_total_request_delays: 25207 + memory_delays_per_request: 0.0923523 + memory_delays_in_input_queue: 7 + memory_delays_behind_head_of_bank_queue: 0 + memory_delays_stalled_at_head_of_bank_queue: 25200 + memory_stalls_for_bank_busy: 11193 + memory_stalls_for_random_busy: 0 + memory_stalls_for_anti_starvation: 0 + memory_stalls_for_arbitration: 2202 + memory_stalls_for_bus: 11804 + memory_stalls_for_tfaw: 0 + memory_stalls_for_read_write_turnaround: 0 + memory_stalls_for_read_read_turnaround: 1 + accesses_per_bank: 8796 9232 8713 8487 8759 8199 8936 8313 8486 8359 8337 9440 8301 8128 8185 7202 8172 8248 8224 8141 8420 8367 8241 8178 8468 8442 8634 9202 9127 8950 10053 8204 + + --- Directory --- + - Event Counts - +Fetch [177695 ] 177695 +Data [95249 ] 95249 +Memory_Data [177695 ] 177695 +Memory_Ack [95249 ] 95249 +DMA_READ [0 ] 0 +DMA_WRITE [0 ] 0 +CleanReplacement [16914 ] 16914 + + - Transitions - +I Fetch [177695 ] 177695 +I DMA_READ [0 ] 0 +I DMA_WRITE [0 ] 0 + +ID Fetch [0 ] 0 +ID Data [0 ] 0 +ID Memory_Data [0 ] 0 +ID DMA_READ [0 ] 0 +ID DMA_WRITE [0 ] 0 + +ID_W Fetch [0 ] 0 +ID_W Data [0 ] 0 +ID_W Memory_Ack [0 ] 0 +ID_W DMA_READ [0 ] 0 +ID_W DMA_WRITE [0 ] 0 + +M Data [95249 ] 95249 +M DMA_READ [0 ] 0 +M DMA_WRITE [0 ] 0 +M CleanReplacement [16914 ] 16914 + +IM Fetch [0 ] 0 +IM Data [0 ] 0 +IM Memory_Data [177695 ] 177695 +IM DMA_READ [0 ] 0 +IM DMA_WRITE [0 ] 0 + +MI Fetch [0 ] 0 +MI Data [0 ] 0 +MI Memory_Ack [95249 ] 95249 +MI DMA_READ [0 ] 0 +MI DMA_WRITE [0 ] 0 + +M_DRD Data [0 ] 0 +M_DRD DMA_READ [0 ] 0 +M_DRD DMA_WRITE [0 ] 0 + +M_DRDI Fetch [0 ] 0 +M_DRDI Data [0 ] 0 +M_DRDI Memory_Ack [0 ] 0 +M_DRDI DMA_READ [0 ] 0 +M_DRDI DMA_WRITE [0 ] 0 + +M_DWR Data [0 ] 0 +M_DWR DMA_READ [0 ] 0 +M_DWR DMA_WRITE [0 ] 0 + +M_DWRI Fetch [0 ] 0 +M_DWRI Data [0 ] 0 +M_DWRI Memory_Ack [0 ] 0 +M_DWRI DMA_READ [0 ] 0 +M_DWRI DMA_WRITE [0 ] 0 + + --- DMA --- + - Event Counts - +ReadRequest [0 ] 0 +WriteRequest [0 ] 0 +Data [0 ] 0 +Ack [0 ] 0 + + - Transitions - +READY ReadRequest [0 ] 0 +READY WriteRequest [0 ] 0 + +BUSY_RD Data [0 ] 0 + +BUSY_WR Ack [0 ] 0 + diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr new file mode 100755 index 000000000..62578ab56 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr @@ -0,0 +1,11 @@ +warn: Sockets disabled, not accepting terminal connections +warn: Reading current count from inactive timer. +warn: Sockets disabled, not accepting gdb connections +warn: Don't know what interrupt to clear for console. +warn: instruction 'fxsave' unimplemented +warn: instruction 'wbinvd' unimplemented +warn: instruction 'wbinvd' unimplemented +hack: Assuming logical destinations are 1 << id. +warn: Tried to clear PCI interrupt 14 +warn: Unknown mouse command 0xe1. +hack: be nice to actually delete the event here diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout new file mode 100755 index 000000000..0b014a692 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout @@ -0,0 +1,12 @@ +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Apr 30 2012 03:31:05 +gem5 started Apr 30 2012 03:31:22 +gem5 executing on ribera.cs.wisc.edu +command line: build/X86_MESI_CMP_directory/gem5.fast -d build/X86_MESI_CMP_directory/tests/fast/quick/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/X86_MESI_CMP_directory/tests/fast/quick/fs/10.linux-boot/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory +warning: add_child('terminal'): child 'terminal' already has parent +Global frequency set at 1000000000000 ticks per second +info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9.smp +info: Entering event queue @ 0. Starting simulation... +Exiting @ tick 5304689685500 because m5_exit instruction encountered diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt new file mode 100644 index 000000000..58a66b232 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt @@ -0,0 +1,85 @@ + +---------- Begin Simulation Statistics ---------- +sim_seconds 5.304690 # Number of seconds simulated +sim_ticks 5304689685500 # Number of ticks simulated +final_tick 5304689685500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 216507 # Simulator instruction rate (inst/s) +host_op_rate 442292 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 8367043691 # Simulator tick rate (ticks/s) +host_mem_usage 523684 # Number of bytes of host memory used +host_seconds 634.00 # Real time elapsed on the host +sim_insts 137264752 # Number of instructions simulated +sim_ops 280412254 # Number of ops (including micro ops) simulated +system.physmem.bytes_read 1392025556 # Number of bytes read from this memory +system.physmem.bytes_inst_read 1298120352 # Number of instructions bytes read from this memory +system.physmem.bytes_written 70902832 # Number of bytes written to this memory +system.physmem.num_reads 178001662 # Number of read requests responded to by this memory +system.physmem.num_writes 9866514 # Number of write requests responded to by this memory +system.physmem.num_other 0 # Number of other requests responded to by this memory +system.physmem.bw_read 262414135 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read 244711836 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write 13366066 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total 275780201 # Total bandwidth to/from this memory (bytes/s) +system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +system.pc.south_bridge.ide.disks0.dma_read_bytes 32768 # Number of bytes transfered via DMA reads (not PRD). +system.pc.south_bridge.ide.disks0.dma_read_txs 30 # Number of DMA read transactions (not PRD). +system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. +system.pc.south_bridge.ide.disks0.dma_write_bytes 2987008 # Number of bytes transfered via DMA writes. +system.pc.south_bridge.ide.disks0.dma_write_txs 813 # Number of DMA write transactions. +system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). +system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. +system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. +system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. +system.cpu0.numCycles 10608177450 # number of cpu cycles simulated +system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu0.committedInsts 88690468 # Number of instructions committed +system.cpu0.committedOps 187060545 # Number of ops (including micro ops) committed +system.cpu0.num_int_alu_accesses 168469813 # Number of integer alu accesses +system.cpu0.num_fp_alu_accesses 0 # Number of float alu accesses +system.cpu0.num_func_calls 0 # number of times a function call or return occured +system.cpu0.num_conditional_control_insts 17923925 # number of instructions that are conditional controls +system.cpu0.num_int_insts 168469813 # number of integer instructions +system.cpu0.num_fp_insts 0 # number of float instructions +system.cpu0.num_int_register_reads 360430418 # number of times the integer registers were read +system.cpu0.num_int_register_writes 178581746 # number of times the integer registers were written +system.cpu0.num_fp_register_reads 0 # number of times the floating registers were read +system.cpu0.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu0.num_mem_refs 19132508 # number of memory refs +system.cpu0.num_load_insts 14284566 # Number of load instructions +system.cpu0.num_store_insts 4847942 # Number of store instructions +system.cpu0.num_idle_cycles 10086452980.871330 # Number of idle cycles +system.cpu0.num_busy_cycles 521724469.128670 # Number of busy cycles +system.cpu0.not_idle_fraction 0.049181 # Percentage of non-idle cycles +system.cpu0.idle_fraction 0.950819 # Percentage of idle cycles +system.cpu0.kern.inst.arm 0 # number of arm instructions executed +system.cpu0.kern.inst.quiesce 0 # number of quiesce instructions executed +system.cpu1.numCycles 10609379371 # number of cpu cycles simulated +system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started +system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu1.committedInsts 48574284 # Number of instructions committed +system.cpu1.committedOps 93351709 # Number of ops (including micro ops) committed +system.cpu1.num_int_alu_accesses 89110416 # Number of integer alu accesses +system.cpu1.num_fp_alu_accesses 0 # Number of float alu accesses +system.cpu1.num_func_calls 0 # number of times a function call or return occured +system.cpu1.num_conditional_control_insts 8197841 # number of instructions that are conditional controls +system.cpu1.num_int_insts 89110416 # number of integer instructions +system.cpu1.num_fp_insts 0 # number of float instructions +system.cpu1.num_int_register_reads 197924728 # number of times the integer registers were read +system.cpu1.num_int_register_writes 89969833 # number of times the integer registers were written +system.cpu1.num_fp_register_reads 0 # number of times the floating registers were read +system.cpu1.num_fp_register_writes 0 # number of times the floating registers were written +system.cpu1.num_mem_refs 14426742 # number of memory refs +system.cpu1.num_load_insts 9181010 # Number of load instructions +system.cpu1.num_store_insts 5245732 # Number of store instructions +system.cpu1.num_idle_cycles 10273661233.326063 # Number of idle cycles +system.cpu1.num_busy_cycles 335718137.673937 # Number of busy cycles +system.cpu1.not_idle_fraction 0.031644 # Percentage of non-idle cycles +system.cpu1.idle_fraction 0.968356 # Percentage of idle cycles +system.cpu1.kern.inst.arm 0 # number of arm instructions executed +system.cpu1.kern.inst.quiesce 0 # number of quiesce instructions executed + +---------- End Simulation Statistics ---------- diff --git a/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal new file mode 100644 index 000000000..4761ea437 --- /dev/null +++ b/tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal @@ -0,0 +1,136 @@ +Linux version 2.6.22.9 (gblack@fajita) (gcc version 4.1.2 (Gentoo 4.1.2 p1.1)) #12 SMP Fri Feb 27 22:10:33 PST 2009
+Command line: earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
+BIOS-provided physical RAM map:
+ BIOS-e820: 0000000000000000 - 0000000000100000 (reserved)
+ BIOS-e820: 0000000000100000 - 0000000008000000 (usable)
+end_pfn_map = 32768
+kernel direct mapping tables up to 8000000 @ 100000-102000
+DMI 2.5 present.
+Zone PFN ranges:
+ DMA 256 -> 4096
+ DMA32 4096 -> 1048576
+ Normal 1048576 -> 1048576
+early_node_map[1] active PFN ranges
+ 0: 256 -> 32768
+Intel MultiProcessor Specification v1.4
+MPTABLE: OEM ID: MPTABLE: Product ID: MPTABLE: APIC at: 0xFEE00000
+Processor #0 (Bootup-CPU)
+Processor #1
+I/O APIC #2 at 0xFEC00000.
+Setting APIC routing to flat
+Processors: 2
+Allocating PCI resources starting at 10000000 (gap: 8000000:f8000000)
+PERCPU: Allocating 34160 bytes of per cpu data
+Built 1 zonelists. Total pages: 30461
+Kernel command line: earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
+Initializing CPU#0
+PID hash table entries: 512 (order: 9, 4096 bytes)
+Marking TSC unstable due to TSCs unsynchronized
+time.c: Detected 1999.999 MHz processor.
+Console: colour dummy device 80x25
+console handover: boot [earlyser0] -> real [ttyS0]
+Dentry cache hash table entries: 16384 (order: 5, 131072 bytes)
+Inode-cache hash table entries: 8192 (order: 4, 65536 bytes)
+Checking aperture...
+Memory: 121384k/131072k available (3699k kernel code, 8500k reserved, 1767k data, 248k init)
+Calibrating delay loop (skipped)... 3999.96 BogoMIPS preset
+Mount-cache hash table entries: 256
+CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
+CPU: L2 Cache: 1024K (64 bytes/line)
+Freeing SMP alternatives: 34k freed
+Using local APIC timer interrupts.
+result 7812492
+Detected 7.812 MHz APIC timer.
+Booting processor 1/2 APIC 0x1
+Initializing CPU#1
+Calibrating delay loop (skipped)... 3999.96 BogoMIPS preset
+CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
+CPU: L2 Cache: 1024K (64 bytes/line)
+Fake M5 x86_64 CPU stepping 01
+Brought up 2 CPUs
+migration_cost=11
+NET: Registered protocol family 16
+PCI: Using configuration type 1
+SCSI subsystem initialized
+usbcore: registered new interface driver usbfs
+usbcore: registered new interface driver hub
+usbcore: registered new device driver usb
+PCI: Probing PCI hardware
+PCI-GART: No AMD northbridge found.
+NET: Registered protocol family 2
+IP route cache hash table entries: 1024 (order: 1, 8192 bytes)
+TCP established hash table entries: 4096 (order: 4, 98304 bytes)
+TCP bind hash table entries: 4096 (order: 4, 65536 bytes)
+TCP: Hash tables configured (established 4096 bind 4096)
+TCP reno registered
+Total HugeTLB memory allocated, 0
+Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+io scheduler noop registered
+io scheduler deadline registered
+io scheduler cfq registered (default)
+Real Time Clock Driver v1.12ac
+Linux agpgart interface v0.102 (c) Dave Jones
+Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
+serial8250: ttyS0 at I/O 0x3f8 (irq = 4) is a 8250
+floppy0: no floppy controllers found
+RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
+loop: module loaded
+Intel(R) PRO/1000 Network Driver - version 7.3.20-k2
+Copyright (c) 1999-2006 Intel Corporation.
+e100: Intel(R) PRO/100 Network Driver, 3.5.17-k4-NAPI
+e100: Copyright(c) 1999-2006 Intel Corporation
+forcedeth.c: Reverse Engineered nForce ethernet driver. Version 0.60.
+tun: Universal TUN/TAP device driver, 1.6
+tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
+netconsole: not configured, aborting
+Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
+ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
+PIIX4: IDE controller at PCI slot 0000:00:04.0
+PCI: Enabling device 0000:00:04.0 (0000 -> 0001)
+PIIX4: chipset revision 0
+PIIX4: not 100% native mode: will probe irqs later
+ ide0: BM-DMA at 0x1000-0x1007, BIOS settings: hda:DMA, hdb:DMA
+ ide1: BM-DMA at 0x1008-0x100f, BIOS settings: hdc:DMA, hdd:DMA
+hda: M5 IDE Disk, ATA DISK drive
+hdb: M5 IDE Disk, ATA DISK drive
+ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
+hda: max request size: 128KiB
+hda: 1048320 sectors (536 MB), CHS=1040/16/63, UDMA(33)
+ hda: hda1
+hdb: max request size: 128KiB
+hdb: 4177920 sectors (2139 MB), CHS=4144/16/63, UDMA(33)
+ hdb: unknown partition table
+megaraid cmm: 2.20.2.7 (Release Date: Sun Jul 16 00:01:03 EST 2006)
+megaraid: 2.20.5.1 (Release Date: Thu Nov 16 15:32:35 EST 2006)
+megasas: 00.00.03.10-rc5 Thu May 17 10:09:32 PDT 2007
+Fusion MPT base driver 3.04.04
+Copyright (c) 1999-2007 LSI Logic Corporation
+Fusion MPT SPI Host driver 3.04.04
+Fusion MPT SAS Host driver 3.04.04
+ieee1394: raw1394: /dev/raw1394 device initialized
+USB Universal Host Controller Interface driver v3.0
+usbcore: registered new interface driver usblp
+drivers/usb/class/usblp.c: v0.13: USB Printer Device Class driver
+Initializing USB Mass Storage driver...
+usbcore: registered new interface driver usb-storage
+USB Mass Storage support registered.
+serio: i8042 KBD port at 0x60,0x64 irq 1
+serio: i8042 AUX port at 0x60,0x64 irq 12
+mice: PS/2 mouse device common for all mice
+input: AT Translated Set 2 keyboard as /class/input/input0
+device-mapper: ioctl: 4.11.0-ioctl (2006-10-12) initialised: dm-devel@redhat.com
+usbcore: registered new interface driver usbhid
+drivers/hid/usbhid/hid-core.c: v2.6:USB HID core driver
+oprofile: using timer interrupt.
+TCP cubic registered
+NET: Registered protocol family 1
+NET: Registered protocol family 10
+IPv6 over IPv4 tunneling driver
+NET: Registered protocol family 17
+input: PS/2 Generic Mouse as /class/input/input1
+EXT2-fs warning: mounting unchecked fs, running e2fsck is recommended
+VFS: Mounted root (ext2 filesystem).
+Freeing unused kernel memory: 248k freed
+
INIT: version 2.86 booting
+mounting filesystems...
+loading script...
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