stats: Update the stats to reflect bus and memory changes

This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.

1 files changed, 41 insertions, 5 deletions

diff --git a/tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt
index 226830c92..860c680b8 100644
--- a/tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  2.061066                       # Nu
 sim_ticks                                2061066313000                       # Number of ticks simulated
 final_tick                               2061066313000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1083437                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1086658                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1503618533                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 281644                       # Number of bytes of host memory used
-host_seconds                                  1370.74                       # Real time elapsed on the host
+host_inst_rate                                 684045                       # Simulator instruction rate (inst/s)
+host_op_rate                                   686079                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              949333559                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 233488                       # Number of bytes of host memory used
+host_seconds                                  2171.07                       # Real time elapsed on the host
 sim_insts                                  1485108088                       # Number of instructions simulated
 sim_ops                                    1489523282                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             65216                       # Number of bytes read from this memory
@@ -34,6 +34,22 @@ system.physmem.bw_total::writebacks             78189                       # To
 system.physmem.bw_total::cpu.inst               31642                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data              811479                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total                 921310                       # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput                       921310                       # Throughput (bytes/s)
+system.membus.trans_dist::ReadReq                5293                       # Transaction distribution
+system.membus.trans_dist::ReadResp               5293                       # Transaction distribution
+system.membus.trans_dist::Writeback              2518                       # Transaction distribution
+system.membus.trans_dist::ReadExReq             21859                       # Transaction distribution
+system.membus.trans_dist::ReadExResp            21859                       # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side        56822                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count                         56822                       # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side      1898880                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size                    1898880                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.data_through_bus                1898880                       # Total data (bytes)
+system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
+system.membus.reqLayer0.occupancy            49814000                       # Layer occupancy (ticks)
+system.membus.reqLayer0.utilization               0.0                       # Layer utilization (%)
+system.membus.respLayer1.occupancy          244368000                       # Layer occupancy (ticks)
+system.membus.respLayer1.utilization              0.0                       # Layer utilization (%)
 system.cpu.workload.num_syscalls                   49                       # Number of system calls
 system.cpu.numCycles                       4122132626                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
@@ -393,5 +409,25 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::total 13421.690416
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 13421.690416                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 13421.690416                       # average overall mshr miss latency
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
+system.cpu.toL2Bus.throughput                27625902                       # Throughput (bytes/s)
+system.cpu.toL2Bus.trans_dist::ReadReq         194593                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp        194593                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::Writeback       435341                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq       259735                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp       259735                       # Transaction distribution
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side         2214                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side      1341783                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count                  1343997                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side        70848                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side     56867968                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size              56938816                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.data_through_bus          56938816                       # Total data (bytes)
+system.cpu.toL2Bus.snoop_data_through_bus            0                       # Total snoop data (bytes)
+system.cpu.toL2Bus.reqLayer0.occupancy      880175500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.reqLayer0.utilization          0.0                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer0.occupancy       1660500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer1.occupancy     679831500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.utilization          0.0                       # Layer utilization (%)
 
 ---------- End Simulation Statistics   ----------