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author | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-11 09:34:40 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2012-09-11 09:34:40 -0500 |
commit | fe5deb4a22260b3e67839fb1efa978cff51e79ba (patch) | |
tree | d8768dfdaccd6beed5a95fa2b3d305b9f018d7e9 /tests/long/se/00.gzip/ref/x86/linux/simple-timing | |
parent | f47c2f64156ee031c481af8d1516ada9d19da775 (diff) | |
download | gem5-fe5deb4a22260b3e67839fb1efa978cff51e79ba.tar.xz |
x86 Regressions: Update stats due to register predication
Diffstat (limited to 'tests/long/se/00.gzip/ref/x86/linux/simple-timing')
3 files changed, 22 insertions, 13 deletions
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini index 05ff130e5..fe83ea738 100644 --- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini +++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini @@ -10,6 +10,7 @@ time_sync_spin_threshold=100000000 type=System children=cpu membus physmem boot_osflags=a +clock=1 init_param=0 kernel= load_addr_mask=1099511627775 @@ -47,7 +48,6 @@ max_insts_any_thread=0 max_loads_all_threads=0 max_loads_any_thread=0 numThreads=1 -phase=0 profile=0 progress_interval=0 system=system @@ -61,6 +61,7 @@ type=BaseCache addr_ranges=0:18446744073709551615 assoc=2 block_size=64 +clock=1 forward_snoops=true hash_delay=1 is_top_level=true @@ -89,6 +90,7 @@ walker=system.cpu.dtb.walker [system.cpu.dtb.walker] type=X86PagetableWalker +clock=1 system=system port=system.cpu.toL2Bus.slave[3] @@ -97,6 +99,7 @@ type=BaseCache addr_ranges=0:18446744073709551615 assoc=2 block_size=64 +clock=1 forward_snoops=true hash_delay=1 is_top_level=true @@ -119,9 +122,10 @@ mem_side=system.cpu.toL2Bus.slave[0] [system.cpu.interrupts] type=X86LocalApic +clock=1 int_latency=1000 pio_addr=2305843009213693952 -pio_latency=1000 +pio_latency=100000 system=system int_master=system.membus.slave[2] int_slave=system.membus.master[2] @@ -135,6 +139,7 @@ walker=system.cpu.itb.walker [system.cpu.itb.walker] type=X86PagetableWalker +clock=1 system=system port=system.cpu.toL2Bus.slave[2] @@ -143,6 +148,7 @@ type=BaseCache addr_ranges=0:18446744073709551615 assoc=2 block_size=64 +clock=1 forward_snoops=true hash_delay=1 is_top_level=false @@ -184,7 +190,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/x86/linux/gzip +executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/gzip gid=100 input=cin max_stack_size=67108864 @@ -207,6 +213,7 @@ slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_m [system.physmem] type=SimpleMemory +clock=1 conf_table_reported=false file= in_addr_map=true diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout index 371c8d53f..02ca976d3 100755 --- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout +++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout @@ -1,9 +1,11 @@ +Redirecting stdout to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing/simout +Redirecting stderr to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 13 2012 17:08:22 -gem5 started Aug 13 2012 18:30:12 -gem5 executing on zizzer +gem5 compiled Sep 10 2012 22:29:00 +gem5 started Sep 10 2012 22:43:43 +gem5 executing on ribera.cs.wisc.edu command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt index 12b9ffa30..045a8ad7b 100644 --- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.801980 # Nu sim_ticks 1801979679000 # Number of ticks simulated final_tick 1801979679000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 670221 # Simulator instruction rate (inst/s) -host_op_rate 1234919 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1372375195 # Simulator tick rate (ticks/s) -host_mem_usage 233400 # Number of bytes of host memory used -host_seconds 1313.04 # Real time elapsed on the host +host_inst_rate 528145 # Simulator instruction rate (inst/s) +host_op_rate 973136 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1081454463 # Simulator tick rate (ticks/s) +host_mem_usage 274856 # Number of bytes of host memory used +host_seconds 1666.26 # Real time elapsed on the host sim_insts 880025278 # Number of instructions simulated sim_ops 1621493926 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 46208 # Number of bytes read from this memory @@ -46,8 +46,8 @@ system.cpu.num_func_calls 0 # nu system.cpu.num_conditional_control_insts 99478856 # number of instructions that are conditional controls system.cpu.num_int_insts 1621354436 # number of integer instructions system.cpu.num_fp_insts 0 # number of float instructions -system.cpu.num_int_register_reads 5129483910 # number of times the integer registers were read -system.cpu.num_int_register_writes 2493860878 # number of times the integer registers were written +system.cpu.num_int_register_reads 4204103507 # number of times the integer registers were read +system.cpu.num_int_register_writes 1886895257 # number of times the integer registers were written system.cpu.num_fp_register_reads 0 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written system.cpu.num_mem_refs 607228178 # number of memory refs |