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authorGabe Black <gblack@eecs.umich.edu>2012-06-04 10:43:11 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-06-04 10:43:11 -0700
commit6437f3f4ee5275f59a4472d95e0abac1a8b82e22 (patch)
treed713965271b0329bca3d4496e491e1d456946dc2 /tests/long/se/00.gzip/ref/x86
parent35fa5074aa256880f70591eb656dceeb1a7feae0 (diff)
downloadgem5-6437f3f4ee5275f59a4472d95e0abac1a8b82e22.tar.xz
X86: Update stats for the CPUID change.
Diffstat (limited to 'tests/long/se/00.gzip/ref/x86')
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini8
-rwxr-xr-xtests/long/se/00.gzip/ref/x86/linux/o3-timing/simout8
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt26
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini5
-rwxr-xr-xtests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout8
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt12
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini8
-rwxr-xr-xtests/long/se/00.gzip/ref/x86/linux/simple-timing/simout8
-rw-r--r--tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt12
9 files changed, 42 insertions, 53 deletions
diff --git a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini
index c9c059053..54d39141c 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini
+++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini
@@ -495,9 +495,8 @@ cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
-type=Bus
+type=CoherentBus
block_size=64
-bus_id=0
clock=1000
header_cycles=1
use_default_range=false
@@ -516,7 +515,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/gzip
+executable=/dist/m5/cpu2000/binaries/x86/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -528,9 +527,8 @@ system=system
uid=100
[system.membus]
-type=Bus
+type=CoherentBus
block_size=64
-bus_id=0
clock=1000
header_cycles=1
use_default_range=false
diff --git a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout
index c90f0d12f..7b2a9ad59 100755
--- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout
+++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing/simout
-Redirecting stderr to build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 21 2012 19:00:49
-gem5 started May 21 2012 19:00:58
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jun 3 2012 13:30:44
+gem5 started Jun 3 2012 13:30:59
+gem5 executing on burrito
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing -re tests/run.py build/X86/tests/opt/long/se/00.gzip/x86/linux/o3-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt
index cda4c39ac..639bcc189 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt
+++ b/tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.636988 # Nu
sim_ticks 636988382500 # Number of ticks simulated
final_tick 636988382500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 47331 # Simulator instruction rate (inst/s)
-host_op_rate 87209 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 34259348 # Simulator tick rate (ticks/s)
-host_mem_usage 276376 # Number of bytes of host memory used
-host_seconds 18593.13 # Real time elapsed on the host
+host_inst_rate 71818 # Simulator instruction rate (inst/s)
+host_op_rate 132329 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 51984066 # Simulator tick rate (ticks/s)
+host_mem_usage 250428 # Number of bytes of host memory used
+host_seconds 12253.53 # Real time elapsed on the host
sim_insts 880025312 # Number of instructions simulated
sim_ops 1621493982 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 5834048 # Number of bytes read from this memory
@@ -81,8 +81,8 @@ system.cpu.rename.IQFullEvents 293326885 # Nu
system.cpu.rename.LSQFullEvents 103161675 # Number of times rename has blocked due to LSQ full
system.cpu.rename.FullRegisterEvents 640 # Number of times there has been no free registers
system.cpu.rename.RenamedOperands 3463149697 # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups 7120628186 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 7120621006 # Number of integer rename lookups
+system.cpu.rename.RenameLookups 7120628194 # Number of register rename lookups that rename has made
+system.cpu.rename.int_rename_lookups 7120621014 # Number of integer rename lookups
system.cpu.rename.fp_rename_lookups 7180 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 2493860970 # Number of HB maps that are committed
system.cpu.rename.UndoneMaps 969288727 # Number of HB maps that are undone due to squashing
@@ -104,10 +104,10 @@ system.cpu.iq.issued_per_cycle::samples 1273914012 # Nu
system.cpu.iq.issued_per_cycle::mean 1.401645 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::stdev 1.311838 # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::underflows 0 0.00% 0.00% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::0 347011243 27.24% 27.24% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::1 447440187 35.12% 62.36% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::2 243114047 19.08% 81.45% # Number of insts issued each cycle
-system.cpu.iq.issued_per_cycle::3 151317630 11.88% 93.33% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::0 347011244 27.24% 27.24% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::1 447440186 35.12% 62.36% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::2 243114046 19.08% 81.45% # Number of insts issued each cycle
+system.cpu.iq.issued_per_cycle::3 151317631 11.88% 93.33% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::4 40944695 3.21% 96.54% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::5 32410749 2.54% 99.08% # Number of insts issued each cycle
system.cpu.iq.issued_per_cycle::6 9957171 0.78% 99.87% # Number of insts issued each cycle
@@ -234,7 +234,7 @@ system.cpu.iew.exec_rate 1.387458 # In
system.cpu.iew.wb_sent 1728148485 # cumulative count of insts sent to commit
system.cpu.iew.wb_count 1726806355 # cumulative count of insts written-back
system.cpu.iew.wb_producers 1262041827 # num instructions producing a value
-system.cpu.iew.wb_consumers 2984894242 # num instructions consuming a value
+system.cpu.iew.wb_consumers 2984894243 # num instructions consuming a value
system.cpu.iew.wb_penalized 0 # number of instrctions required to write to 'other' IQ
system.cpu.iew.wb_rate 1.355446 # insts written-back per cycle
system.cpu.iew.wb_fanout 0.422810 # average fanout of values written-back
@@ -284,7 +284,7 @@ system.cpu.cpi 1.447659 # CP
system.cpu.cpi_total 1.447659 # CPI: Total CPI of All Threads
system.cpu.ipc 0.690770 # IPC: Instructions Per Cycle
system.cpu.ipc_total 0.690770 # IPC: Total IPC of All Threads
-system.cpu.int_regfile_reads 4473469244 # number of integer regfile reads
+system.cpu.int_regfile_reads 4473469252 # number of integer regfile reads
system.cpu.int_regfile_writes 2589680881 # number of integer regfile writes
system.cpu.fp_regfile_reads 84 # number of floating regfile reads
system.cpu.misc_regfile_reads 911429698 # number of misc regfile reads
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini
index d68307ad3..6c78f711c 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini
@@ -103,7 +103,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/gzip
+executable=/dist/m5/cpu2000/binaries/x86/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -115,9 +115,8 @@ system=system
uid=100
[system.membus]
-type=Bus
+type=CoherentBus
block_size=64
-bus_id=0
clock=1000
header_cycles=1
use_default_range=false
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout
index dc2715495..87bcc8171 100755
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-atomic/simout
-Redirecting stderr to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-atomic/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 21 2012 19:00:49
-gem5 started May 21 2012 19:03:31
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jun 3 2012 13:30:44
+gem5 started Jun 3 2012 13:30:58
+gem5 executing on burrito
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-atomic -re tests/run.py build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-atomic
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt
index 8ef9855df..14740711a 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.963993 # Nu
sim_ticks 963992704000 # Number of ticks simulated
final_tick 963992704000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 650115 # Simulator instruction rate (inst/s)
-host_op_rate 1197871 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 712145069 # Simulator tick rate (ticks/s)
-host_mem_usage 265536 # Number of bytes of host memory used
-host_seconds 1353.65 # Real time elapsed on the host
+host_inst_rate 688761 # Simulator instruction rate (inst/s)
+host_op_rate 1269079 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 754478822 # Simulator tick rate (ticks/s)
+host_mem_usage 239576 # Number of bytes of host memory used
+host_seconds 1277.69 # Real time elapsed on the host
sim_insts 880025313 # Number of instructions simulated
sim_ops 1621493983 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 11334586825 # Number of bytes read from this memory
@@ -33,7 +33,7 @@ system.cpu.num_func_calls 0 # nu
system.cpu.num_conditional_control_insts 99478861 # number of instructions that are conditional controls
system.cpu.num_int_insts 1621354493 # number of integer instructions
system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 5129484084 # number of times the integer registers were read
+system.cpu.num_int_register_reads 5129484088 # number of times the integer registers were read
system.cpu.num_int_register_writes 2493860970 # number of times the integer registers were written
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini
index 041723c3f..30e9071fd 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini
@@ -164,9 +164,8 @@ cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
-type=Bus
+type=CoherentBus
block_size=64
-bus_id=0
clock=1000
header_cycles=1
use_default_range=false
@@ -185,7 +184,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/gzip
+executable=/dist/m5/cpu2000/binaries/x86/linux/gzip
gid=100
input=cin
max_stack_size=67108864
@@ -197,9 +196,8 @@ system=system
uid=100
[system.membus]
-type=Bus
+type=CoherentBus
block_size=64
-bus_id=0
clock=1000
header_cycles=1
use_default_range=false
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout
index 0fb9c1553..9ebad8844 100755
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout
@@ -1,11 +1,9 @@
-Redirecting stdout to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing/simout
-Redirecting stderr to build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 21 2012 19:00:49
-gem5 started May 21 2012 19:00:59
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jun 3 2012 13:30:44
+gem5 started Jun 3 2012 13:30:59
+gem5 executing on burrito
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/00.gzip/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt
index a3fe13db1..4294088ef 100644
--- a/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 1.803259 # Nu
sim_ticks 1803258587000 # Number of ticks simulated
final_tick 1803258587000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 373686 # Simulator instruction rate (inst/s)
-host_op_rate 688537 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 765720435 # Simulator tick rate (ticks/s)
-host_mem_usage 274452 # Number of bytes of host memory used
-host_seconds 2354.98 # Real time elapsed on the host
+host_inst_rate 617600 # Simulator instruction rate (inst/s)
+host_op_rate 1137962 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1265523884 # Simulator tick rate (ticks/s)
+host_mem_usage 248496 # Number of bytes of host memory used
+host_seconds 1424.91 # Real time elapsed on the host
sim_insts 880025313 # Number of instructions simulated
sim_ops 1621493983 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 5725952 # Number of bytes read from this memory
@@ -33,7 +33,7 @@ system.cpu.num_func_calls 0 # nu
system.cpu.num_conditional_control_insts 99478861 # number of instructions that are conditional controls
system.cpu.num_int_insts 1621354493 # number of integer instructions
system.cpu.num_fp_insts 0 # number of float instructions
-system.cpu.num_int_register_reads 5129484084 # number of times the integer registers were read
+system.cpu.num_int_register_reads 5129484088 # number of times the integer registers were read
system.cpu.num_int_register_writes 2493860970 # number of times the integer registers were written
system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
system.cpu.num_fp_register_writes 0 # number of times the floating registers were written