diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/se/10.mcf/ref/arm/linux | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/se/10.mcf/ref/arm/linux')
-rw-r--r-- | tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini | 1 | ||||
-rwxr-xr-x | tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout | 6 | ||||
-rw-r--r-- | tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt | 14 |
3 files changed, 10 insertions, 11 deletions
diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini index 108881308..e070ad588 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout index 9be633e93..f7ab26f15 100755 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout @@ -1,10 +1,8 @@ -Redirecting stdout to build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing/simout -Redirecting stderr to build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 08:20:51 +gem5 compiled Oct 16 2013 01:36:42 +gem5 started Oct 16 2013 01:59:02 gem5 executing on zizzer command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/10.mcf/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt index 14bb680f9..5d8366912 100644 --- a/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.026877 # Nu sim_ticks 26877484000 # Number of ticks simulated final_tick 26877484000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 190344 # Simulator instruction rate (inst/s) -host_op_rate 191711 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 56473959 # Simulator tick rate (ticks/s) -host_mem_usage 375760 # Number of bytes of host memory used -host_seconds 475.93 # Real time elapsed on the host +host_inst_rate 158705 # Simulator instruction rate (inst/s) +host_op_rate 159844 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 47086787 # Simulator tick rate (ticks/s) +host_mem_usage 380172 # Number of bytes of host memory used +host_seconds 570.81 # Real time elapsed on the host sim_insts 90589798 # Number of instructions simulated sim_ops 91240351 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 44928 # Number of bytes read from this memory @@ -333,8 +333,8 @@ system.cpu.rename.LSQFullEvents 4597767 # Nu system.cpu.rename.FullRegisterEvents 1304 # Number of times there has been no free registers system.cpu.rename.RenamedOperands 143579240 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 536319966 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 536314240 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 5726 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 499912232 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 925 # Number of floating rename lookups system.cpu.rename.CommittedMaps 107414186 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 36165054 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 4615 # count of serializing insts renamed |