diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2014-05-09 18:58:50 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-05-09 18:58:50 -0400 |
commit | 57e5401d954d46fea45ca3eaafa8ae655659da39 (patch) | |
tree | 7108ae4d529338b13daa49308c85bb7a680f7b58 /tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt | |
parent | aa329f4757639820f921bf4152c21e79da74c034 (diff) | |
download | gem5-57e5401d954d46fea45ca3eaafa8ae655659da39.tar.xz |
stats: Bump stats for the fixes, and mostly DRAM controller changes
Diffstat (limited to 'tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt')
-rw-r--r-- | tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt | 45 |
1 files changed, 40 insertions, 5 deletions
diff --git a/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt b/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt index 04e67f508..49ab3ae18 100644 --- a/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt +++ b/tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.122216 # Nu sim_ticks 122215823500 # Number of ticks simulated final_tick 122215823500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 3086610 # Simulator instruction rate (inst/s) -host_op_rate 3086737 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1547143112 # Simulator tick rate (ticks/s) -host_mem_usage 361240 # Number of bytes of host memory used -host_seconds 78.99 # Real time elapsed on the host +host_inst_rate 2362566 # Simulator instruction rate (inst/s) +host_op_rate 2362664 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1184221154 # Simulator tick rate (ticks/s) +host_mem_usage 397240 # Number of bytes of host memory used +host_seconds 103.20 # Real time elapsed on the host sim_insts 243825150 # Number of instructions simulated sim_ops 243835265 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts @@ -65,5 +65,40 @@ system.cpu.num_busy_cycles 244431648 # Nu system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 29302884 # Number of branches fetched +system.cpu.op_class::No_OpClass 28877736 11.81% 11.81% # Class of executed instruction +system.cpu.op_class::IntAlu 109842388 44.94% 56.75% # Class of executed instruction +system.cpu.op_class::IntMult 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::IntDiv 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatAdd 42 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatCmp 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatCvt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatMult 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatDiv 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::FloatSqrt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdAdd 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdAddAcc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdAlu 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdCmp 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdCvt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdMisc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdMult 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdMultAcc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdShift 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdShiftAcc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdSqrt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatAdd 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatAlu 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatCmp 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatCvt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatDiv 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatMisc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatMult 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatMultAcc 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::SimdFloatSqrt 0 0.00% 56.75% # Class of executed instruction +system.cpu.op_class::MemRead 82803527 33.88% 90.63% # Class of executed instruction +system.cpu.op_class::MemWrite 22907920 9.37% 100.00% # Class of executed instruction +system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +system.cpu.op_class::total 244431613 # Class of executed instruction ---------- End Simulation Statistics ---------- |