stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee

1 files changed, 16 insertions, 5 deletions

diff --git a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt
index 95463debe..b73adbdfb 100644
--- a/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt
+++ b/tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.361598                       # Nu
 sim_ticks                                361597758500                       # Number of ticks simulated
 final_tick                               361597758500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 779266                       # Simulator instruction rate (inst/s)
-host_op_rate                                   779298                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             1155667536                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 379236                       # Number of bytes of host memory used
-host_seconds                                   312.89                       # Real time elapsed on the host
+host_inst_rate                                1652209                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1652277                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             2450259534                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 427260                       # Number of bytes of host memory used
+host_seconds                                   147.58                       # Real time elapsed on the host
 sim_insts                                   243825150                       # Number of instructions simulated
 sim_ops                                     243835265                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst             56256                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data            942336                       # Number of bytes read from this memory
 system.physmem.bytes_read::total               998592                       # Number of bytes read from this memory
@@ -29,8 +30,10 @@ system.physmem.bw_inst_read::total             155576                       # In
 system.physmem.bw_total::cpu.inst              155576                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data             2606034                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total                2761610                       # Total bandwidth to/from this memory (bytes/s)
+system.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.workload.num_syscalls                  443                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON    361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                        723195517                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -89,6 +92,7 @@ system.cpu.op_class::MemWrite                22907920      9.37%    100.00% # Cl
 system.cpu.op_class::IprAccess                      0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::InstPrefetch                   0      0.00%    100.00% # Class of executed instruction
 system.cpu.op_class::total                  244431613                       # Class of executed instruction
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.tags.replacements            935475                       # number of replacements
 system.cpu.dcache.tags.tagsinuse          3562.412338                       # Cycle average of tags in use
 system.cpu.dcache.tags.total_refs           104186699                       # Total number of references to valid blocks.
@@ -106,6 +110,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::3           46
 system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
 system.cpu.dcache.tags.tag_accesses         211192111                       # Number of tag accesses
 system.cpu.dcache.tags.data_accesses        211192111                       # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.ReadReq_hits::cpu.data     81327576                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        81327576                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data     22855241                       # number of WriteReq hits
@@ -214,6 +219,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 12767.830288
 system.cpu.dcache.demand_avg_mshr_miss_latency::total 12767.830288                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 12767.830288                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 12767.830288                       # average overall mshr miss latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.tags.replacements                25                       # number of replacements
 system.cpu.icache.tags.tagsinuse           725.404879                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs           244420617                       # Total number of references to valid blocks.
@@ -231,6 +237,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::4          781
 system.cpu.icache.tags.occ_task_id_percent::1024     0.418457                       # Percentage of cache occupancy per task id
 system.cpu.icache.tags.tag_accesses         488843880                       # Number of tag accesses
 system.cpu.icache.tags.data_accesses        488843880                       # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.ReadReq_hits::cpu.inst    244420617                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total       244420617                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst     244420617                       # number of demand (read+write) hits
@@ -299,6 +306,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 60840.702948
 system.cpu.icache.demand_avg_mshr_miss_latency::total 60840.702948                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 60840.702948                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 60840.702948                       # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.tags.replacements                0                       # number of replacements
 system.cpu.l2cache.tags.tagsinuse         9729.320449                       # Cycle average of tags in use
 system.cpu.l2cache.tags.total_refs            1813523                       # Total number of references to valid blocks.
@@ -321,6 +329,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::4        13986
 system.cpu.l2cache.tags.occ_task_id_percent::1024     0.475647                       # Percentage of cache occupancy per task id
 system.cpu.l2cache.tags.tag_accesses         15069916                       # Number of tag accesses
 system.cpu.l2cache.tags.data_accesses        15069916                       # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.WritebackDirty_hits::writebacks       935266                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackDirty_hits::total       935266                       # number of WritebackDirty hits
 system.cpu.l2cache.WritebackClean_hits::writebacks           25                       # number of WritebackClean hits
@@ -461,6 +470,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests            1
 system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
 system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.cpu.toL2Bus.trans_dist::ReadResp        893739                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackDirty       935266                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::WritebackClean           25                       # Transaction distribution
@@ -493,6 +503,7 @@ system.cpu.toL2Bus.respLayer0.occupancy       1323000                       # La
 system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy    1409356500                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          0.4                       # Layer utilization (%)
+system.membus.pwrStateResidencyTicks::UNDEFINED 361597758500                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadResp               1036                       # Transaction distribution
 system.membus.trans_dist::ReadExReq             14567                       # Transaction distribution
 system.membus.trans_dist::ReadExResp            14567                       # Transaction distribution