stats: Update the stats to reflect bus and memory changes

This patch updates the stats to reflect the addition of the bus stats,
and changes to the bus layers. In addition it updates the stats to
match the addition of the static pipeline latency of the memory
conotroller and the addition of a stat tracking the bytes per
activate.

1 files changed, 40 insertions, 0 deletions

diff --git a/tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt
index f8e97e7f1..c0ade68d4 100644
--- a/tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt
+++ b/tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt
@@ -34,6 +34,26 @@ system.physmem.bw_total::writebacks             17487                       # To
 system.physmem.bw_total::cpu.inst              140419                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data             5114207                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total                5272114                       # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput                      5272114                       # Throughput (bytes/s)
+system.membus.trans_dist::ReadReq                1025                       # Transaction distribution
+system.membus.trans_dist::ReadResp               1025                       # Transaction distribution
+system.membus.trans_dist::Writeback               100                       # Transaction distribution
+system.membus.trans_dist::ReadExReq             29024                       # Transaction distribution
+system.membus.trans_dist::ReadExResp            29024                       # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port        60198                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total        60198                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::system.physmem.port        60198                       # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total                  60198                       # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port      1929536                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total      1929536                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::system.physmem.port      1929536                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total             1929536                       # Cumulative packet size per connected master and slave (bytes)
+system.membus.data_through_bus                1929536                       # Total data (bytes)
+system.membus.snoop_data_through_bus                0                       # Total snoop data (bytes)
+system.membus.reqLayer0.occupancy            30980000                       # Layer occupancy (ticks)
+system.membus.reqLayer0.utilization               0.0                       # Layer utilization (%)
+system.membus.respLayer1.occupancy          270472000                       # Layer occupancy (ticks)
+system.membus.respLayer1.utilization              0.1                       # Layer utilization (%)
 system.cpu.workload.num_syscalls                  444                       # Number of system calls
 system.cpu.numCycles                        731978130                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
@@ -373,5 +393,25 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::total 11594.322510
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 11594.322510                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 11594.322510                       # average overall mshr miss latency
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
+system.cpu.toL2Bus.throughput               722228529                       # Throughput (bytes/s)
+system.cpu.toL2Bus.trans_dist::ReadReq        1961528                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp       1961528                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::Writeback      2062484                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq       106109                       # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp       106109                       # Transaction distribution
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side         1616                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side      6196142                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count                  6197758                       # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side        51712                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side    264276032                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size             264327744                       # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.data_through_bus         264327744                       # Total data (bytes)
+system.cpu.toL2Bus.snoop_data_through_bus            0                       # Total snoop data (bytes)
+system.cpu.toL2Bus.reqLayer0.occupancy     4127544500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.reqLayer0.utilization          1.1                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer0.occupancy       1212000                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.utilization          0.0                       # Layer utilization (%)
+system.cpu.toL2Bus.respLayer1.occupancy    3100243500                       # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.utilization          0.8                       # Layer utilization (%)
 
 ---------- End Simulation Statistics   ----------