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author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-15 08:14:09 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-15 08:14:09 -0500 |
commit | 0d6a6dfd7b500aff7e91a22c9bb7211e1807b90e (patch) | |
tree | 45d559d0511bdca749a08a2f42eeafdcf25739cf /tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini | |
parent | 3de9def6c1ad38d6a5068b07512cbefffafcb758 (diff) | |
download | gem5-0d6a6dfd7b500aff7e91a22c9bb7211e1807b90e.tar.xz |
stats: updates due to recent changesets including d0934b57735a
Diffstat (limited to 'tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini')
-rw-r--r-- | tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini index 0b92236c6..bc3661e7a 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini @@ -80,7 +80,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=2 @@ -156,7 +156,7 @@ sys=system port=system.cpu.toL2Bus.slave[3] [system.cpu.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=2 @@ -266,7 +266,7 @@ sys=system port=system.cpu.toL2Bus.slave[2] [system.cpu.l2cache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 |