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authorAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2013-08-19 03:52:36 -0400
commitb63631536d974f31cf99ee280271dc0f7b4c746f (patch)
treeff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt
parent646c4a23ca44aab5468c896034288151c89be782 (diff)
downloadgem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the internal queue in SimpleMemory, 2) moving of the memory class outside FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying burst size and interface width for the DRAM instead of relying on cache-line size, 5) performing merging in the DRAM controller write buffer, and 6) fixing how idle cycles are counted in the atomic and timing CPU models. The main reason for bundling them up is to minimise the changeset size.
Diffstat (limited to 'tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt')
-rw-r--r--tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt84
1 files changed, 42 insertions, 42 deletions
diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt
index b28088e7d..3138d4062 100644
--- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt
+++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.717366 # Nu
sim_ticks 717366012000 # Number of ticks simulated
final_tick 717366012000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 611042 # Simulator instruction rate (inst/s)
-host_op_rate 688541 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 868024183 # Simulator tick rate (ticks/s)
-host_mem_usage 246240 # Number of bytes of host memory used
-host_seconds 826.44 # Real time elapsed on the host
+host_inst_rate 1130634 # Simulator instruction rate (inst/s)
+host_op_rate 1274033 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1606137434 # Simulator tick rate (ticks/s)
+host_mem_usage 243872 # Number of bytes of host memory used
+host_seconds 446.64 # Real time elapsed on the host
sim_insts 504986853 # Number of instructions simulated
sim_ops 569034839 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 177280 # Number of bytes read from this memory
@@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 41855 # Tr
system.membus.trans_dist::Writeback 95953 # Transaction distribution
system.membus.trans_dist::ReadExReq 100794 # Transaction distribution
system.membus.trans_dist::ReadExResp 100794 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side 381251 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count 381251 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15270528 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size 15270528 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 381251 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 381251 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15270528 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size::total 15270528 # Cumulative packet size per connected master and slave (bytes)
system.membus.data_through_bus 15270528 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.membus.reqLayer0.occupancy 1006226000 # Layer occupancy (ticks)
@@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu
system.cpu.num_busy_cycles 1434732024 # Number of busy cycles
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
system.cpu.idle_fraction 0 # Percentage of idle cycles
-system.cpu.icache.tags.replacements 9788 # number of replacements
-system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 11521 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 44839.845066 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 982.663229 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.479816 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.479816 # Average percentage of cache occupancy
+system.cpu.icache.tags.replacements 9788 # number of replacements
+system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 11521 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 44839.845066 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 982.663229 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.479816 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.479816 # Average percentage of cache occupancy
system.cpu.icache.ReadReq_hits::cpu.inst 516599855 # number of ReadReq hits
system.cpu.icache.ReadReq_hits::total 516599855 # number of ReadReq hits
system.cpu.icache.demand_hits::cpu.inst 516599855 # number of demand (read+write) hits
@@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 21105.199201
system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 21105.199201 # average overall mshr miss latency
system.cpu.icache.overall_avg_mshr_miss_latency::total 21105.199201 # average overall mshr miss latency
system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.l2cache.tags.replacements 109895 # number of replacements
-system.cpu.l2cache.tags.tagsinuse 27243.192324 # Cycle average of tags in use
-system.cpu.l2cache.tags.total_refs 1668833 # Total number of references to valid blocks.
-system.cpu.l2cache.tags.sampled_refs 141072 # Sample count of references to valid blocks.
-system.cpu.l2cache.tags.avg_refs 11.829654 # Average number of references to valid blocks.
-system.cpu.l2cache.tags.warmup_cycle 343698539000 # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.tags.replacements 109895 # number of replacements
+system.cpu.l2cache.tags.tagsinuse 27243.192324 # Cycle average of tags in use
+system.cpu.l2cache.tags.total_refs 1668833 # Total number of references to valid blocks.
+system.cpu.l2cache.tags.sampled_refs 141072 # Sample count of references to valid blocks.
+system.cpu.l2cache.tags.avg_refs 11.829654 # Average number of references to valid blocks.
+system.cpu.l2cache.tags.warmup_cycle 343698539000 # Cycle when the warmup percentage was hit.
system.cpu.l2cache.tags.occ_blocks::writebacks 23381.854289 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.inst 287.865470 # Average occupied blocks per requestor
-system.cpu.l2cache.tags.occ_blocks::cpu.data 3573.472565 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.inst 287.865470 # Average occupied blocks per requestor
+system.cpu.l2cache.tags.occ_blocks::cpu.data 3573.472565 # Average occupied blocks per requestor
system.cpu.l2cache.tags.occ_percent::writebacks 0.713558 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.inst 0.008785 # Average percentage of cache occupancy
system.cpu.l2cache.tags.occ_percent::cpu.data 0.109054 # Average percentage of cache occupancy
-system.cpu.l2cache.tags.occ_percent::total 0.831396 # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_percent::total 0.831396 # Average percentage of cache occupancy
system.cpu.l2cache.ReadReq_hits::cpu.inst 8751 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::cpu.data 743573 # number of ReadReq hits
system.cpu.l2cache.ReadReq_hits::total 752324 # number of ReadReq hits
@@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40029.602888
system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40009.472473 # average overall mshr miss latency
system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40009.863371 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.dcache.tags.replacements 1134822 # number of replacements
-system.cpu.dcache.tags.tagsinuse 4065.297446 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 179817786 # Total number of references to valid blocks.
-system.cpu.dcache.tags.sampled_refs 1138918 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 157.884752 # Average number of references to valid blocks.
-system.cpu.dcache.tags.warmup_cycle 11885124000 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 4065.297446 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.992504 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.992504 # Average percentage of cache occupancy
+system.cpu.dcache.tags.replacements 1134822 # number of replacements
+system.cpu.dcache.tags.tagsinuse 4065.297446 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 179817786 # Total number of references to valid blocks.
+system.cpu.dcache.tags.sampled_refs 1138918 # Sample count of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 157.884752 # Average number of references to valid blocks.
+system.cpu.dcache.tags.warmup_cycle 11885124000 # Cycle when the warmup percentage was hit.
+system.cpu.dcache.tags.occ_blocks::cpu.data 4065.297446 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.992504 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.992504 # Average percentage of cache occupancy
system.cpu.dcache.ReadReq_hits::cpu.data 122957658 # number of ReadReq hits
system.cpu.dcache.ReadReq_hits::total 122957658 # number of ReadReq hits
system.cpu.dcache.WriteReq_hits::cpu.data 53883046 # number of WriteReq hits
@@ -445,12 +445,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 794179 # Tr
system.cpu.toL2Bus.trans_dist::Writeback 1064905 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 356260 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 356260 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 23042 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3342741 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count 3365783 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 737344 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 141044672 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size 141782016 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 23042 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3342741 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 3365783 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 737344 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 141044672 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 141782016 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.data_through_bus 141782016 # Total data (bytes)
system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes)
system.cpu.toL2Bus.reqLayer0.occupancy 2172577000 # Layer occupancy (ticks)