diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:33 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:33 -0600 |
| commit | f3585c841e964c98911784a187fc4f081a02a0a6 (patch) | |
| tree | 2a5a3edeaeb0ffe37ca3a04b884f8f66c7538bbf /tests/long/se/20.parser/ref/arm | |
| parent | cfc4a999828a5b51f4c514e3a7c47b4eebc450b9 (diff) | |
| download | gem5-f3585c841e964c98911784a187fc4f081a02a0a6.tar.xz | |
stats: update stats for cache occupancy and clock domain changes
Diffstat (limited to 'tests/long/se/20.parser/ref/arm')
12 files changed, 145 insertions, 38 deletions
diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini index 34784c9a2..d70753e9b 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini @@ -159,6 +159,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=262144 system=system tags=system.cpu.dcache.tags @@ -175,6 +176,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=262144 [system.cpu.dtb] @@ -514,6 +516,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=131072 system=system tags=system.cpu.icache.tags @@ -530,6 +533,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=2 +sequential_access=false size=131072 [system.cpu.interrupts] @@ -584,6 +588,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=20 +sequential_access=false size=2097152 system=system tags=system.cpu.l2cache.tags @@ -600,6 +605,7 @@ block_size=64 clk_domain=system.cpu_clk_domain eventq_index=0 hit_latency=20 +sequential_access=false size=2097152 [system.cpu.toL2Bus] @@ -626,9 +632,9 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/parser +executable=/dist/cpu2000/binaries/arm/linux/parser gid=100 -input=/scratch/nilay/GEM5/dist/m5/cpu2000/data/parser/mdred/input/parser.in +input=/dist/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr index b4d96e4ea..5d8946ede 100755 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr @@ -1,3 +1,2 @@ warn: Sockets disabled, not accepting gdb connections warn: CP14 unimplemented crn[8], opc1[2], crm[9], opc2[4] -hack: be nice to actually delete the event here diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout index cb7300a3e..0f922bcc1 100755 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/simout @@ -1,9 +1,9 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Oct 16 2013 01:36:42 -gem5 started Oct 16 2013 02:08:48 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 17:24:06 +gem5 started Jan 22 2014 22:41:42 +gem5 executing on u200540-lin command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... @@ -67,4 +67,4 @@ info: Increasing stack size by one page. about 2 million people attended the five best costumes got prizes No errors! -Exiting @ tick 202349747500 because target called exit() +Exiting @ tick 202741893000 because target called exit() diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt index 3188dad03..3185557ef 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt @@ -4,13 +4,15 @@ sim_seconds 0.202742 # Nu sim_ticks 202741893000 # Number of ticks simulated final_tick 202741893000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 95210 # Simulator instruction rate (inst/s) -host_op_rate 107343 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 38205910 # Simulator tick rate (ticks/s) -host_mem_usage 298452 # Number of bytes of host memory used -host_seconds 5306.56 # Real time elapsed on the host +host_inst_rate 148118 # Simulator instruction rate (inst/s) +host_op_rate 166994 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 59436990 # Simulator tick rate (ticks/s) +host_mem_usage 253144 # Number of bytes of host memory used +host_seconds 3411.04 # Real time elapsed on the host sim_insts 505237723 # Number of instructions simulated sim_ops 569624283 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 215232 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 9270080 # Number of bytes read from this memory system.physmem.bytes_read::total 9485312 # Number of bytes read from this memory @@ -287,6 +289,7 @@ system.membus.reqLayer0.occupancy 1083331500 # La system.membus.reqLayer0.utilization 0.5 # Layer utilization (%) system.membus.respLayer1.occupancy 1398080741 # Layer occupancy (ticks) system.membus.respLayer1.utilization 0.7 # Layer utilization (%) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.branchPred.lookups 182821881 # Number of BP lookups system.cpu.branchPred.condPredicted 143128941 # Number of conditional branches predicted system.cpu.branchPred.condIncorrect 7267602 # Number of conditional branches incorrect @@ -631,6 +634,15 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy system.cpu.icache.tags.occ_blocks::cpu.inst 1095.413038 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.534870 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.534870 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 1849 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 37 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 55 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 82 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 293 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::4 1382 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 0.902832 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 229105594 # Number of tag accesses +system.cpu.icache.tags.data_accesses 229105594 # Number of data accesses system.cpu.icache.ReadReq_hits::cpu.inst 114523215 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 114523215 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 114523215 # number of demand (read+write) hits @@ -719,6 +731,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.702196 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.011015 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.113503 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.826713 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1024 31255 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 70 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 1 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 2194 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 7669 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 21321 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.953827 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 19093617 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 19093617 # Number of data accesses system.cpu.l2cache.ReadReq_hits::cpu.inst 13491 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 804384 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 817875 # number of ReadReq hits @@ -878,6 +899,14 @@ system.cpu.dcache.tags.warmup_cycle 4256684250 # Cy system.cpu.dcache.tags.occ_blocks::cpu.data 4057.514955 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.990604 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.990604 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 34 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 26 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 2352 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::3 1684 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 391502938 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 391502938 # Number of data accesses system.cpu.dcache.ReadReq_hits::cpu.data 136235473 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 136235473 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 50988251 # number of WriteReq hits diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini index 7b35bd3ad..3b7a89fcb 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini @@ -1,7 +1,9 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= load_addr_mask=1099511627775 @@ -33,6 +36,7 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +eventq_index=0 voltage_domain=system.voltage_domain [system.cpu] @@ -45,6 +49,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +eventq_index=0 fastmem=false function_trace=false function_trace_start=0 @@ -75,21 +80,25 @@ icache_port=system.membus.slave[1] [system.cpu.dtb] type=ArmTLB children=walker +eventq_index=0 size=64 walker=system.cpu.dtb.walker [system.cpu.dtb.walker] type=ArmTableWalker clk_domain=system.cpu_clk_domain +eventq_index=0 num_squash_per_cycle=2 sys=system port=system.membus.slave[4] [system.cpu.interrupts] type=ArmInterrupts +eventq_index=0 [system.cpu.isa] type=ArmISA +eventq_index=0 fpsid=1090793632 id_isar0=34607377 id_isar1=34677009 @@ -108,18 +117,21 @@ midr=890224640 [system.cpu.itb] type=ArmTLB children=walker +eventq_index=0 size=64 walker=system.cpu.itb.walker [system.cpu.itb.walker] type=ArmTableWalker clk_domain=system.cpu_clk_domain +eventq_index=0 num_squash_per_cycle=2 sys=system port=system.membus.slave[3] [system.cpu.tracer] type=ExeTracer +eventq_index=0 [system.cpu.workload] type=LiveProcess @@ -129,9 +141,10 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/arm/linux/parser +eventq_index=0 +executable=/dist/cpu2000/binaries/arm/linux/parser gid=100 -input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in +input=/dist/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -143,11 +156,13 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +eventq_index=0 voltage_domain=system.voltage_domain [system.membus] type=CoherentBus clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -160,6 +175,7 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +eventq_index=0 in_addr_map=true latency=30000 latency_var=0 @@ -169,5 +185,6 @@ port=system.membus.master[0] [system.voltage_domain] type=VoltageDomain +eventq_index=0 voltage=1.000000 diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr index e45cd058f..1a4f96712 100755 --- a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr +++ b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr @@ -1,2 +1 @@ warn: Sockets disabled, not accepting gdb connections -hack: be nice to actually delete the event here diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout index b9241b523..edefc9939 100755 --- a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout +++ b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout @@ -1,11 +1,9 @@ -Redirecting stdout to build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-atomic/simout -Redirecting stderr to build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-atomic/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 09:00:02 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 17:24:06 +gem5 started Jan 22 2014 22:44:24 +gem5 executing on u200540-lin command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-atomic -re tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt index 14e1e1ee2..d2cbe9ffb 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt @@ -4,13 +4,15 @@ sim_seconds 0.290499 # Nu sim_ticks 290498967000 # Number of ticks simulated final_tick 290498967000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1591705 # Simulator instruction rate (inst/s) -host_op_rate 1794011 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 912762441 # Simulator tick rate (ticks/s) -host_mem_usage 237748 # Number of bytes of host memory used -host_seconds 318.26 # Real time elapsed on the host +host_inst_rate 2346027 # Simulator instruction rate (inst/s) +host_op_rate 2644207 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1345327991 # Simulator tick rate (ticks/s) +host_mem_usage 241300 # Number of bytes of host memory used +host_seconds 215.93 # Real time elapsed on the host sim_insts 506581607 # Number of instructions simulated sim_ops 570968167 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 2066445500 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 422852701 # Number of bytes read from this memory system.physmem.bytes_read::total 2489298201 # Number of bytes read from this memory @@ -36,6 +38,7 @@ system.physmem.bw_total::total 9312824252 # To system.membus.throughput 9312824252 # Throughput (bytes/s) system.membus.data_through_bus 2705365825 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.inst_hits 0 # ITB inst hits system.cpu.dtb.inst_misses 0 # ITB inst misses system.cpu.dtb.read_hits 0 # DTB read hits diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini index d125ef04b..cc298b9ef 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini @@ -1,7 +1,9 @@ [root] type=Root children=system +eventq_index=0 full_system=false +sim_quantum=0 time_sync_enable=false time_sync_period=100000000000 time_sync_spin_threshold=100000000 @@ -12,6 +14,7 @@ children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a cache_line_size=64 clk_domain=system.clk_domain +eventq_index=0 init_param=0 kernel= load_addr_mask=1099511627775 @@ -33,6 +36,7 @@ system_port=system.membus.slave[0] [system.clk_domain] type=SrcClockDomain clock=1000 +eventq_index=0 voltage_domain=system.voltage_domain [system.cpu] @@ -45,6 +49,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +eventq_index=0 function_trace=false function_trace_start=0 interrupts=system.cpu.interrupts @@ -71,6 +76,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -79,6 +85,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=262144 system=system tags=system.cpu.dcache.tags @@ -93,18 +100,22 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 +sequential_access=false size=262144 [system.cpu.dtb] type=ArmTLB children=walker +eventq_index=0 size=64 walker=system.cpu.dtb.walker [system.cpu.dtb.walker] type=ArmTableWalker clk_domain=system.cpu_clk_domain +eventq_index=0 num_squash_per_cycle=2 sys=system port=system.cpu.toL2Bus.slave[3] @@ -115,6 +126,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=2 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=2 is_top_level=true @@ -123,6 +135,7 @@ mshrs=4 prefetch_on_access=false prefetcher=Null response_latency=2 +sequential_access=false size=131072 system=system tags=system.cpu.icache.tags @@ -137,14 +150,18 @@ type=LRU assoc=2 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=2 +sequential_access=false size=131072 [system.cpu.interrupts] type=ArmInterrupts +eventq_index=0 [system.cpu.isa] type=ArmISA +eventq_index=0 fpsid=1090793632 id_isar0=34607377 id_isar1=34677009 @@ -163,12 +180,14 @@ midr=890224640 [system.cpu.itb] type=ArmTLB children=walker +eventq_index=0 size=64 walker=system.cpu.itb.walker [system.cpu.itb.walker] type=ArmTableWalker clk_domain=system.cpu_clk_domain +eventq_index=0 num_squash_per_cycle=2 sys=system port=system.cpu.toL2Bus.slave[2] @@ -179,6 +198,7 @@ children=tags addr_ranges=0:18446744073709551615 assoc=8 clk_domain=system.cpu_clk_domain +eventq_index=0 forward_snoops=true hit_latency=20 is_top_level=false @@ -187,6 +207,7 @@ mshrs=20 prefetch_on_access=false prefetcher=Null response_latency=20 +sequential_access=false size=2097152 system=system tags=system.cpu.l2cache.tags @@ -201,12 +222,15 @@ type=LRU assoc=8 block_size=64 clk_domain=system.cpu_clk_domain +eventq_index=0 hit_latency=20 +sequential_access=false size=2097152 [system.cpu.toL2Bus] type=CoherentBus clk_domain=system.cpu_clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -216,6 +240,7 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walke [system.cpu.tracer] type=ExeTracer +eventq_index=0 [system.cpu.workload] type=LiveProcess @@ -225,9 +250,10 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/cpu2000/binaries/arm/linux/parser +eventq_index=0 +executable=/dist/cpu2000/binaries/arm/linux/parser gid=100 -input=/dist/m5/cpu2000/data/parser/mdred/input/parser.in +input=/dist/cpu2000/data/parser/mdred/input/parser.in max_stack_size=67108864 output=cout pid=100 @@ -239,11 +265,13 @@ uid=100 [system.cpu_clk_domain] type=SrcClockDomain clock=500 +eventq_index=0 voltage_domain=system.voltage_domain [system.membus] type=CoherentBus clk_domain=system.clk_domain +eventq_index=0 header_cycles=1 system=system use_default_range=false @@ -256,6 +284,7 @@ type=SimpleMemory bandwidth=73.000000 clk_domain=system.clk_domain conf_table_reported=true +eventq_index=0 in_addr_map=true latency=30000 latency_var=0 @@ -265,5 +294,6 @@ port=system.membus.master[0] [system.voltage_domain] type=VoltageDomain +eventq_index=0 voltage=1.000000 diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/simerr b/tests/long/se/20.parser/ref/arm/linux/simple-timing/simerr index e45cd058f..1a4f96712 100755 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/simerr +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/simerr @@ -1,2 +1 @@ warn: Sockets disabled, not accepting gdb connections -hack: be nice to actually delete the event here diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/simout b/tests/long/se/20.parser/ref/arm/linux/simple-timing/simout index 0a37362e8..13fa82ee3 100755 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/simout +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/simout @@ -1,11 +1,9 @@ -Redirecting stdout to build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-timing/simout -Redirecting stderr to build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-timing/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 22 2013 07:58:15 -gem5 started Sep 22 2013 08:48:54 -gem5 executing on zizzer +gem5 compiled Jan 22 2014 17:24:06 +gem5 started Jan 22 2014 22:45:59 +gem5 executing on u200540-lin command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-timing -re tests/run.py build/ARM/tests/opt/long/se/20.parser/arm/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt index 3138d4062..feaf610e8 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt @@ -4,13 +4,15 @@ sim_seconds 0.717366 # Nu sim_ticks 717366012000 # Number of ticks simulated final_tick 717366012000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1130634 # Simulator instruction rate (inst/s) -host_op_rate 1274033 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1606137434 # Simulator tick rate (ticks/s) -host_mem_usage 243872 # Number of bytes of host memory used -host_seconds 446.64 # Real time elapsed on the host +host_inst_rate 1243497 # Simulator instruction rate (inst/s) +host_op_rate 1401211 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1766466230 # Simulator tick rate (ticks/s) +host_mem_usage 251064 # Number of bytes of host memory used +host_seconds 406.10 # Real time elapsed on the host sim_insts 504986853 # Number of instructions simulated sim_ops 569034839 # Number of ops (including micro ops) simulated +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.inst 177280 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 8952256 # Number of bytes read from this memory system.physmem.bytes_read::total 9129536 # Number of bytes read from this memory @@ -50,6 +52,7 @@ system.membus.reqLayer0.occupancy 1006226000 # La system.membus.reqLayer0.utilization 0.1 # Layer utilization (%) system.membus.respLayer1.occupancy 1283841000 # Layer occupancy (ticks) system.membus.respLayer1.utilization 0.2 # Layer utilization (%) +system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.inst_hits 0 # ITB inst hits system.cpu.dtb.inst_misses 0 # ITB inst misses system.cpu.dtb.read_hits 0 # DTB read hits @@ -124,6 +127,15 @@ system.cpu.icache.tags.warmup_cycle 0 # Cy system.cpu.icache.tags.occ_blocks::cpu.inst 982.663229 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.479816 # Average percentage of cache occupancy system.cpu.icache.tags.occ_percent::total 0.479816 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 1733 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 27 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 24 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 22 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 257 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::4 1403 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 0.846191 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 1033234273 # Number of tag accesses +system.cpu.icache.tags.data_accesses 1033234273 # Number of data accesses system.cpu.icache.ReadReq_hits::cpu.inst 516599855 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 516599855 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 516599855 # number of demand (read+write) hits @@ -206,6 +218,14 @@ system.cpu.l2cache.tags.occ_percent::writebacks 0.713558 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.008785 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.109054 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.831396 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1024 31177 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 283 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 3656 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 27181 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.951447 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 18220084 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 18220084 # Number of data accesses system.cpu.l2cache.ReadReq_hits::cpu.inst 8751 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 743573 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 752324 # number of ReadReq hits @@ -340,6 +360,15 @@ system.cpu.dcache.tags.warmup_cycle 11885124000 # Cy system.cpu.dcache.tags.occ_blocks::cpu.data 4065.297446 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.992504 # Average percentage of cache occupancy system.cpu.dcache.tags.occ_percent::total 0.992504 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 4096 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 23 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 19 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 343 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::3 3546 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::4 165 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 363052326 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 363052326 # Number of data accesses system.cpu.dcache.ReadReq_hits::cpu.data 122957658 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 122957658 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 53883046 # number of WriteReq hits |