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authorNilay Vaish <nilay@cs.wisc.edu>2012-05-22 11:38:04 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2012-05-22 11:38:04 -0500
commit0bff8eb210fedd89baed36ecab3608bb259ff520 (patch)
treedc4a9c3ec0a1ab297a69a3fec3111d7e431b09cd /tests/long/se/20.parser/ref/x86/linux/simple-timing/simout
parent1031fe7b6f6e29e3367750c3029b4dc850e062f5 (diff)
downloadgem5-0bff8eb210fedd89baed36ecab3608bb259ff520.tar.xz
X86 Regression: update stats due to cc register split
Diffstat (limited to 'tests/long/se/20.parser/ref/x86/linux/simple-timing/simout')
-rwxr-xr-xtests/long/se/20.parser/ref/x86/linux/simple-timing/simout8
1 files changed, 5 insertions, 3 deletions
diff --git a/tests/long/se/20.parser/ref/x86/linux/simple-timing/simout b/tests/long/se/20.parser/ref/x86/linux/simple-timing/simout
index d62454745..a1341a25f 100755
--- a/tests/long/se/20.parser/ref/x86/linux/simple-timing/simout
+++ b/tests/long/se/20.parser/ref/x86/linux/simple-timing/simout
@@ -1,9 +1,11 @@
+Redirecting stdout to build/X86/tests/opt/long/se/20.parser/x86/linux/simple-timing/simout
+Redirecting stderr to build/X86/tests/opt/long/se/20.parser/x86/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled May 8 2012 15:05:30
-gem5 started May 8 2012 15:56:26
-gem5 executing on piton
+gem5 compiled May 21 2012 19:00:49
+gem5 started May 21 2012 19:10:10
+gem5 executing on ribera.cs.wisc.edu
command line: build/X86/gem5.opt -d build/X86/tests/opt/long/se/20.parser/x86/linux/simple-timing -re tests/run.py build/X86/tests/opt/long/se/20.parser/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...