diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/20.parser | |
parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/long/se/20.parser')
4 files changed, 170 insertions, 172 deletions
diff --git a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt index d43c28cd4..d58d3f98b 100644 --- a/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.202350 # Nu sim_ticks 202349747500 # Number of ticks simulated final_tick 202349747500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 166059 # Simulator instruction rate (inst/s) -host_op_rate 187221 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 66507382 # Simulator tick rate (ticks/s) -host_mem_usage 250660 # Number of bytes of host memory used -host_seconds 3042.52 # Real time elapsed on the host +host_inst_rate 95439 # Simulator instruction rate (inst/s) +host_op_rate 107602 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 38223736 # Simulator tick rate (ticks/s) +host_mem_usage 246676 # Number of bytes of host memory used +host_seconds 5293.82 # Real time elapsed on the host sim_insts 505237723 # Number of instructions simulated sim_ops 569624283 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 216896 # Number of bytes read from this memory @@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 30890515 # To system.physmem.bw_total::cpu.inst 1071887 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 45802993 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 77765395 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 148206 # Total number of read requests seen -system.physmem.writeReqs 97667 # Total number of write requests seen -system.physmem.cpureqs 245886 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 148206 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 97667 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 148206 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 97667 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 9485120 # Total number of bytes read from memory system.physmem.bytesWritten 6250688 # Total number of bytes written to memory system.physmem.bytesConsumedRd 9485120 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 6250688 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 73 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 73 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 7 # Reqs where no action is needed system.physmem.perBankRdReqs::0 9580 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 9220 # Track reads on a per bank basis @@ -297,10 +298,10 @@ system.membus.trans_dist::UpgradeReq 7 # Tr system.membus.trans_dist::UpgradeResp 7 # Transaction distribution system.membus.trans_dist::ReadExReq 101306 # Transaction distribution system.membus.trans_dist::ReadExResp 101306 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 394092 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 394092 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15735808 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 15735808 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 394092 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 394092 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15735808 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 15735808 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 15735808 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 1084180500 # Layer occupancy (ticks) @@ -628,12 +629,12 @@ system.cpu.toL2Bus.trans_dist::UpgradeReq 69 # T system.cpu.toL2Bus.trans_dist::UpgradeResp 69 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 348843 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 348843 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 33804 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3504826 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 3538630 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 1079232 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 147703872 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 148783104 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 33804 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3504826 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 3538630 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1079232 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 147703872 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 148783104 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 148783104 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 4928 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 2273504243 # Layer occupancy (ticks) @@ -642,15 +643,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 26125731 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 1828577727 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) -system.cpu.icache.tags.replacements 15008 # number of replacements -system.cpu.icache.tags.tagsinuse 1099.436561 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 114505770 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 16868 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 6788.343016 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1099.436561 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.536834 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.536834 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 15008 # number of replacements +system.cpu.icache.tags.tagsinuse 1099.436561 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 114505770 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 16868 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 6788.343016 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1099.436561 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.536834 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.536834 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 114505770 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 114505770 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 114505770 # number of demand (read+write) hits @@ -726,19 +727,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 25103.227023 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 25103.227023 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 25103.227023 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 115462 # number of replacements -system.cpu.l2cache.tags.tagsinuse 27105.054655 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1782175 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 146717 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 12.147025 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 102215583000 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 115462 # number of replacements +system.cpu.l2cache.tags.tagsinuse 27105.054655 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1782175 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 146717 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 12.147025 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 102215583000 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 23019.815136 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 365.213065 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 3720.026454 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 365.213065 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 3720.026454 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.702509 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.011145 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.113526 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.827181 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.827181 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 13469 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 804438 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 817907 # number of ReadReq hits @@ -889,15 +890,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 67880.014749 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 61549.679948 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 61694.476314 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 1192719 # number of replacements -system.cpu.dcache.tags.tagsinuse 4057.784175 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 190184088 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1196815 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 158.908510 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 4223544250 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4057.784175 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.990670 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.990670 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 1192719 # number of replacements +system.cpu.dcache.tags.tagsinuse 4057.784175 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 190184088 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1196815 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 158.908510 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 4223544250 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4057.784175 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.990670 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.990670 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 136217061 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 136217061 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 50989456 # number of WriteReq hits diff --git a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt index b28088e7d..3138d4062 100644 --- a/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt +++ b/tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.717366 # Nu sim_ticks 717366012000 # Number of ticks simulated final_tick 717366012000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 611042 # Simulator instruction rate (inst/s) -host_op_rate 688541 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 868024183 # Simulator tick rate (ticks/s) -host_mem_usage 246240 # Number of bytes of host memory used -host_seconds 826.44 # Real time elapsed on the host +host_inst_rate 1130634 # Simulator instruction rate (inst/s) +host_op_rate 1274033 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1606137434 # Simulator tick rate (ticks/s) +host_mem_usage 243872 # Number of bytes of host memory used +host_seconds 446.64 # Real time elapsed on the host sim_insts 504986853 # Number of instructions simulated sim_ops 569034839 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 177280 # Number of bytes read from this memory @@ -40,10 +40,10 @@ system.membus.trans_dist::ReadResp 41855 # Tr system.membus.trans_dist::Writeback 95953 # Transaction distribution system.membus.trans_dist::ReadExReq 100794 # Transaction distribution system.membus.trans_dist::ReadExResp 100794 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 381251 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 381251 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 15270528 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 15270528 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 381251 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 381251 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 15270528 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 15270528 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 15270528 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 1006226000 # Layer occupancy (ticks) @@ -115,15 +115,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 1434732024 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 9788 # number of replacements -system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 11521 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 44839.845066 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 982.663229 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.479816 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.479816 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 9788 # number of replacements +system.cpu.icache.tags.tagsinuse 982.663229 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 516599855 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 11521 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 44839.845066 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 982.663229 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.479816 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.479816 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 516599855 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 516599855 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 516599855 # number of demand (read+write) hits @@ -193,19 +193,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 21105.199201 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 21105.199201 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 21105.199201 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 109895 # number of replacements -system.cpu.l2cache.tags.tagsinuse 27243.192324 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 1668833 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 141072 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 11.829654 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 343698539000 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 109895 # number of replacements +system.cpu.l2cache.tags.tagsinuse 27243.192324 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 1668833 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 141072 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 11.829654 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 343698539000 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 23381.854289 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 287.865470 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 3573.472565 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 287.865470 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 3573.472565 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.713558 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.008785 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.109054 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.831396 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.831396 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 8751 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 743573 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 752324 # number of ReadReq hits @@ -331,15 +331,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40029.602888 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40009.472473 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40009.863371 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 1134822 # number of replacements -system.cpu.dcache.tags.tagsinuse 4065.297446 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 179817786 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1138918 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 157.884752 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 11885124000 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4065.297446 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.992504 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.992504 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 1134822 # number of replacements +system.cpu.dcache.tags.tagsinuse 4065.297446 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 179817786 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1138918 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 157.884752 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 11885124000 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4065.297446 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.992504 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.992504 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 122957658 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 122957658 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 53883046 # number of WriteReq hits @@ -445,12 +445,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 794179 # Tr system.cpu.toL2Bus.trans_dist::Writeback 1064905 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 356260 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 356260 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 23042 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 3342741 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 3365783 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 737344 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 141044672 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 141782016 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 23042 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 3342741 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 3365783 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 737344 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 141044672 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 141782016 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 141782016 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 2172577000 # Layer occupancy (ticks) diff --git a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt index d91a5905c..4d8b3de9b 100644 --- a/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt +++ b/tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.458202 # Nu sim_ticks 458201684000 # Number of ticks simulated final_tick 458201684000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 111882 # Simulator instruction rate (inst/s) -host_op_rate 206882 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 61997502 # Simulator tick rate (ticks/s) -host_mem_usage 341328 # Number of bytes of host memory used -host_seconds 7390.65 # Real time elapsed on the host +host_inst_rate 77434 # Simulator instruction rate (inst/s) +host_op_rate 143185 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 42909026 # Simulator tick rate (ticks/s) +host_mem_usage 338808 # Number of bytes of host memory used +host_seconds 10678.45 # Real time elapsed on the host sim_insts 826877109 # Number of instructions simulated sim_ops 1528988701 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 201408 # Number of bytes read from this memory @@ -34,14 +34,15 @@ system.physmem.bw_total::writebacks 41005663 # To system.physmem.bw_total::cpu.inst 439562 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 53417735 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 94862960 # Total bandwidth to/from this memory (bytes/s) -system.physmem.readReqs 385586 # Total number of read requests seen -system.physmem.writeReqs 293576 # Total number of write requests seen -system.physmem.cpureqs 810414 # Reqs generatd by CPU via cache - shady +system.physmem.readReqs 385586 # Total number of read requests accepted by DRAM controller +system.physmem.writeReqs 293576 # Total number of write requests accepted by DRAM controller +system.physmem.readBursts 385586 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts +system.physmem.writeBursts 293576 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts system.physmem.bytesRead 24677504 # Total number of bytes read from memory system.physmem.bytesWritten 18788864 # Total number of bytes written to memory system.physmem.bytesConsumedRd 24677504 # bytesRead derated as per pkt->getSize() system.physmem.bytesConsumedWr 18788864 # bytesWritten derated as per pkt->getSize() -system.physmem.servicedByWrQ 149 # Number of read reqs serviced by write Q +system.physmem.servicedByWrQ 149 # Number of DRAM read bursts serviced by write Q system.physmem.neitherReadNorWrite 131239 # Reqs where no action is needed system.physmem.perBankRdReqs::0 24063 # Track reads on a per bank basis system.physmem.perBankRdReqs::1 26436 # Track reads on a per bank basis @@ -316,11 +317,9 @@ system.membus.trans_dist::ReadExReq 206848 # Tr system.membus.trans_dist::ReadExResp 206848 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1327226 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1327226 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 1327226 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 1327226 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43466368 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 43466368 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 43466368 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 43466368 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 43466368 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -606,12 +605,12 @@ system.cpu.toL2Bus.trans_dist::UpgradeReq 132628 # T system.cpu.toL2Bus.trans_dist::UpgradeResp 132628 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 771784 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 771784 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 146337 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 7664164 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 7810501 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 435712 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 311349248 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 311784960 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 146337 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7664164 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 7810501 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 435712 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 311349248 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 311784960 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 311784960 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 8494080 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 4903151186 # Layer occupancy (ticks) @@ -620,15 +619,15 @@ system.cpu.toL2Bus.respLayer0.occupancy 209959241 # La system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 3959772656 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.9 # Layer utilization (%) -system.cpu.icache.tags.replacements 5293 # number of replacements -system.cpu.icache.tags.tagsinuse 1036.459072 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 161843741 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 6867 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 23568.332751 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1036.459072 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.506084 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.506084 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 5293 # number of replacements +system.cpu.icache.tags.tagsinuse 1036.459072 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 161843741 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 6867 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 23568.332751 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1036.459072 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.506084 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.506084 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 161845824 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 161845824 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 161845824 # number of demand (read+write) hits @@ -704,19 +703,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 3994.146443 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 3994.146443 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 3994.146443 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 352905 # number of replacements -system.cpu.l2cache.tags.tagsinuse 29673.331814 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3696859 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 385269 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 9.595527 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 199076310000 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 352905 # number of replacements +system.cpu.l2cache.tags.tagsinuse 29673.331814 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3696859 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 385269 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 9.595527 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 199076310000 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 21119.362848 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 223.841801 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 8330.127165 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 223.841801 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 8330.127165 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.644512 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.006831 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.254215 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.905558 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.905558 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 3661 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1586701 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1590362 # number of ReadReq hits @@ -862,15 +861,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 65139.453621 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 59112.047244 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59161.253496 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 2529980 # number of replacements -system.cpu.dcache.tags.tagsinuse 4088.352551 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 396070659 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 2534076 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 156.297861 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 1764467250 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4088.352551 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.998133 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.998133 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 2529980 # number of replacements +system.cpu.dcache.tags.tagsinuse 4088.352551 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 396070659 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 2534076 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 156.297861 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 1764467250 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4088.352551 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.998133 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.998133 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 247340077 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 247340077 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 148239061 # number of WriteReq hits diff --git a/tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt b/tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt index 5255bf68c..7c10a36f9 100644 --- a/tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt +++ b/tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.647873 # Nu sim_ticks 1647872849000 # Number of ticks simulated final_tick 1647872849000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 533286 # Simulator instruction rate (inst/s) -host_op_rate 986105 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1062778196 # Simulator tick rate (ticks/s) -host_mem_usage 304632 # Number of bytes of host memory used -host_seconds 1550.53 # Real time elapsed on the host +host_inst_rate 418246 # Simulator instruction rate (inst/s) +host_op_rate 773383 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 833516309 # Simulator tick rate (ticks/s) +host_mem_usage 254900 # Number of bytes of host memory used +host_seconds 1977.01 # Real time elapsed on the host sim_insts 826877110 # Number of instructions simulated sim_ops 1528988702 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 120704 # Number of bytes read from this memory @@ -42,11 +42,9 @@ system.membus.trans_dist::ReadExReq 206691 # Tr system.membus.trans_dist::ReadExResp 206691 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1054572 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::total 1054572 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::system.physmem.port 1054572 # Packet count per connected master and slave (bytes) system.membus.pkt_count::total 1054572 # Packet count per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 43099456 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 43099456 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size::system.physmem.port 43099456 # Cumulative packet size per connected master and slave (bytes) system.membus.tot_pkt_size::total 43099456 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 43099456 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) @@ -77,15 +75,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 3295745698 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 1253 # number of replacements -system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 2814 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 379653.252310 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 881.356491 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.430350 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.430350 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 1253 # number of replacements +system.cpu.icache.tags.tagsinuse 881.356491 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 1068344252 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 2814 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 379653.252310 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 881.356491 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.430350 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.430350 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 1068344252 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 1068344252 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 1068344252 # number of demand (read+write) hits @@ -155,19 +153,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 39153.518124 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 39153.518124 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 39153.518124 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 348459 # number of replacements -system.cpu.l2cache.tags.tagsinuse 29286.402664 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 3655011 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 380814 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 9.597890 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 755936431000 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 348459 # number of replacements +system.cpu.l2cache.tags.tagsinuse 29286.402664 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 3655011 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 380814 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 9.597890 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 755936431000 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 21041.299337 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 139.758519 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 8105.344807 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 139.758519 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 8105.344807 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.642129 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.004265 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.247355 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.893750 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.893750 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 928 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 1554848 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 1555776 # number of ReadReq hits @@ -293,15 +291,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40006.362672 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000.324318 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000.354198 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 2514362 # number of replacements -system.cpu.dcache.tags.tagsinuse 4086.415783 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 530743930 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 2518458 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 210.741624 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 8211724000 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 4086.415783 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.997660 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.997660 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 2514362 # number of replacements +system.cpu.dcache.tags.tagsinuse 4086.415783 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 530743930 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 2518458 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 210.741624 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 8211724000 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 4086.415783 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.997660 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.997660 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 382374772 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 382374772 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 148369158 # number of WriteReq hits @@ -399,12 +397,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 1730228 # Tr system.cpu.toL2Bus.trans_dist::Writeback 2323523 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 791044 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 791044 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 5628 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 7360439 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 7366067 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 180096 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 309886784 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 310066880 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5628 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 7360439 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 7366067 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 180096 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 309886784 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 310066880 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 310066880 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 4745920500 # Layer occupancy (ticks) |