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author | Nathan Binkert <nate@binkert.org> | 2012-05-09 11:52:14 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2012-05-09 11:52:14 -0700 |
commit | 4a644767c58754339965cecc5d85853255652a30 (patch) | |
tree | e435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt | |
parent | 55411f7f713a42f67552a9621051fae8f7869648 (diff) | |
download | gem5-4a644767c58754339965cecc5d85853255652a30.tar.xz |
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt')
-rw-r--r-- | tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt index 0281e5820..852f5134d 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.567343 # Nu sim_ticks 567343170000 # Number of ticks simulated final_tick 567343170000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 2193403 # Simulator instruction rate (inst/s) -host_op_rate 2193403 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 3121451222 # Simulator tick rate (ticks/s) -host_mem_usage 215564 # Number of bytes of host memory used -host_seconds 181.76 # Real time elapsed on the host +host_inst_rate 766770 # Simulator instruction rate (inst/s) +host_op_rate 766770 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1091197730 # Simulator tick rate (ticks/s) +host_mem_usage 220456 # Number of bytes of host memory used +host_seconds 519.93 # Real time elapsed on the host sim_insts 398664609 # Number of instructions simulated sim_ops 398664609 # Number of ops (including micro ops) simulated system.physmem.bytes_read 459520 # Number of bytes read from this memory @@ -118,8 +118,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 # system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.ReadReq_mshr_misses::cpu.inst 3673 # number of ReadReq MSHR misses @@ -194,8 +194,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs 0 # system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed system.cpu.dcache.writebacks::writebacks 649 # number of writebacks @@ -304,8 +304,8 @@ system.cpu.l2cache.blocked_cycles::no_mshrs 0 # system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.l2cache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.cache_copies 0 # number of cache copies performed system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 3205 # number of ReadReq MSHR misses |