diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-08-19 03:52:36 -0400 |
commit | b63631536d974f31cf99ee280271dc0f7b4c746f (patch) | |
tree | ff83820d8dd75de8238e4b7ddaf3b91e4cf8374f /tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt | |
parent | 646c4a23ca44aab5468c896034288151c89be782 (diff) | |
download | gem5-b63631536d974f31cf99ee280271dc0f7b4c746f.tar.xz |
stats: Cumulative stats update
This patch updates the stats to reflect the: 1) addition of the
internal queue in SimpleMemory, 2) moving of the memory class outside
FSConfig, 3) fixing up of the 2D vector printing format, 4) specifying
burst size and interface width for the DRAM instead of relying on
cache-line size, 5) performing merging in the DRAM controller write
buffer, and 6) fixing how idle cycles are counted in the atomic and
timing CPU models.
The main reason for bundling them up is to minimise the changeset
size.
Diffstat (limited to 'tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt')
-rw-r--r-- | tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt | 84 |
1 files changed, 42 insertions, 42 deletions
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt index 2e7f2c614..3ed6163c0 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.567335 # Nu sim_ticks 567335093000 # Number of ticks simulated final_tick 567335093000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1715092 # Simulator instruction rate (inst/s) -host_op_rate 1715091 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2440727076 # Simulator tick rate (ticks/s) -host_mem_usage 230984 # Number of bytes of host memory used -host_seconds 232.45 # Real time elapsed on the host +host_inst_rate 1598767 # Simulator instruction rate (inst/s) +host_op_rate 1598767 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2275187152 # Simulator tick rate (ticks/s) +host_mem_usage 229960 # Number of bytes of host memory used +host_seconds 249.36 # Real time elapsed on the host sim_insts 398664609 # Number of instructions simulated sim_ops 398664609 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 205120 # Number of bytes read from this memory @@ -32,10 +32,10 @@ system.membus.trans_dist::ReadReq 4032 # Tr system.membus.trans_dist::ReadResp 4032 # Transaction distribution system.membus.trans_dist::ReadExReq 3142 # Transaction distribution system.membus.trans_dist::ReadExResp 3142 # Transaction distribution -system.membus.pkt_count_system.cpu.l2cache.mem_side 14348 # Packet count per connected master and slave (bytes) -system.membus.pkt_count 14348 # Packet count per connected master and slave (bytes) -system.membus.tot_pkt_size_system.cpu.l2cache.mem_side 459136 # Cumulative packet size per connected master and slave (bytes) -system.membus.tot_pkt_size 459136 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 14348 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 14348 # Packet count per connected master and slave (bytes) +system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 459136 # Cumulative packet size per connected master and slave (bytes) +system.membus.tot_pkt_size::total 459136 # Cumulative packet size per connected master and slave (bytes) system.membus.data_through_bus 459136 # Total data (bytes) system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) system.membus.reqLayer0.occupancy 7174000 # Layer occupancy (ticks) @@ -97,15 +97,15 @@ system.cpu.num_idle_cycles 0 # Nu system.cpu.num_busy_cycles 1134670186 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles -system.cpu.icache.tags.replacements 1769 # number of replacements -system.cpu.icache.tags.tagsinuse 1795.138964 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 398660993 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 3673 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 108538.250204 # Average number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.icache.tags.occ_blocks::cpu.inst 1795.138964 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.876533 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.876533 # Average percentage of cache occupancy +system.cpu.icache.tags.replacements 1769 # number of replacements +system.cpu.icache.tags.tagsinuse 1795.138964 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 398660993 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 3673 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 108538.250204 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 1795.138964 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.876533 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.876533 # Average percentage of cache occupancy system.cpu.icache.ReadReq_hits::cpu.inst 398660993 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 398660993 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 398660993 # number of demand (read+write) hits @@ -175,19 +175,19 @@ system.cpu.icache.demand_avg_mshr_miss_latency::total 47648.516199 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 47648.516199 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 47648.516199 # average overall mshr miss latency system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 0 # number of replacements -system.cpu.l2cache.tags.tagsinuse 3772.485305 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 677 # Total number of references to valid blocks. -system.cpu.l2cache.tags.sampled_refs 4566 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 0.148270 # Average number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.replacements 0 # number of replacements +system.cpu.l2cache.tags.tagsinuse 3772.485305 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 677 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 4566 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 0.148270 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. system.cpu.l2cache.tags.occ_blocks::writebacks 371.540221 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2770.469924 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 630.475161 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 2770.469924 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 630.475161 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.011339 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.084548 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.019241 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.115127 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.115127 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 468 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::cpu.data 123 # number of ReadReq hits system.cpu.l2cache.ReadReq_hits::total 591 # number of ReadReq hits @@ -311,15 +311,15 @@ system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 40000 system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 40000 # average overall mshr miss latency system.cpu.l2cache.overall_avg_mshr_miss_latency::total 40000 # average overall mshr miss latency system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.tags.replacements 764 # number of replacements -system.cpu.dcache.tags.tagsinuse 3288.930576 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 168271068 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 4152 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 40527.713873 # Average number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.dcache.tags.occ_blocks::cpu.data 3288.930576 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.802962 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.802962 # Average percentage of cache occupancy +system.cpu.dcache.tags.replacements 764 # number of replacements +system.cpu.dcache.tags.tagsinuse 3288.930576 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 168271068 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 4152 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 40527.713873 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 3288.930576 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.802962 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.802962 # Average percentage of cache occupancy system.cpu.dcache.ReadReq_hits::cpu.data 94753540 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 94753540 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 73517528 # number of WriteReq hits @@ -417,12 +417,12 @@ system.cpu.toL2Bus.trans_dist::ReadResp 4623 # Tr system.cpu.toL2Bus.trans_dist::Writeback 649 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 3202 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 3202 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side 7346 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side 8953 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count 16299 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side 235072 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side 307264 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.tot_pkt_size 542336 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 7346 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8953 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 16299 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 235072 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 307264 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.tot_pkt_size::total 542336 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.data_through_bus 542336 # Total data (bytes) system.cpu.toL2Bus.snoop_data_through_bus 0 # Total snoop data (bytes) system.cpu.toL2Bus.reqLayer0.occupancy 4886000 # Layer occupancy (ticks) |