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authorAndreas Hansson <andreas.hansson@arm.com>2015-05-26 03:21:39 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2015-05-26 03:21:39 -0400
commit4bc7dfb697bd779b12f1fd95fbe72144ae134055 (patch)
tree532cea8e118ac27336792282c7023bb1b2d01be4 /tests/long/se/30.eon/ref/alpha/tru64
parentcea1d14a937f27fa49423bd01eb900e578993a43 (diff)
downloadgem5-4bc7dfb697bd779b12f1fd95fbe72144ae134055.tar.xz
stats: Update MinorCPU regressions after accounting fix
Diffstat (limited to 'tests/long/se/30.eon/ref/alpha/tru64')
-rw-r--r--tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt678
1 files changed, 339 insertions, 339 deletions
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt
index bccf5186d..5e6582f7a 100644
--- a/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt
+++ b/tests/long/se/30.eon/ref/alpha/tru64/minor-timing/stats.txt
@@ -1,42 +1,42 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 0.226866 # Number of seconds simulated
-sim_ticks 226865901500 # Number of ticks simulated
-final_tick 226865901500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 0.226051 # Number of seconds simulated
+sim_ticks 226051212500 # Number of ticks simulated
+final_tick 226051212500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 324605 # Simulator instruction rate (inst/s)
-host_op_rate 324605 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 184721178 # Simulator tick rate (ticks/s)
-host_mem_usage 301676 # Number of bytes of host memory used
-host_seconds 1228.15 # Real time elapsed on the host
+host_inst_rate 313509 # Simulator instruction rate (inst/s)
+host_op_rate 313509 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 177766322 # Simulator tick rate (ticks/s)
+host_mem_usage 302576 # Number of bytes of host memory used
+host_seconds 1271.62 # Real time elapsed on the host
sim_insts 398664665 # Number of instructions simulated
sim_ops 398664665 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.physmem.bytes_read::cpu.inst 249280 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.inst 249344 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.data 254592 # Number of bytes read from this memory
-system.physmem.bytes_read::total 503872 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 249280 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 249280 # Number of instructions bytes read from this memory
-system.physmem.num_reads::cpu.inst 3895 # Number of read requests responded to by this memory
+system.physmem.bytes_read::total 503936 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 249344 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 249344 # Number of instructions bytes read from this memory
+system.physmem.num_reads::cpu.inst 3896 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.data 3978 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 7873 # Number of read requests responded to by this memory
-system.physmem.bw_read::cpu.inst 1098799 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 1122214 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 2221012 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 1098799 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 1098799 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 1098799 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 1122214 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 2221012 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 7873 # Number of read requests accepted
+system.physmem.num_reads::total 7874 # Number of read requests responded to by this memory
+system.physmem.bw_read::cpu.inst 1103042 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 1126258 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 2229300 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 1103042 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 1103042 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_total::cpu.inst 1103042 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 1126258 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 2229300 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 7874 # Number of read requests accepted
system.physmem.writeReqs 0 # Number of write requests accepted
-system.physmem.readBursts 7873 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.readBursts 7874 # Number of DRAM read bursts, including those serviced by the write queue
system.physmem.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 503872 # Total number of bytes read from DRAM
+system.physmem.bytesReadDRAM 503936 # Total number of bytes read from DRAM
system.physmem.bytesReadWrQ 0 # Total number of bytes read from write queue
system.physmem.bytesWritten 0 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 503872 # Total read bytes from the system interface side
+system.physmem.bytesReadSys 503936 # Total read bytes from the system interface side
system.physmem.bytesWrittenSys 0 # Total written bytes from the system interface side
system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue
system.physmem.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
@@ -49,7 +49,7 @@ system.physmem.perBankRdBursts::4 475 # Pe
system.physmem.perBankRdBursts::5 478 # Per bank write bursts
system.physmem.perBankRdBursts::6 563 # Per bank write bursts
system.physmem.perBankRdBursts::7 560 # Per bank write bursts
-system.physmem.perBankRdBursts::8 469 # Per bank write bursts
+system.physmem.perBankRdBursts::8 470 # Per bank write bursts
system.physmem.perBankRdBursts::9 437 # Per bank write bursts
system.physmem.perBankRdBursts::10 354 # Per bank write bursts
system.physmem.perBankRdBursts::11 323 # Per bank write bursts
@@ -75,14 +75,14 @@ system.physmem.perBankWrBursts::14 0 # Pe
system.physmem.perBankWrBursts::15 0 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
-system.physmem.totGap 226865813000 # Total gap between requests
+system.physmem.totGap 226051111000 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
system.physmem.readPktSize::2 0 # Read request sizes (log2)
system.physmem.readPktSize::3 0 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 7873 # Read request sizes (log2)
+system.physmem.readPktSize::6 7874 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 0 # Write request sizes (log2)
@@ -90,9 +90,9 @@ system.physmem.writePktSize::3 0 # Wr
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
system.physmem.writePktSize::6 0 # Write request sizes (log2)
-system.physmem.rdQLenPdf::0 6816 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::0 6818 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::1 974 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 83 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 82 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
@@ -186,29 +186,29 @@ system.physmem.wrQLenPdf::60 0 # Wh
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
-system.physmem.bytesPerActivate::samples 1561 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean 321.065983 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean 192.383190 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev 328.308816 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127 550 35.23% 35.23% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255 344 22.04% 57.27% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383 200 12.81% 70.08% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511 103 6.60% 76.68% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639 61 3.91% 80.59% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767 52 3.33% 83.92% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895 34 2.18% 86.10% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023 30 1.92% 88.02% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151 187 11.98% 100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total 1561 # Bytes accessed per row activation
-system.physmem.totQLat 54380250 # Total ticks spent queuing
-system.physmem.totMemAccLat 201999000 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 39365000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 6907.18 # Average queueing delay per DRAM burst
+system.physmem.bytesPerActivate::samples 1564 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 321.964194 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 193.457187 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 327.645688 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 541 34.59% 34.59% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 357 22.83% 57.42% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 194 12.40% 69.82% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 101 6.46% 76.28% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 65 4.16% 80.43% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 55 3.52% 83.95% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 35 2.24% 86.19% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 34 2.17% 88.36% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 182 11.64% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 1564 # Bytes accessed per row activation
+system.physmem.totQLat 54215500 # Total ticks spent queuing
+system.physmem.totMemAccLat 201853000 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 39370000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 6885.38 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 25657.18 # Average memory access latency per DRAM burst
-system.physmem.avgRdBW 2.22 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgMemAccLat 25635.38 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 2.23 # Average DRAM read bandwidth in MiByte/s
system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys 2.22 # Average system read bandwidth in MiByte/s
+system.physmem.avgRdBWSys 2.23 # Average system read bandwidth in MiByte/s
system.physmem.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 0.02 # Data bus utilization in percentage
@@ -216,70 +216,70 @@ system.physmem.busUtilRead 0.02 # Da
system.physmem.busUtilWrite 0.00 # Data bus utilization in percentage for writes
system.physmem.avgRdQLen 1.00 # Average read queue length when enqueuing
system.physmem.avgWrQLen 0.00 # Average write queue length when enqueuing
-system.physmem.readRowHits 6303 # Number of row buffer hits during reads
+system.physmem.readRowHits 6308 # Number of row buffer hits during reads
system.physmem.writeRowHits 0 # Number of row buffer hits during writes
-system.physmem.readRowHitRate 80.06 # Row buffer hit rate for reads
+system.physmem.readRowHitRate 80.11 # Row buffer hit rate for reads
system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
-system.physmem.avgGap 28815675.47 # Average gap between requests
-system.physmem.pageHitRate 80.06 # Row buffer hit rate, read and write combined
-system.physmem_0.actEnergy 6902280 # Energy for activate commands per rank (pJ)
-system.physmem_0.preEnergy 3766125 # Energy for precharge commands per rank (pJ)
-system.physmem_0.readEnergy 34164000 # Energy for read commands per rank (pJ)
+system.physmem.avgGap 28708548.51 # Average gap between requests
+system.physmem.pageHitRate 80.11 # Row buffer hit rate, read and write combined
+system.physmem_0.actEnergy 6872040 # Energy for activate commands per rank (pJ)
+system.physmem_0.preEnergy 3749625 # Energy for precharge commands per rank (pJ)
+system.physmem_0.readEnergy 34327800 # Energy for read commands per rank (pJ)
system.physmem_0.writeEnergy 0 # Energy for write commands per rank (pJ)
-system.physmem_0.refreshEnergy 14817404160 # Energy for refresh commands per rank (pJ)
-system.physmem_0.actBackEnergy 5855918085 # Energy for active background per rank (pJ)
-system.physmem_0.preBackEnergy 130979493750 # Energy for precharge background per rank (pJ)
-system.physmem_0.totalEnergy 151697648400 # Total energy per rank (pJ)
-system.physmem_0.averagePower 668.682686 # Core power per rank (mW)
-system.physmem_0.memoryStateTime::IDLE 217896983750 # Time in different power states
-system.physmem_0.memoryStateTime::REF 7575360000 # Time in different power states
+system.physmem_0.refreshEnergy 14764513920 # Energy for refresh commands per rank (pJ)
+system.physmem_0.actBackEnergy 5850636750 # Energy for active background per rank (pJ)
+system.physmem_0.preBackEnergy 130498264500 # Energy for precharge background per rank (pJ)
+system.physmem_0.totalEnergy 151158364635 # Total energy per rank (pJ)
+system.physmem_0.averagePower 668.692398 # Core power per rank (mW)
+system.physmem_0.memoryStateTime::IDLE 217093450250 # Time in different power states
+system.physmem_0.memoryStateTime::REF 7548320000 # Time in different power states
system.physmem_0.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_0.memoryStateTime::ACT 1391017250 # Time in different power states
+system.physmem_0.memoryStateTime::ACT 1408913500 # Time in different power states
system.physmem_0.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.physmem_1.actEnergy 4891320 # Energy for activate commands per rank (pJ)
-system.physmem_1.preEnergy 2668875 # Energy for precharge commands per rank (pJ)
-system.physmem_1.readEnergy 26910000 # Energy for read commands per rank (pJ)
+system.physmem_1.actEnergy 4951800 # Energy for activate commands per rank (pJ)
+system.physmem_1.preEnergy 2701875 # Energy for precharge commands per rank (pJ)
+system.physmem_1.readEnergy 27042600 # Energy for read commands per rank (pJ)
system.physmem_1.writeEnergy 0 # Energy for write commands per rank (pJ)
-system.physmem_1.refreshEnergy 14817404160 # Energy for refresh commands per rank (pJ)
-system.physmem_1.actBackEnergy 5585732100 # Energy for active background per rank (pJ)
-system.physmem_1.preBackEnergy 131216499000 # Energy for precharge background per rank (pJ)
-system.physmem_1.totalEnergy 151654105455 # Total energy per rank (pJ)
-system.physmem_1.averagePower 668.490749 # Core power per rank (mW)
-system.physmem_1.memoryStateTime::IDLE 218290626750 # Time in different power states
-system.physmem_1.memoryStateTime::REF 7575360000 # Time in different power states
+system.physmem_1.refreshEnergy 14764513920 # Energy for refresh commands per rank (pJ)
+system.physmem_1.actBackEnergy 5592917520 # Energy for active background per rank (pJ)
+system.physmem_1.preBackEnergy 130724334000 # Energy for precharge background per rank (pJ)
+system.physmem_1.totalEnergy 151116461715 # Total energy per rank (pJ)
+system.physmem_1.averagePower 668.507029 # Core power per rank (mW)
+system.physmem_1.memoryStateTime::IDLE 217471574500 # Time in different power states
+system.physmem_1.memoryStateTime::REF 7548320000 # Time in different power states
system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem_1.memoryStateTime::ACT 994701750 # Time in different power states
+system.physmem_1.memoryStateTime::ACT 1030789250 # Time in different power states
system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.cpu.branchPred.lookups 46273750 # Number of BP lookups
-system.cpu.branchPred.condPredicted 26730646 # Number of conditional branches predicted
-system.cpu.branchPred.condIncorrect 1017469 # Number of conditional branches incorrect
-system.cpu.branchPred.BTBLookups 25595406 # Number of BTB lookups
-system.cpu.branchPred.BTBHits 21359943 # Number of BTB hits
+system.cpu.branchPred.lookups 46270925 # Number of BP lookups
+system.cpu.branchPred.condPredicted 26727379 # Number of conditional branches predicted
+system.cpu.branchPred.condIncorrect 1017826 # Number of conditional branches incorrect
+system.cpu.branchPred.BTBLookups 25620092 # Number of BTB lookups
+system.cpu.branchPred.BTBHits 21360644 # Number of BTB hits
system.cpu.branchPred.BTBCorrect 0 # Number of correct BTB predictions (this stat may not work properly.
-system.cpu.branchPred.BTBHitPct 83.452253 # BTB Hit Percentage
-system.cpu.branchPred.usedRAS 8341648 # Number of times the RAS was used to get a target.
+system.cpu.branchPred.BTBHitPct 83.374580 # BTB Hit Percentage
+system.cpu.branchPred.usedRAS 8341960 # Number of times the RAS was used to get a target.
system.cpu.branchPred.RASInCorrect 323 # Number of incorrect RAS predictions.
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv
system.cpu.dtb.fetch_accesses 0 # ITB accesses
-system.cpu.dtb.read_hits 95585469 # DTB read hits
-system.cpu.dtb.read_misses 115 # DTB read misses
+system.cpu.dtb.read_hits 95612151 # DTB read hits
+system.cpu.dtb.read_misses 116 # DTB read misses
system.cpu.dtb.read_acv 0 # DTB read access violations
-system.cpu.dtb.read_accesses 95585584 # DTB read accesses
-system.cpu.dtb.write_hits 73606437 # DTB write hits
-system.cpu.dtb.write_misses 857 # DTB write misses
+system.cpu.dtb.read_accesses 95612267 # DTB read accesses
+system.cpu.dtb.write_hits 73605971 # DTB write hits
+system.cpu.dtb.write_misses 858 # DTB write misses
system.cpu.dtb.write_acv 0 # DTB write access violations
-system.cpu.dtb.write_accesses 73607294 # DTB write accesses
-system.cpu.dtb.data_hits 169191906 # DTB hits
-system.cpu.dtb.data_misses 972 # DTB misses
+system.cpu.dtb.write_accesses 73606829 # DTB write accesses
+system.cpu.dtb.data_hits 169218122 # DTB hits
+system.cpu.dtb.data_misses 974 # DTB misses
system.cpu.dtb.data_acv 0 # DTB access violations
-system.cpu.dtb.data_accesses 169192878 # DTB accesses
-system.cpu.itb.fetch_hits 98781212 # ITB hits
-system.cpu.itb.fetch_misses 1236 # ITB misses
+system.cpu.dtb.data_accesses 169219096 # DTB accesses
+system.cpu.itb.fetch_hits 98739643 # ITB hits
+system.cpu.itb.fetch_misses 1232 # ITB misses
system.cpu.itb.fetch_acv 0 # ITB acv
-system.cpu.itb.fetch_accesses 98782448 # ITB accesses
+system.cpu.itb.fetch_accesses 98740875 # ITB accesses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
system.cpu.itb.read_acv 0 # DTB read access violations
@@ -293,67 +293,67 @@ system.cpu.itb.data_misses 0 # DT
system.cpu.itb.data_acv 0 # DTB access violations
system.cpu.itb.data_accesses 0 # DTB accesses
system.cpu.workload.num_syscalls 215 # Number of system calls
-system.cpu.numCycles 453731803 # number of cpu cycles simulated
+system.cpu.numCycles 452102425 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
system.cpu.committedInsts 398664665 # Number of instructions committed
system.cpu.committedOps 398664665 # Number of ops (including micro ops) committed
-system.cpu.discardedOps 4467789 # Number of ops (including micro ops) which were discarded before commit
+system.cpu.discardedOps 4488157 # Number of ops (including micro ops) which were discarded before commit
system.cpu.numFetchSuspends 0 # Number of times Execute suspended instruction fetching
-system.cpu.cpi 1.138129 # CPI: cycles per instruction
-system.cpu.ipc 0.878635 # IPC: instructions per cycle
-system.cpu.tickCycles 450174138 # Number of cycles that the object actually ticked
-system.cpu.idleCycles 3557665 # Total number of cycles that the object has spent stopped
+system.cpu.cpi 1.134042 # CPI: cycles per instruction
+system.cpu.ipc 0.881802 # IPC: instructions per cycle
+system.cpu.tickCycles 448265843 # Number of cycles that the object actually ticked
+system.cpu.idleCycles 3836582 # Total number of cycles that the object has spent stopped
system.cpu.dcache.tags.replacements 771 # number of replacements
-system.cpu.dcache.tags.tagsinuse 3291.677539 # Cycle average of tags in use
-system.cpu.dcache.tags.total_refs 168028622 # Total number of references to valid blocks.
+system.cpu.dcache.tags.tagsinuse 3291.681680 # Cycle average of tags in use
+system.cpu.dcache.tags.total_refs 168032891 # Total number of references to valid blocks.
system.cpu.dcache.tags.sampled_refs 4165 # Sample count of references to valid blocks.
-system.cpu.dcache.tags.avg_refs 40343.006483 # Average number of references to valid blocks.
+system.cpu.dcache.tags.avg_refs 40344.031453 # Average number of references to valid blocks.
system.cpu.dcache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.dcache.tags.occ_blocks::cpu.data 3291.677539 # Average occupied blocks per requestor
-system.cpu.dcache.tags.occ_percent::cpu.data 0.803632 # Average percentage of cache occupancy
-system.cpu.dcache.tags.occ_percent::total 0.803632 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_blocks::cpu.data 3291.681680 # Average occupied blocks per requestor
+system.cpu.dcache.tags.occ_percent::cpu.data 0.803633 # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_percent::total 0.803633 # Average percentage of cache occupancy
system.cpu.dcache.tags.occ_task_id_blocks::1024 3394 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::0 37 # Occupied blocks per task id
-system.cpu.dcache.tags.age_task_id_blocks_1024::1 25 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0 36 # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1 26 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::2 216 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id
system.cpu.dcache.tags.age_task_id_blocks_1024::4 3114 # Occupied blocks per task id
system.cpu.dcache.tags.occ_task_id_percent::1024 0.828613 # Percentage of cache occupancy per task id
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-system.cpu.dcache.tags.data_accesses 336075633 # Number of data accesses
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-system.cpu.dcache.overall_hits::total 168028622 # number of overall hits
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+system.cpu.dcache.tags.data_accesses 336084169 # Number of data accesses
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-system.cpu.dcache.WriteReq_misses::total 5932 # number of WriteReq misses
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-system.cpu.dcache.demand_misses::total 7112 # number of demand (read+write) misses
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-system.cpu.dcache.overall_misses::total 7112 # number of overall misses
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system.cpu.dcache.WriteReq_accesses::cpu.data 73520730 # number of WriteReq accesses(hits+misses)
system.cpu.dcache.WriteReq_accesses::total 73520730 # number of WriteReq accesses(hits+misses)
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-system.cpu.dcache.demand_accesses::total 168035734 # number of demand (read+write) accesses
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-system.cpu.dcache.overall_accesses::total 168035734 # number of overall (read+write) accesses
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+system.cpu.dcache.demand_accesses::total 168040002 # number of demand (read+write) accesses
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system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.000012 # miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_miss_rate::total 0.000012 # miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.000081 # miss rate for WriteReq accesses
@@ -362,14 +362,14 @@ system.cpu.dcache.demand_miss_rate::cpu.data 0.000042
system.cpu.dcache.demand_miss_rate::total 0.000042 # miss rate for demand accesses
system.cpu.dcache.overall_miss_rate::cpu.data 0.000042 # miss rate for overall accesses
system.cpu.dcache.overall_miss_rate::total 0.000042 # miss rate for overall accesses
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 75175.211864 # average ReadReq miss latency
-system.cpu.dcache.ReadReq_avg_miss_latency::total 75175.211864 # average ReadReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 73439.059339 # average WriteReq miss latency
-system.cpu.dcache.WriteReq_avg_miss_latency::total 73439.059339 # average WriteReq miss latency
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 73727.116142 # average overall miss latency
-system.cpu.dcache.demand_avg_miss_latency::total 73727.116142 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 73727.116142 # average overall miss latency
-system.cpu.dcache.overall_avg_miss_latency::total 73727.116142 # average overall miss latency
+system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 74659.322034 # average ReadReq miss latency
+system.cpu.dcache.ReadReq_avg_miss_latency::total 74659.322034 # average ReadReq miss latency
+system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 72952.916877 # average WriteReq miss latency
+system.cpu.dcache.WriteReq_avg_miss_latency::total 72952.916877 # average WriteReq miss latency
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+system.cpu.dcache.demand_avg_miss_latency::total 73236.077907 # average overall miss latency
+system.cpu.dcache.overall_avg_miss_latency::cpu.data 73236.077907 # average overall miss latency
+system.cpu.dcache.overall_avg_miss_latency::total 73236.077907 # average overall miss latency
system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
@@ -382,12 +382,12 @@ system.cpu.dcache.writebacks::writebacks 654 # nu
system.cpu.dcache.writebacks::total 654 # number of writebacks
system.cpu.dcache.ReadReq_mshr_hits::cpu.data 211 # number of ReadReq MSHR hits
system.cpu.dcache.ReadReq_mshr_hits::total 211 # number of ReadReq MSHR hits
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-system.cpu.dcache.WriteReq_mshr_hits::total 2736 # number of WriteReq MSHR hits
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-system.cpu.dcache.demand_mshr_hits::total 2947 # number of demand (read+write) MSHR hits
-system.cpu.dcache.overall_mshr_hits::cpu.data 2947 # number of overall MSHR hits
-system.cpu.dcache.overall_mshr_hits::total 2947 # number of overall MSHR hits
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+system.cpu.dcache.overall_mshr_hits::cpu.data 2946 # number of overall MSHR hits
+system.cpu.dcache.overall_mshr_hits::total 2946 # number of overall MSHR hits
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system.cpu.dcache.ReadReq_mshr_misses::total 969 # number of ReadReq MSHR misses
system.cpu.dcache.WriteReq_mshr_misses::cpu.data 3196 # number of WriteReq MSHR misses
@@ -396,14 +396,14 @@ system.cpu.dcache.demand_mshr_misses::cpu.data 4165
system.cpu.dcache.demand_mshr_misses::total 4165 # number of demand (read+write) MSHR misses
system.cpu.dcache.overall_mshr_misses::cpu.data 4165 # number of overall MSHR misses
system.cpu.dcache.overall_mshr_misses::total 4165 # number of overall MSHR misses
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-system.cpu.dcache.ReadReq_mshr_miss_latency::total 70790750 # number of ReadReq MSHR miss cycles
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-system.cpu.dcache.WriteReq_mshr_miss_latency::total 240139250 # number of WriteReq MSHR miss cycles
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-system.cpu.dcache.demand_mshr_miss_latency::total 310930000 # number of demand (read+write) MSHR miss cycles
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-system.cpu.dcache.overall_mshr_miss_latency::total 310930000 # number of overall MSHR miss cycles
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+system.cpu.dcache.overall_mshr_miss_latency::total 308502250 # number of overall MSHR miss cycles
system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.000010 # mshr miss rate for ReadReq accesses
system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.000010 # mshr miss rate for ReadReq accesses
system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.000043 # mshr miss rate for WriteReq accesses
@@ -412,68 +412,68 @@ system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.000025
system.cpu.dcache.demand_mshr_miss_rate::total 0.000025 # mshr miss rate for demand accesses
system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.000025 # mshr miss rate for overall accesses
system.cpu.dcache.overall_mshr_miss_rate::total 0.000025 # mshr miss rate for overall accesses
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-system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 73055.469556 # average ReadReq mshr miss latency
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-system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 75137.437422 # average WriteReq mshr miss latency
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-system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 74653.061224 # average overall mshr miss latency
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+system.cpu.dcache.overall_avg_mshr_miss_latency::total 74070.168067 # average overall mshr miss latency
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-system.cpu.icache.tags.avg_refs 19090.846154 # Average number of references to valid blocks.
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+system.cpu.icache.tags.avg_refs 19079.124251 # Average number of references to valid blocks.
system.cpu.icache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 1918.668562 # Average occupied blocks per requestor
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system.cpu.icache.tags.age_task_id_blocks_1024::4 1281 # Occupied blocks per task id
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+system.cpu.icache.overall_avg_miss_latency::cpu.inst 62401.159420 # average overall miss latency
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system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
@@ -482,52 +482,52 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan
system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
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-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 62625.609756 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 64102.564103 # average overall mshr miss latency
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 63371.872222 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 62625.609756 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 64102.564103 # average overall mshr miss latency
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 63371.872222 # average overall mshr miss latency
+system.cpu.l2cache.overall_mshr_miss_rate::total 0.843041 # mshr miss rate for overall accesses
+system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.inst 63176.463039 # average ReadReq mshr miss latency
+system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.data 67750.594530 # average ReadReq mshr miss latency
+system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 63988.547604 # average ReadReq mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 62350.015939 # average ReadExReq mshr miss latency
+system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 62350.015939 # average ReadExReq mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 63176.463039 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 63491.767220 # average overall mshr miss latency
+system.cpu.l2cache.demand_avg_mshr_miss_latency::total 63335.756922 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 63176.463039 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 63491.767220 # average overall mshr miss latency
+system.cpu.l2cache.overall_avg_mshr_miss_latency::total 63335.756922 # average overall mshr miss latency
system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.toL2Bus.trans_dist::ReadReq 6141 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadResp 6141 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadReq 6142 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp 6142 # Transaction distribution
system.cpu.toL2Bus.trans_dist::Writeback 654 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExReq 3198 # Transaction distribution
system.cpu.toL2Bus.trans_dist::ReadExResp 3198 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 10348 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 10350 # Packet count per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 8984 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total 19332 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 331136 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 19334 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 331200 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 308416 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_size::total 639552 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_size::total 639616 # Cumulative packet size per connected master and slave (bytes)
system.cpu.toL2Bus.snoops 0 # Total snoops (count)
-system.cpu.toL2Bus.snoop_fanout::samples 9993 # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::samples 9994 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::mean 1 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::stdev 0 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::1 9993 100.00% 100.00% # Request fanout histogram
+system.cpu.toL2Bus.snoop_fanout::1 9994 100.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::min_value 1 # Request fanout histogram
system.cpu.toL2Bus.snoop_fanout::max_value 1 # Request fanout histogram
-system.cpu.toL2Bus.snoop_fanout::total 9993 # Request fanout histogram
-system.cpu.toL2Bus.reqLayer0.occupancy 5650500 # Layer occupancy (ticks)
+system.cpu.toL2Bus.snoop_fanout::total 9994 # Request fanout histogram
+system.cpu.toL2Bus.reqLayer0.occupancy 5651000 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy 8584250 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.occupancy 8587500 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy 7034000 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.occupancy 7035750 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.0 # Layer utilization (%)
-system.membus.trans_dist::ReadReq 4736 # Transaction distribution
-system.membus.trans_dist::ReadResp 4736 # Transaction distribution
+system.membus.trans_dist::ReadReq 4737 # Transaction distribution
+system.membus.trans_dist::ReadResp 4737 # Transaction distribution
system.membus.trans_dist::ReadExReq 3137 # Transaction distribution
system.membus.trans_dist::ReadExResp 3137 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 15746 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 15746 # Packet count per connected master and slave (bytes)
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 503872 # Cumulative packet size per connected master and slave (bytes)
-system.membus.pkt_size::total 503872 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 15748 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count::total 15748 # Packet count per connected master and slave (bytes)
+system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 503936 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_size::total 503936 # Cumulative packet size per connected master and slave (bytes)
system.membus.snoops 0 # Total snoops (count)
-system.membus.snoop_fanout::samples 7873 # Request fanout histogram
+system.membus.snoop_fanout::samples 7874 # Request fanout histogram
system.membus.snoop_fanout::mean 0 # Request fanout histogram
system.membus.snoop_fanout::stdev 0 # Request fanout histogram
system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
-system.membus.snoop_fanout::0 7873 100.00% 100.00% # Request fanout histogram
+system.membus.snoop_fanout::0 7874 100.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::1 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
system.membus.snoop_fanout::min_value 0 # Request fanout histogram
system.membus.snoop_fanout::max_value 0 # Request fanout histogram
-system.membus.snoop_fanout::total 7873 # Request fanout histogram
-system.membus.reqLayer0.occupancy 9289000 # Layer occupancy (ticks)
+system.membus.snoop_fanout::total 7874 # Request fanout histogram
+system.membus.reqLayer0.occupancy 9179500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.membus.respLayer1.occupancy 41806250 # Layer occupancy (ticks)
+system.membus.respLayer1.occupancy 41811750 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.0 # Layer utilization (%)
---------- End Simulation Statistics ----------