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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
| commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
| tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/se/30.eon/ref/alpha | |
| parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
| download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz | |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/se/30.eon/ref/alpha')
3 files changed, 10 insertions, 9 deletions
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini index dfa123161..14dada76e 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini @@ -86,6 +86,7 @@ max_loads_all_threads=0 max_loads_any_thread=0 needsTSO=false numIQEntries=64 +numPhysCCRegs=0 numPhysFloatRegs=256 numPhysIntRegs=256 numROBEntries=192 diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout index dc6d59bdf..58c019f98 100755 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout @@ -1,8 +1,8 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 24 2013 03:08:53 -gem5 started Sep 28 2013 09:53:14 +gem5 compiled Oct 15 2013 18:24:51 +gem5 started Oct 16 2013 01:34:33 gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt index a56a193ad..e492ac5d0 100644 --- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.077522 # Nu sim_ticks 77521581000 # Number of ticks simulated final_tick 77521581000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 226587 # Simulator instruction rate (inst/s) -host_op_rate 226587 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 46769350 # Simulator tick rate (ticks/s) -host_mem_usage 233048 # Number of bytes of host memory used -host_seconds 1657.53 # Real time elapsed on the host +host_inst_rate 201802 # Simulator instruction rate (inst/s) +host_op_rate 201802 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 41653613 # Simulator tick rate (ticks/s) +host_mem_usage 236024 # Number of bytes of host memory used +host_seconds 1861.10 # Real time elapsed on the host sim_insts 375574808 # Number of instructions simulated sim_ops 375574808 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 220992 # Number of bytes read from this memory @@ -350,8 +350,8 @@ system.cpu.rename.IQFullEvents 25268 # Nu system.cpu.rename.LSQFullEvents 8017940 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 287478957 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 579418122 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 306415899 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 273002223 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 413955402 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 165462719 # Number of floating rename lookups system.cpu.rename.CommittedMaps 259532329 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 27946628 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 36876 # count of serializing insts renamed |