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authorSteve Reinhardt <steve.reinhardt@amd.com>2015-04-22 20:22:29 -0700
committerSteve Reinhardt <steve.reinhardt@amd.com>2015-04-22 20:22:29 -0700
commit0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch)
treec0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/long/se/30.eon
parenta70a83155bfe4c3877894c29f9dea720beb40f9c (diff)
downloadgem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/long/se/30.eon')
-rw-r--r--tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini20
-rwxr-xr-xtests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr1
-rwxr-xr-xtests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout7
-rw-r--r--tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt16
-rw-r--r--tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini31
-rwxr-xr-xtests/long/se/30.eon/ref/arm/linux/o3-timing/simerr1
-rwxr-xr-xtests/long/se/30.eon/ref/arm/linux/o3-timing/simout11
-rw-r--r--tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt16
8 files changed, 58 insertions, 45 deletions
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini
index de709e95a..b858d7bf1 100644
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini
@@ -23,6 +23,7 @@ load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
+mmap_using_noreserve=false
num_work_ids=16
readfile=
symbolfile=
@@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.branchPred]
-type=BranchPredictor
+type=TournamentBP
BTBEntries=4096
BTBTagSize=16
RASSize=16
@@ -147,7 +148,6 @@ localCtrBits=2
localHistoryTableSize=2048
localPredictorSize=2048
numThreads=1
-predType=tournament
[system.cpu.dcache]
type=BaseCache
@@ -587,8 +587,11 @@ size=2097152
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
@@ -609,7 +612,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/eon
+executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/eon
gid=100
input=cin
kvmInSE=false
@@ -642,11 +645,14 @@ transition_latency=100000000
type=CoherentXBar
clk_domain=system.clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
snoop_filter=Null
+snoop_response_latency=4
system=system
use_default_range=false
-width=8
+width=16
master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
@@ -677,7 +683,7 @@ IDD62=0.000000
VDD=1.500000
VDD2=0.000000
activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
bank_groups_per_rank=0
banks_per_rank=8
burst_length=8
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr
index 664365742..3b53ebc6c 100755
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr
@@ -1,3 +1,4 @@
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout
index 5f8084c1c..c9fcb56b0 100755
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout
@@ -1,14 +1,15 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 19 2014 12:27:06
-gem5 started Jul 19 2014 12:27:28
+gem5 compiled Apr 22 2015 07:55:25
+gem5 started Apr 22 2015 08:19:59
gem5 executing on phenom
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ALPHA/tests/opt/long/se/30.eon/alpha/tru64/o3-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Eon, Version 1.1
info: Increasing stack size by one page.
OO-style eon Time= 0.066667
-Exiting @ tick 72880000500 because target called exit()
+Exiting @ tick 69793219500 because target called exit()
diff --git a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt
index 52921a0e6..1cb945d89 100644
--- a/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.069793 # Nu
sim_ticks 69793219500 # Number of ticks simulated
final_tick 69793219500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 248568 # Simulator instruction rate (inst/s)
-host_op_rate 248568 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 46191499 # Simulator tick rate (ticks/s)
-host_mem_usage 302704 # Number of bytes of host memory used
-host_seconds 1510.95 # Real time elapsed on the host
+host_inst_rate 237836 # Simulator instruction rate (inst/s)
+host_op_rate 237836 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 44197170 # Simulator tick rate (ticks/s)
+host_mem_usage 232228 # Number of bytes of host memory used
+host_seconds 1579.13 # Real time elapsed on the host
sim_insts 375574808 # Number of instructions simulated
sim_ops 375574808 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -364,7 +364,7 @@ system.cpu.iq.iqInstsAdded 415046688 # Nu
system.cpu.iq.iqNonSpecInstsAdded 308 # Number of non-speculative instructions added to the IQ
system.cpu.iq.iqInstsIssued 407272286 # Number of instructions issued
system.cpu.iq.iqSquashedInstsIssued 487219 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 39326693 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedInstsExamined 39472187 # Number of squashed instructions iterated over during squash; mainly for profiling
system.cpu.iq.iqSquashedOperandsExamined 18379010 # Number of squashed operands that are examined and possibly removed from graph
system.cpu.iq.iqSquashedNonSpecRemoved 93 # Number of squashed non-spec instructions that were removed
system.cpu.iq.issued_per_cycle::samples 139281263 # Number of insts issued each cycle
@@ -457,10 +457,10 @@ system.cpu.iq.rate 2.917707 # In
system.cpu.iq.fu_busy_cnt 19969288 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.049032 # FU busy rate (busy events/executed inst)
system.cpu.iq.int_inst_queue_reads 626696170 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 266696972 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_writes 266819247 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 237458259 # Number of integer instruction queue wakeup accesses
system.cpu.iq.fp_inst_queue_reads 347586172 # Number of floating instruction queue reads
-system.cpu.iq.fp_inst_queue_writes 187752417 # Number of floating instruction queue writes
+system.cpu.iq.fp_inst_queue_writes 187775636 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 163387975 # Number of floating instruction queue wakeup accesses
system.cpu.iq.int_alu_accesses 246426590 # Number of integer alu accesses
system.cpu.iq.fp_alu_accesses 180781403 # Number of floating point alu accesses
diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini
index 05b955543..b4eb9458f 100644
--- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini
+++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini
@@ -23,6 +23,7 @@ load_offset=0
mem_mode=timing
mem_ranges=
memories=system.physmem
+mmap_using_noreserve=false
num_work_ids=16
readfile=
symbolfile=
@@ -135,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.branchPred]
-type=BranchPredictor
+type=BiModeBP
BTBEntries=2048
BTBTagSize=18
RASSize=16
@@ -145,11 +146,7 @@ eventq_index=0
globalCtrBits=2
globalPredictorSize=8192
instShiftAmt=2
-localCtrBits=2
-localHistoryTableSize=2048
-localPredictorSize=2048
numThreads=1
-predType=bi-mode
[system.cpu.dcache]
type=BaseCache
@@ -192,6 +189,7 @@ type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu.dtb
[system.cpu.dstage2_mmu.stage2_tlb]
@@ -209,7 +207,6 @@ eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[5]
[system.cpu.dtb]
type=ArmTLB
@@ -501,7 +498,7 @@ assoc=2
clk_domain=system.cpu_clk_domain
demand_mshr_reserve=1
eventq_index=0
-forward_snoops=true
+forward_snoops=false
hit_latency=1
is_top_level=true
max_miss_count=0
@@ -568,6 +565,7 @@ type=ArmStage2MMU
children=stage2_tlb
eventq_index=0
stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
+sys=system
tlb=system.cpu.itb
[system.cpu.istage2_mmu.stage2_tlb]
@@ -585,7 +583,6 @@ eventq_index=0
is_stage2=true
num_squash_per_cycle=2
sys=system
-port=system.cpu.toL2Bus.slave[4]
[system.cpu.itb]
type=ArmTLB
@@ -669,13 +666,16 @@ size=1048576
type=CoherentXBar
clk_domain=system.cpu_clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=0
+frontend_latency=1
+response_latency=1
snoop_filter=Null
+snoop_response_latency=1
system=system
use_default_range=false
width=32
master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
[system.cpu.tracer]
type=ExeTracer
@@ -691,7 +691,7 @@ env=
errout=cerr
euid=100
eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/eon
+executable=/home/stever/m5/dist/cpu2000/binaries/arm/linux/eon
gid=100
input=cin
kvmInSE=false
@@ -724,11 +724,14 @@ transition_latency=100000000
type=CoherentXBar
clk_domain=system.clk_domain
eventq_index=0
-header_cycles=1
+forward_latency=4
+frontend_latency=3
+response_latency=2
snoop_filter=Null
+snoop_response_latency=4
system=system
use_default_range=false
-width=8
+width=16
master=system.physmem.port
slave=system.system_port system.cpu.l2cache.mem_side
@@ -759,7 +762,7 @@ IDD62=0.000000
VDD=1.500000
VDD2=0.000000
activation_limit=4
-addr_mapping=RoRaBaChCo
+addr_mapping=RoRaBaCoCh
bank_groups_per_rank=0
banks_per_rank=8
burst_length=8
diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr
index a25196116..613c6a6b7 100755
--- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr
+++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr
@@ -1,3 +1,4 @@
+warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (128 Mbytes)
warn: Sockets disabled, not accepting gdb connections
getting pixel output filename pixels_out.cook
opening control file chair.control.cook
diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout
index 35d0eb5ad..88cf501ca 100755
--- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout
+++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/simout
@@ -1,17 +1,18 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jun 21 2014 11:22:42
-gem5 started Jun 21 2014 21:42:59
+gem5 compiled Apr 22 2015 10:58:25
+gem5 started Apr 22 2015 11:46:25
gem5 executing on phenom
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/30.eon/arm/linux/o3-timing -re /home/stever/hg/m5sim.org/gem5/tests/run.py build/ARM/tests/opt/long/se/30.eon/arm/linux/o3-timing
+
Global frequency set at 1000000000000 ticks per second
- 0: system.cpu.isa: ISA system set to: 0 0x6560400
+ 0: system.cpu.isa: ISA system set to: 0 0x2c9dca0
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Eon, Version 1.1
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
-OO-style eon Time= 0.060000
-Exiting @ tick 64766858000 because target called exit()
+OO-style eon Time= 0.110000
+Exiting @ tick 112553814500 because target called exit()
diff --git a/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt
index 44f85cf9d..bf0686636 100644
--- a/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt
+++ b/tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.112554 # Nu
sim_ticks 112553814500 # Number of ticks simulated
final_tick 112553814500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 125235 # Simulator instruction rate (inst/s)
-host_op_rate 150358 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 51625290 # Simulator tick rate (ticks/s)
-host_mem_usage 326264 # Number of bytes of host memory used
-host_seconds 2180.21 # Real time elapsed on the host
+host_inst_rate 123079 # Simulator instruction rate (inst/s)
+host_op_rate 147770 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 50736526 # Simulator tick rate (ticks/s)
+host_mem_usage 257068 # Number of bytes of host memory used
+host_seconds 2218.40 # Real time elapsed on the host
sim_insts 273037219 # Number of instructions simulated
sim_ops 327811601 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -447,7 +447,7 @@ system.cpu.iq.iqInstsAdded 353235129 # Nu
system.cpu.iq.iqNonSpecInstsAdded 28024 # Number of non-speculative instructions added to the IQ
system.cpu.iq.iqInstsIssued 346404668 # Number of instructions issued
system.cpu.iq.iqSquashedInstsIssued 2300304 # Number of squashed instructions issued
-system.cpu.iq.iqSquashedInstsExamined 24831082 # Number of squashed instructions iterated over during squash; mainly for profiling
+system.cpu.iq.iqSquashedInstsExamined 25451552 # Number of squashed instructions iterated over during squash; mainly for profiling
system.cpu.iq.iqSquashedOperandsExamined 73599170 # Number of squashed operands that are examined and possibly removed from graph
system.cpu.iq.iqSquashedNonSpecRemoved 5904 # Number of squashed non-spec instructions that were removed
system.cpu.iq.issued_per_cycle::samples 224784448 # Number of insts issued each cycle
@@ -540,10 +540,10 @@ system.cpu.iq.rate 1.538840 # In
system.cpu.iq.fu_busy_cnt 124292517 # FU busy when requested
system.cpu.iq.fu_busy_rate 0.358807 # FU busy rate (busy events/executed inst)
system.cpu.iq.int_inst_queue_reads 756686876 # Number of integer instruction queue reads
-system.cpu.iq.int_inst_queue_writes 251306416 # Number of integer instruction queue writes
+system.cpu.iq.int_inst_queue_writes 251708205 # Number of integer instruction queue writes
system.cpu.iq.int_inst_queue_wakeup_accesses 223263085 # Number of integer instruction queue wakeup accesses
system.cpu.iq.fp_inst_queue_reads 287499729 # Number of floating instruction queue reads
-system.cpu.iq.fp_inst_queue_writes 126798006 # Number of floating instruction queue writes
+system.cpu.iq.fp_inst_queue_writes 127016687 # Number of floating instruction queue writes
system.cpu.iq.fp_inst_queue_wakeup_accesses 117424806 # Number of floating instruction queue wakeup accesses
system.cpu.iq.int_alu_accesses 303164482 # Number of integer alu accesses
system.cpu.iq.fp_alu_accesses 167532703 # Number of floating point alu accesses