regressions: update stats due to branch predictor changes

The actual statistical values are being updated for only two tests belonging
to sparc architecture and inorder cpu: 00.hello and 02.insttest. For others
the patch updates config.ini and name changes to statistical variables.

1 files changed, 46 insertions, 41 deletions

diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
index 2fc919fb9..28c3943fd 100644
--- a/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
+++ b/tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini
@@ -10,11 +10,12 @@ time_sync_spin_threshold=100000000
 type=System
 children=cpu membus physmem
 boot_osflags=a
-clock=1
+clock=1000
 init_param=0
 kernel=
 load_addr_mask=1099511627775
-mem_mode=atomic
+mem_mode=timing
+mem_ranges=
 memories=system.physmem
 num_work_ids=16
 readfile=
@@ -30,11 +31,11 @@ system_port=system.membus.slave[0]
 
 [system.cpu]
 type=TimingSimpleCPU
-children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload
+children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
+branchPred=Null
 checker=Null
 clock=500
 cpu_id=0
-defer_registration=false
 do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
@@ -42,6 +43,7 @@ dtb=system.cpu.dtb
 function_trace=false
 function_trace_start=0
 interrupts=system.cpu.interrupts
+isa=system.cpu.isa
 itb=system.cpu.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -50,6 +52,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+switched_out=false
 system=system
 tracer=system.cpu.tracer
 workload=system.cpu.workload
@@ -61,23 +64,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=10
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=262144
-subblock_size=0
 system=system
-tgts_per_mshr=5
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.dcache_port
@@ -91,7 +89,7 @@ walker=system.cpu.dtb.walker
 
 [system.cpu.dtb.walker]
 type=ArmTableWalker
-clock=1
+clock=500
 num_squash_per_cycle=2
 sys=system
 port=system.cpu.toL2Bus.slave[3]
@@ -101,23 +99,18 @@ type=BaseCache
 addr_ranges=0:18446744073709551615
 assoc=2
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=1000
+hit_latency=2
 is_top_level=true
 max_miss_count=0
-mshrs=10
+mshrs=4
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=1000
+response_latency=2
 size=131072
-subblock_size=0
 system=system
-tgts_per_mshr=5
-trace_addr=0
+tgts_per_mshr=20
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.icache_port
@@ -126,6 +119,23 @@ mem_side=system.cpu.toL2Bus.slave[0]
 [system.cpu.interrupts]
 type=ArmInterrupts
 
+[system.cpu.isa]
+type=ArmISA
+fpsid=1090793632
+id_isar0=34607377
+id_isar1=34677009
+id_isar2=555950401
+id_isar3=17899825
+id_isar4=268501314
+id_isar5=0
+id_mmfr0=3
+id_mmfr1=0
+id_mmfr2=19070976
+id_mmfr3=4027589137
+id_pfr0=49
+id_pfr1=1
+midr=890224640
+
 [system.cpu.itb]
 type=ArmTLB
 children=walker
@@ -134,7 +144,7 @@ walker=system.cpu.itb.walker
 
 [system.cpu.itb.walker]
 type=ArmTableWalker
-clock=1
+clock=500
 num_squash_per_cycle=2
 sys=system
 port=system.cpu.toL2Bus.slave[2]
@@ -142,25 +152,20 @@ port=system.cpu.toL2Bus.slave[2]
 [system.cpu.l2cache]
 type=BaseCache
 addr_ranges=0:18446744073709551615
-assoc=2
+assoc=8
 block_size=64
-clock=1
+clock=500
 forward_snoops=true
-hash_delay=1
-hit_latency=10000
+hit_latency=20
 is_top_level=false
 max_miss_count=0
-mshrs=10
+mshrs=20
 prefetch_on_access=false
 prefetcher=Null
-prioritizeRequests=false
-repl=Null
-response_latency=10000
+response_latency=20
 size=2097152
-subblock_size=0
 system=system
-tgts_per_mshr=5
-trace_addr=0
+tgts_per_mshr=12
 two_queue=false
 write_buffers=8
 cpu_side=system.cpu.toL2Bus.master[0]
@@ -169,10 +174,10 @@ mem_side=system.membus.slave[1]
 [system.cpu.toL2Bus]
 type=CoherentBus
 block_size=64
-clock=1000
+clock=500
 header_cycles=1
 use_default_range=false
-width=8
+width=32
 master=system.cpu.l2cache.cpu_side
 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 
@@ -187,7 +192,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/projects/pd/randd/dist/cpu2000/binaries/arm/linux/perlbmk
+executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/arm/linux/perlbmk
 gid=100
 input=cin
 max_stack_size=67108864
@@ -211,7 +216,7 @@ slave=system.system_port system.cpu.l2cache.mem_side
 [system.physmem]
 type=SimpleMemory
 bandwidth=73.000000
-clock=1
+clock=1000
 conf_table_reported=false
 in_addr_map=true
 latency=30000