diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-03-09 09:39:09 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-03-09 09:39:09 -0500 |
| commit | 99fb8f81407efa54008ddf443718e492f583b142 (patch) | |
| tree | 48e79a13dc012864045058f6ca3aadc3b9a767a8 /tests/long/se/40.perlbmk | |
| parent | 0c8e025c3bd208e516f1c4247fdf3af7aebb2300 (diff) | |
| download | gem5-99fb8f81407efa54008ddf443718e492f583b142.tar.xz | |
stats: changes to due to recent set of patches
Diffstat (limited to 'tests/long/se/40.perlbmk')
| -rw-r--r-- | tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt | 1 | ||||
| -rw-r--r-- | tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt | 1 |
2 files changed, 0 insertions, 2 deletions
diff --git a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt index 492f134ce..362966e09 100644 --- a/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt @@ -595,7 +595,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 928587628 # Class of committed instruction system.cpu.commit.bw_lim_events 50554341 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 1905392712 # The number of ROB reads system.cpu.rob.rob_writes 3017093514 # The number of ROB writes system.cpu.timesIdled 3164 # Number of times that the entire CPU went into an idle state and unscheduled itself diff --git a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt index c41e8c5e9..a4b1f4996 100644 --- a/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt +++ b/tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt @@ -692,7 +692,6 @@ system.cpu.commit.op_class_0::IprAccess 0 0.00% 100.00% # Cl system.cpu.commit.op_class_0::InstPrefetch 0 0.00% 100.00% # Class of committed instruction system.cpu.commit.op_class_0::total 788730069 # Class of committed instruction system.cpu.commit.bw_lim_events 22360483 # number cycles where commit BW limit reached -system.cpu.commit.bw_limited 0 # number of insts not committed due to BW limits system.cpu.rob.rob_reads 1891410858 # The number of ROB reads system.cpu.rob.rob_writes 2343104087 # The number of ROB writes system.cpu.timesIdled 647398 # Number of times that the entire CPU went into an idle state and unscheduled itself |