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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
| commit | 0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch) | |
| tree | c0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini | |
| parent | a70a83155bfe4c3877894c29f9dea720beb40f9c (diff) | |
| download | gem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz | |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini')
| -rw-r--r-- | tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini index 532524c0d..30f498cad 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini @@ -23,6 +23,7 @@ load_offset=0 mem_mode=timing mem_ranges= memories=system.physmem +mmap_using_noreserve=false num_work_ids=16 readfile= symbolfile= @@ -133,7 +134,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=TournamentBP BTBEntries=4096 BTBTagSize=16 RASSize=16 @@ -147,7 +148,6 @@ localCtrBits=2 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 -predType=tournament [system.cpu.dcache] type=BaseCache @@ -587,8 +587,11 @@ size=2097152 type=CoherentXBar clk_domain=system.cpu_clk_domain eventq_index=0 -header_cycles=1 +forward_latency=0 +frontend_latency=1 +response_latency=1 snoop_filter=Null +snoop_response_latency=1 system=system use_default_range=false width=32 @@ -609,7 +612,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex +executable=/home/stever/m5/dist/cpu2000/binaries/alpha/tru64/vortex gid=100 input=cin kvmInSE=false @@ -642,11 +645,14 @@ transition_latency=100000000 type=CoherentXBar clk_domain=system.clk_domain eventq_index=0 -header_cycles=1 +forward_latency=4 +frontend_latency=3 +response_latency=2 snoop_filter=Null +snoop_response_latency=4 system=system use_default_range=false -width=8 +width=16 master=system.physmem.port slave=system.system_port system.cpu.l2cache.mem_side @@ -677,7 +683,7 @@ IDD62=0.000000 VDD=1.500000 VDD2=0.000000 activation_limit=4 -addr_mapping=RoRaBaChCo +addr_mapping=RoRaBaCoCh bank_groups_per_rank=0 banks_per_rank=8 burst_length=8 |