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authorNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
committerNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
commit4a644767c58754339965cecc5d85853255652a30 (patch)
treee435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
parent55411f7f713a42f67552a9621051fae8f7869648 (diff)
downloadgem5-4a644767c58754339965cecc5d85853255652a30.tar.xz
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini')
-rw-r--r--tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini31
1 files changed, 17 insertions, 14 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index 427d5ea46..e450ba18e 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
[system.cpu]
type=DerivO3CPU
@@ -127,7 +126,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -148,7 +147,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=AlphaTLB
@@ -419,7 +418,7 @@ opLat=3
[system.cpu.icache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -440,7 +439,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.port[0]
+mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=AlphaInterrupts
@@ -451,7 +450,7 @@ size=48
[system.cpu.l2cache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -471,8 +470,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
-cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[2]
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@@ -482,7 +481,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
[system.cpu.tracer]
type=ExeTracer
@@ -490,7 +490,7 @@ type=ExeTracer
[system.cpu.workload]
type=LiveProcess
cmd=vortex lendian.raw
-cwd=build/ALPHA/tests/fast/long/se/50.vortex/alpha/tru64/o3-timing
+cwd=build/ALPHA/tests/opt/long/se/50.vortex/alpha/tru64/o3-timing
egid=100
env=
errout=cerr
@@ -514,15 +514,18 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
+master=system.physmem.port[0]
+slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]