stats: update references

1 files changed, 84 insertions, 5 deletions

diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
index 3a9ebdb7f..d19d770e5 100644
--- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini
@@ -14,7 +14,9 @@ children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domai
 boot_osflags=a
 cache_line_size=64
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
+exit_on_work_items=false
 init_param=0
 kernel=
 kernel_addr_check=true
@@ -24,9 +26,16 @@ mem_mode=timing
 mem_ranges=
 memories=system.physmem
 mmap_using_noreserve=false
+multi_thread=false
 num_work_ids=16
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 readfile=
 symbolfile=
+thermal_components=
+thermal_model=Null
 work_begin_ckpt_count=0
 work_begin_cpu_id_exit=-1
 work_begin_exit_count=0
@@ -68,6 +77,7 @@ cpu_id=0
 decodeToFetchDelay=1
 decodeToRenameDelay=1
 decodeWidth=8
+default_p_state=UNDEFINED
 dispatchWidth=8
 do_checkpoint_insts=true
 do_quiesce=true
@@ -104,6 +114,10 @@ numPhysIntRegs=256
 numROBEntries=192
 numRobs=1
 numThreads=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 profile=0
 progress_interval=0
 renameToDecodeDelay=1
@@ -143,11 +157,18 @@ choicePredictorSize=8192
 eventq_index=0
 globalCtrBits=2
 globalPredictorSize=8192
+indirectHashGHR=true
+indirectHashTargets=true
+indirectPathLength=3
+indirectSets=256
+indirectTagSize=16
+indirectWays=2
 instShiftAmt=2
 localCtrBits=2
 localHistoryTableSize=2048
 localPredictorSize=2048
 numThreads=1
+useIndirect=true
 
 [system.cpu.dcache]
 type=Cache
@@ -155,13 +176,18 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=2
 is_read_only=false
 max_miss_count=0
 mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -171,6 +197,7 @@ system=system
 tags=system.cpu.dcache.tags
 tgts_per_mshr=20
 write_buffers=8
+writeback_clean=false
 cpu_side=system.cpu.dcache_port
 mem_side=system.cpu.toL2Bus.slave[1]
 
@@ -179,8 +206,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=262144
 
@@ -502,13 +534,18 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=2
 is_read_only=true
 max_miss_count=0
 mshrs=4
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
@@ -518,6 +555,7 @@ system=system
 tags=system.cpu.icache.tags
 tgts_per_mshr=20
 write_buffers=8
+writeback_clean=true
 cpu_side=system.cpu.icache_port
 mem_side=system.cpu.toL2Bus.slave[0]
 
@@ -526,8 +564,13 @@ type=LRU
 assoc=2
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=2
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=131072
 
@@ -551,13 +594,18 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
+default_p_state=UNDEFINED
 demand_mshr_reserve=1
 eventq_index=0
-forward_snoops=true
 hit_latency=20
 is_read_only=false
 max_miss_count=0
 mshrs=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
@@ -567,6 +615,7 @@ system=system
 tags=system.cpu.l2cache.tags
 tgts_per_mshr=12
 write_buffers=8
+writeback_clean=false
 cpu_side=system.cpu.toL2Bus.master[0]
 mem_side=system.membus.slave[1]
 
@@ -575,19 +624,31 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 hit_latency=20
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+power_model=Null
 sequential_access=false
 size=2097152
 
 [system.cpu.toL2Bus]
 type=CoherentXBar
+children=snoop_filter
 clk_domain=system.cpu_clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=0
 frontend_latency=1
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=false
+power_model=Null
 response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
 snoop_response_latency=1
 system=system
 use_default_range=false
@@ -595,6 +656,13 @@ width=32
 master=system.cpu.l2cache.cpu_side
 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
 [system.cpu.tracer]
 type=ExeTracer
 eventq_index=0
@@ -609,7 +677,7 @@ env=
 errout=cerr
 euid=100
 eventq_index=0
-executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/alpha/tru64/vortex
+executable=/arm/projectscratch/randd/systems/dist/cpu2000/binaries/alpha/tru64/vortex
 gid=100
 input=cin
 kvmInSE=false
@@ -641,9 +709,15 @@ transition_latency=100000000
 [system.membus]
 type=CoherentXBar
 clk_domain=system.clk_domain
+default_p_state=UNDEFINED
 eventq_index=0
 forward_latency=4
 frontend_latency=3
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
+point_of_coherency=true
+power_model=Null
 response_latency=2
 snoop_filter=Null
 snoop_response_latency=4
@@ -687,6 +761,7 @@ burst_length=8
 channels=1
 clk_domain=system.clk_domain
 conf_table_reported=true
+default_p_state=UNDEFINED
 device_bus_width=8
 device_rowbuffer_size=1024
 device_size=536870912
@@ -698,7 +773,11 @@ max_accesses_per_row=16
 mem_sched_policy=frfcfs
 min_writes_per_switch=16
 null=false
+p_state_clk_gate_bins=20
+p_state_clk_gate_max=1000000000000
+p_state_clk_gate_min=1000
 page_policy=open_adaptive
+power_model=Null
 range=0:134217727
 ranks_per_channel=2
 read_buffer_size=32