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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2013-10-16 10:44:12 -0400 |
commit | 10e64501206b72901c266855fde2909523b875e0 (patch) | |
tree | df5db553cf78ff00467b4ca87614a5721439b2ec /tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt | |
parent | b10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff) | |
download | gem5-10e64501206b72901c266855fde2909523b875e0.tar.xz |
test: update stats
Update stats for recent changes. Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.
Diffstat (limited to 'tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt')
-rw-r--r-- | tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt index 5b9e2998f..f889e2dcc 100644 --- a/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.024977 # Nu sim_ticks 24977022500 # Number of ticks simulated final_tick 24977022500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 124025 # Simulator instruction rate (inst/s) -host_op_rate 124025 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 38920856 # Simulator tick rate (ticks/s) -host_mem_usage 235900 # Number of bytes of host memory used -host_seconds 641.74 # Real time elapsed on the host +host_inst_rate 179872 # Simulator instruction rate (inst/s) +host_op_rate 179872 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 56446381 # Simulator tick rate (ticks/s) +host_mem_usage 238148 # Number of bytes of host memory used +host_seconds 442.49 # Real time elapsed on the host sim_insts 79591756 # Number of instructions simulated sim_ops 79591756 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 489984 # Number of bytes read from this memory @@ -417,8 +417,8 @@ system.cpu.rename.IQFullEvents 2492 # Nu system.cpu.rename.LSQFullEvents 2137772 # Number of times rename has blocked due to LSQ full system.cpu.rename.RenamedOperands 61631332 # Number of destination operands rename has renamed system.cpu.rename.RenameLookups 123302278 # Number of register rename lookups that rename has made -system.cpu.rename.int_rename_lookups 122850608 # Number of integer rename lookups -system.cpu.rename.fp_rename_lookups 451670 # Number of floating rename lookups +system.cpu.rename.int_rename_lookups 122982558 # Number of integer rename lookups +system.cpu.rename.fp_rename_lookups 319719 # Number of floating rename lookups system.cpu.rename.CommittedMaps 52546881 # Number of HB maps that are committed system.cpu.rename.UndoneMaps 9084451 # Number of HB maps that are undone due to squashing system.cpu.rename.serializingInsts 5532 # count of serializing insts renamed |